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J1a SwapForth built with IceStorm Project IceStorm aims to reverse engineer some Lattice FPGAs, and provides a working tool chain for synthesizing designs and downloading them into the hardware. The J1a CPU is a minimal 16-bit Verilog CPU, fits easily on the Lattice HX20-1K on the Lattice iCEstick evaluation board. After some help from the people at project IceStorm, it is now buildable using the
Small (750-2000 LUTs in 7-Series Xilinx Architecture) High fmax (250-450 MHz on 7-Series Xilinx FPGAs) Selectable native memory interface or AXI4-Lite master Optional IRQ support (using a simple custom ISA) Optional Co-Processor Interface This CPU is meant to be used as auxiliary processor in FPGA designs and ASICs. Due to its high fmax it can be integrated in most existing designs without crossin
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