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HarinandanAM / FPGA

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This repository showcases various projects developed on the DE10-Lite board (Intel MAX 10 FPGA) using Quartus Prime Lite software. Each project includes HDL code, testbenches, simulations, and pin assignments, providing a comprehensive view of the FPGA design process.

fsm fpga microcontrollers dsp vhdl verification uart testbenches verilog-hdl digital-circuits quartus pin-assignment qsf communication-protocols rtl-simulations gtk-wave ip-cores
  • Updated Sep 6, 2024
  • VHDL

saramkhalaf / engr378

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These labs were conducted during our Digital systems elective course were we were instructed to build Verilog code for specific logic design and verify it on Quartus modalism and on the FPGA. Skills developed: writing Verilog code structurally and behaviorally, testing, simulation, writing test benches and using the FPGA

design fpga digital simulation verilog testbenches modelsim altera-fpga fpga-programming digitallogic verilog-code
  • Updated Jan 11, 2021
  • Verilog

Samuel-101 / FPGA

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This repository showcases various projects developed on the DE10-Lite board (Intel MAX 10 FPGA) using Quartus Prime Lite software. The projects primarily focus on Finite State Machines (FSMs) and communication protocols, implemented in VHDL. Each project includes HDL code, testbenches, simulations, and qsf files for pin assignments.

microcontroller fsm dsp vhdl verification gtkwave testbenches verilog-hdl digital-circuits pin-assignment uart-vhdl qsf rtl-simulations ip-cores
  • Updated Sep 6, 2024
  • VHDL

snbk001 / Verilog-Design-Examples

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Verilog Design Examples with self checking testbenches. Half Adder, Full Adder, Mux, ALU, D Flip Flop, Sequence Detector using Mealy machine and Moore machine, Number of 1s, Binary to Gray Conversion, Up down counter, Clock Divider, PIPO, n bit universal shift register, 4 bit LFSR, Single port RAM, Dual port RAM, Synchronous FIFO, Asynchronous F…

verilog testbenches verilog-hdl verilog-programs verilog-project verilog-code verilog-design self-checking
  • Updated Jan 29, 2024
  • Verilog

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