PCIe (1.0a to 2.0) Virtual host model for verilog

Virtual processor co-simulation element for Verilog, VHDL and SystemVerilog environments

Garmin inReach to Cursor on Target (CoT) Gateway, for TAK Products.

High speed C/C++ based behavioural VHDL/Verilog co-simulation memory model

Ultrasonic Detection of Composite Material Delamination via SHM UGW Lamb Wave - (PLI, CSI, ECI) - Linux C OOP library

Fiber Architecture Constructor

Zowe COBOL Language Support plug-in for IntelliJ IDEA

Using Nim to interface with Verilog and SystemVerilog test benches via VPI

An IcarusVerilog VPI bridge for the Swift Programming Language.

Built a deep neural network model that can classify traffic signs present in the image into different categories. This model is able to read and understand traffic signs , an application for self driving cars.

Examples of NN models. DL algorithms

⌨️ The PL/I programming language IDE submodule for SNU Programming Tools (2D Mode)

📚️ A repository for showcasing my knowledge of the PL/I programming language, and continuing to learn the language.

Um projeto para criar um Bootcamp IBM Mainframe para padawans no século XXI

Boolean Minimisation (legacy)

Wrapper for SystemVerilog VPI headers sv_vpi_user.h and vpi_user.h

This repository is a set of tools that I use in my thesis, the main focus is processing EEG data, but some functions is expandable to other time series and signal processing fields.