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nsyee id:nsyee

FPGAã«é–¢ã™ã‚‹nsyeeã®ãƒ–ãƒƒã‚¯ãƒžãƒ¼ã‚¯ (48)

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ã‚¤ãƒ³ãƒ†ãƒ«ã€ISCA 2015ã§Xeonï¼‹FPGAã®è©³ç´°ã‚’å…¬é–‹ - Qiita
ä»Šæœˆã¯ã˜ã‚ã€ã‚¤ãƒ³ãƒ†ãƒ«ãŒFPGAå¤§æ‰‹ã®ã‚¢ãƒ«ãƒ†ãƒ©ã‚’ç·é¡2å…†å††ã§è²·åŽã™ã‚‹ã“ã¨ã‚’ç™ºè¡¨ã—ãŸã€‚ã‚¤ãƒ³ãƒ†ãƒ«ã¯ã¡ã‚‡ã£ã¨å‰ã¾ã§ã¯CPU+FPGAãªã‚“ã¦ã‚³ãƒ¼ãƒ‰ãŒåˆ†æ–ã™ã‚‹ã—ãƒ€ãƒ¡ãƒ€ãƒ¡ã‚½ãƒªãƒ¥ãƒ¼ã‚·ãƒ§ãƒ³ã ãªã‚“ã¦è¨€ã£ã¦ãŸãã›ã«ã€ãªã‚“ã¦é®®ã‚„ã‹ãªæ‰‹ã®ã²ã‚‰ã®è¿”ã—ã‚ˆã†ã€‚ã¾ã‚ã§ã‚‚ã€ã™ã°ã‚‰ã—ã„å±•é–‹ã ã—éžãƒŽã‚¤ãƒžãƒ³è¨ˆç®—ã‚’ã‚½ãƒ•ãƒˆå±‹ãŒä½¿ã„ã“ãªã™æ™‚ä»£ãŒå¹•é–‹ã‘ã—ãã†ãªã®ã§ã€ã‚ã£ã±ã‚Œã‚¤ãƒ³ãƒ†ãƒ«ã§ã‚ã‚‹ã€‚éžãƒŽã‚¤ãƒžãƒ³ãªã«ãã‚Œï¼Ÿã€€ã¨ã„ã†äººã¯ã‚³ãƒã‚¯ã‚·ãƒ§ãƒ³ãƒžã‚·ãƒ³æœ¬ã¨é’ã„ãƒªã‚³ãƒ³ãƒ•æœ¬ã‚’èªã‚“ã§ãŠã“ã†ã€‚ ã“ã®ç™ºè¡¨ã§ã‚¤ãƒ³ãƒ†ãƒ«ãŒèª¬æ˜Žã«ç”¨ã„ãŸã‚¹ãƒ©ã‚¤ãƒ‰ã§ã€ã¨ãã«ç›®ã‚’å¼•ã„ãŸã®ãŒä»¥ä¸‹ã®ä¸€æ–‡ã€‚ Up to 1/3 of Cloud Service Provider Nodes to Use FPGAs by 2020 ï¼ˆ2020å¹´ã¾ã§ã«ã€ã‚¯ãƒ©ã‚¦ãƒ‰ã‚µãƒ¼ãƒ“ã‚¹ãƒ—ãƒãƒã‚¤ãƒ€ã®ã‚µãƒ¼ãƒã®1/3ãŒFPGAã‚’åˆ©ç”¨ã™ã‚‹ï¼‰ ã¤ã¾ã‚Šã‚ã¨5å¹´ã‚‚ã™ã‚‹ã¨ã€ã‚¯ãƒ©ã‚¦ãƒ‰ã‚’ä½¿ã†ã‚¨ãƒ³ã‚¸ãƒ‹ã‚¢ã¯ç›´æŽ¥çš„ï¼é–“æŽ¥çš„ã«FPGAã‚’ä½¿ã‚ã–
nsyee 2015/06/22
FPGA
ãƒªãƒ³ã‚¯
MicrosoftãŒFPGAã§DeepLearningã—ã¦ãŸ - SANMAN
Alteraã®ãƒªãƒªãƒ¼ã‚¹ãƒŽãƒ¼ãƒˆã§çŸ¥ã£ã¦ã¯ã„ãŸãŒã€Microsoftãƒªã‚µãƒ¼ãƒã®ãƒ›ãƒ¯ã‚¤ãƒˆãƒšãƒ¼ãƒ‘ãƒ¼ã‚’ç™ºè¦‹ã—ãŸã€‚2015å¹´ã«UCLAãŒXilinxã®FPGAä½¿ã£ã¦åŒæ§˜ã®ã“ã¨(CNNã®å®Ÿè£…)ã‚’ã—ã¦ã„ã‚‹ãŒã€ãã‚Œã‚ˆã‚Š3å€ãã‚‰ã„æ€§èƒ½è‰¯ã„æ¨¡æ§˜ã€‚ http://research.microsoft.com/pubs/240715/CNN%20Whitepaper.pdf DeepLearningã®ä¸€ç¨®Convolutional Neural Networkã‚’FPGAã¨ã„ã†ã‹ã€è‡ªç¤¾è£½FPGAãƒœãƒ¼ãƒ‰ã€ŒCatapultã€ä¸Šã«ã®ã›ãŸã€‚ ã“ã®Catapultã«ã¤ã„ã¦ã¯ä»¥å‰è¨˜äº‹ã«ã—ãŸã€‚ tkysktmt.hatena blog.com Deep Learningã«ã¤ã„ã¦ è‡ªåˆ†ãŒã©ã†è€ƒãˆã¦ã„ã‚‹ã‹ç°¡å˜ã«ã€‚ Deepãªå±¤æ§‹é€ (3å±¤ä»¥ä¸Š)ã‚’ã‚‚ã£ãŸNeural Networkã‚’ã€ã©ã†ã«ã‹ã—ã¦å¦ç¿’ã•ã›ã‚‹ã“ã¨ãŒã§ããŸã‚‚ã®ã‚’Deep Lea
nsyee 2015/06/15
microsoft

FPGA

deep-learning

machine-learning
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nsyee 2015/04/28
dwango

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FPGA

äº‹ä¾‹
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Synthesijer jjug 201504_01
Javaã‚’ãŠä½¿ã„ã®æ–¹å‘ã‘ã«æœ€è¿‘ã®ãƒã‚ºãƒ¯ãƒ¼ãƒ‰çš„ã«ãªã‚Šã¤ã¤ã‚ã‚‹FPGA(å°‚ç”¨ãƒãƒ¼ãƒ‰ã‚¦ã‚§ã‚¢)ã®è©±ã‚’åŽšã‚ã«ã—ã¤ã¤ï¼Œå¾ŒåŠã¯JavaCompiler.javaã®è©±ã‚’å°‘ã—ã¾ã¨ã‚ã¦ã¿ã¾ã—ãŸï¼Ž > ã‚¢ãƒ¼ã‚ãƒ†ã‚¯ãƒãƒ£å°‚é–€å®¶ï¼ŒHWå°‚é–€å®¶ã®æ–¹ã¸ Javaãƒ¦ãƒ¼ã‚¶å‘ã‘ã«ï¼Œã¡ã‚‡ã£ã¨å¹ã„ãŸå†…å®¹ã«ãªã£ã¦ã„ã¾ã™ï¼Žå£é ç™ºè¡¨æ™‚ã«ã¯ï¼Œã‹ãªã‚Šã‚¨ã‚¯ã‚¹ã‚ãƒ¥ãƒ¼ã‚ºã—ã¾ã™ã®ã§ï¼ŒãŠã“ã‚‰ãªã„ã§ãã ã•ã„...
nsyee 2015/04/13
Java

compiler

FPGA
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$30ã§å§‹ã‚ã‚‹FPGA
Pythonã®å‡¦ç†ç³»ã¯ã©ã®ã‚ˆã†ã«å®Ÿè£…ã•ã‚Œï¼Œã©ã®ã‚ˆã†ã«å‹•ã„ã¦ã„ã‚‹ã®ã‹ï¼Ÿ æˆ‘ã€…ã¯ãã®å®Ÿæ…‹ã‚’èª¿æŸ»ã™ã¹ãã‚¢ãƒžã‚¾ãƒ³ã¸ã¨é£›ã‚“ã ï¼Ž
nsyee 2015/04/05
FPGA

tutorial
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All Programmableãƒ‡ãƒã‚¤ã‚¹å‘ã‘é–‹ç™ºç’°å¢ƒã€C/C++ã§FPGAå›žè·¯è¨è¨ˆã‚‚å¯èƒ½ã«
All Programmableãƒ‡ãƒã‚¤ã‚¹å‘ã‘é–‹ç™ºç’°å¢ƒã€C/C++ã§FPGAå›žè·¯è¨è¨ˆã‚‚å¯èƒ½ã«ï¼šãƒ—ãƒã‚°ãƒ©ãƒžãƒ–ãƒ«ãƒã‚¸ãƒƒã‚¯ FPGAï¼ˆ1/2 ãƒšãƒ¼ã‚¸ï¼‰ ã‚¶ã‚¤ãƒªãƒ³ã‚¯ã‚¹ã¯ã€All Programmable SoCãŠã‚ˆã³MPSoCå‘ã‘ã®é–‹ç™ºç’°å¢ƒã€ŒSDSoCã€ã‚’ç™ºè¡¨ã—ãŸã€‚SDSoCã‚’ç”¨ã„ã‚‹ã¨ã€FPGAã‚’è¨è¨ˆã—ãŸçµŒé¨“ãŒã»ã¨ã‚“ã©ãªã„æŠ€è¡“è€…ã§ã‚‚ã€é«˜é€ŸåŒ–ã—ãŸã„C/C++é–¢æ•°ã‚’æŒ‡å®šã™ã‚‹ã ã‘ã§ã€è‡ªå‹•çš„ã«ãƒãƒ¼ãƒ‰ã‚¦ã‚§ã‚¢å›žè·¯ã«ç½®ãæ›ãˆã‚‹ã“ã¨ãŒã§ãã‚‹ã€‚ ã‚¶ã‚¤ãƒªãƒ³ã‚¯ã‚¹ã¯2015å¹´3æœˆ10æ—¥ã€All Programmable SoCãŠã‚ˆã³MPSoCå‘ã‘ã®é–‹ç™ºç’°å¢ƒã€ŒSDSoCã€ã‚’ç™ºè¡¨ã—ãŸã€‚SDSoCã‚’ç”¨ã„ã‚‹ã¨ã€FPGAã‚’è¨è¨ˆã—ãŸçµŒé¨“ãŒã»ã¨ã‚“ã©ãªã„æŠ€è¡“è€…ã§ã‚‚ã€é«˜é€ŸåŒ–ã—ãŸã„C/C++é–¢æ•°ã‚’æŒ‡å®šã™ã‚‹ã ã‘ã§ã€è‡ªå‹•çš„ã«ãƒãƒ¼ãƒ‰ã‚¦ã‚§ã‚¢å›žè·¯ã«ç½®ãæ›ãˆã‚‹ã“ã¨ãŒã§ãã‚‹ãŸã‚ã€ã‚·ã‚¹ãƒ†ãƒ æ€§èƒ½ã«å„ªã‚ŒãŸSoCè¨è¨ˆãŒå¯èƒ½ã¨ãªã‚‹ã€‚ Eclipseãƒ™ãƒ¼ã‚¹ã§ SDSo
nsyee 2015/03/12
FPGA

C

C++
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Mathlon Technology
nsyee 2015/02/16
FPGA

DSP
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Project Summary: Factoids - Open Hub
nsyee 2015/02/16
FPGA

Coq

HDL
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é›»åå·¥ä½œã®å°éƒ¨å±‹
ãƒ–ãƒã‚°å é›»åå·¥ä½œã®å°éƒ¨å±‹ ãƒ–ãƒã‚°ç´¹ä»‹ ã‚ªãƒ¼ãƒ‡ã‚£ã‚ªã€ã‚¢ãƒžãƒãƒ¥ã‚¢ç„¡ç·šãªã©ã€é›»åå·¥ä½œã«ä¿‚ã‚ã‚‹ãƒ¡ãƒ¢ãƒ»è¨˜éŒ²ã§ã™ã€‚ é…ã„å¤ä¼‘ã¿ã€ç§‹æœˆé›»åé€šç§°ã®ãƒ›ãƒ¼ãƒ ãƒšãƒ¼ã‚¸ã®æ–°è£½å“ã‚’çœºã‚ã¦ã„ãŸã¨ã“ã‚ã€æ¨™é¡Œã®ä½ŽãƒŽã‚¤ã‚ºé›»æºãƒ¢ã‚¸ãƒ¥ãƒ¼ãƒ«ã‚ãƒƒãƒˆãŒå…ˆæœˆç™ºå£²ã•ã‚ŒãŸã“ã¨ã«æ°—ä»˜ãã¾ã—ãŸã€‚å›½ç”£ã‚¢ãƒŠãƒã‚°ICã§é ‘å¼µã£ã¦ã„ã‚‹æ—¥æ¸…ç´¡ãƒžã‚¤ã‚¯ãƒãƒ‡ãƒã‚¤ã‚¹ç¤¾ã®æ–°è£½å“ã‚’æŽ¡ç”¨ã—ãŸåŸºç›¤ãƒ¢ã‚¸ãƒ¥ãƒ¼ãƒ«ã¨ã—ã¦å®Œæˆã•ã‚Œã¦ãŠã‚Šã€ICã‚„ã‚³ãƒ³ãƒ‡ãƒ³ã‚µã¨ã„ã£ãŸè¡¨é¢å®Ÿè£…éƒ¨å“ã‚‚äºˆã‚ã¯ã‚“ã ä»˜ã‘å®Ÿè£…ã•ã‚Œã¦ã„ã‚‹ã‚ˆã†ã§ã™ã€‚ æ³¨ç›®ã®å‡ºåŠ›â€¦
nsyee 2014/10/26
FPGA

radio

é›»åå·¥ä½œ
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ã‚¤ãƒ³ãƒ†ãƒ«ãŒFPGAæè¼‰ãƒ—ãƒã‚»ãƒƒã‚µã®æŠ•å…¥ã‚’è¡¨æ˜Žã€MSã®è¦æœ›ãªã©åæ˜ ã‹
ç±³ã‚¤ãƒ³ãƒ†ãƒ«ãŒã€ã¤ã„ã«FPGAã¨x86ãƒ—ãƒã‚»ãƒƒã‚µã‚’çµ„ã¿åˆã‚ã›ã‚‹æ‰‹æ®µã«æ‰“ã£ã¦å‡ºã‚‹ã€‚ãƒ—ãƒã‚°ãƒ©ãƒžãƒ–ãƒ«ãªã‚¢ã‚¯ã‚»ãƒ©ãƒ¬ãƒ¼ã‚¿ã§ã‚ã‚‹FPGAã¨ã€åŒç¤¾ã®ã‚µãƒ¼ãƒãƒ¼ç”¨ãƒ—ãƒã‚»ãƒƒã‚µã€ŒXeonã€ã‚’ã€ä¸€ã¤ã®ãƒ‘ãƒƒã‚±ãƒ¼ã‚¸ã«åŽã‚ãŸè£½å“ã‚’æ¤œè¨Žã—ã¦ã„ã‚‹ã€‚ 2014å¹´6æœˆ18ï½ž19æ—¥ã«ç±³å›½ã§é–‹å‚¬ã•ã‚ŒãŸã‚¤ãƒ™ãƒ³ãƒˆã€ŒGigaom Structure 2014ã€ã§ã€åŒç¤¾Data Center Groupã®SVP/General Managerã®Diane Bryantæ°ãŒè¬›æ¼”ã—ã€æ˜Žã‚‰ã‹ã«ã—ãŸã€‚ ä»Šå›žã®ãƒ—ãƒã‚»ãƒƒã‚µã¯ã€ãƒ‡ãƒ¼ã‚¿ã‚»ãƒ³ã‚¿ãƒ¼ã«å‘ã‘ãŸã‚‚ã®ã§ã‚ã‚‹ã€‚ã‚¤ãƒ³ãƒ†ãƒ«ã¯è¿‘å¹´ã€å¤§è¦æ¨¡ãªãƒ‡ãƒ¼ã‚¿ã‚»ãƒ³ã‚¿ãƒ¼ã‚’æŒã¤ã‚¯ãƒ©ã‚¦ãƒ‰äº‹æ¥è€…å‘ã‘ã«ã‚«ã‚¹ã‚¿ãƒ åŒ–ã—ãŸãƒ—ãƒã‚»ãƒƒã‚µã‚’æä¾›ã—ã¦ã„ã‚‹ã€‚2013å¹´ã«ã¯ãã®æ•°ã¯15ç¨®é¡žã€2014å¹´ã«ã¯30ç¨®é¡žã«ãªã‚‹ã¨ã„ã†ã€‚ ä»Šå›žã®ãƒ—ãƒã‚»ãƒƒã‚µã¯ã€ã“ã†ã—ãŸã‚«ã‚¹ã‚¿ãƒ åŒ–ã®ãƒ‹ãƒ¼ã‚ºãŠã‚ˆã³ç‰¹å®šã®ãƒ¯ãƒ¼ã‚¯ãƒãƒ¼ãƒ‰ã‚’é«˜é€ŸåŒ–ã—ãŸã„ã¨ã®ãƒ‹ãƒ¼ã‚ºã‚’ç‹™ã£ãŸã‚‚ã®ã¨æ€ã‚ã‚Œã‚‹ã€‚Bry
nsyee 2014/06/21
intel

FPGA

CPU
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GitHub - jbush001/NyuziProcessor: GPGPU microprocessor architecture
Nyuzi is an experimental GPGPU processor focused on compute intensive tasks. It includes a synthesizable hardware design written in System Verilog, an instruction set emulator, an LLVM based C/C++ compiler, software libraries, and tests. It can be used to experiment with microarchitectural and instruction set design tradeoffs. Documentation: https://github.com/jbush001/NyuziProcessor/wiki The foll
nsyee 2014/06/02
FPGA

GPU
ãƒªãƒ³ã‚¯
http://papilio.cc/
nsyee 2014/05/21
FPGA

arduino
ãƒªãƒ³ã‚¯
FPGAã®ãƒˆãƒ¬ãƒ³ãƒ‰ã‚’ã¾ã¨ã‚ã¦ã¿ãŸ
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nsyee 2014/05/14
FPGA
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FPGAã«ãƒãƒ¼ãƒ‰ã‚¦ã‚§ã‚¢æµ®å‹•å°æ•°ç‚¹DSPå†…è”µã€é›»åŠ›åŠ¹çŽ‡ã§GPGPUã®ä¸Šã‚’è¡Œãï¼šãƒ—ãƒã‚°ãƒ©ãƒžãƒ–ãƒ«ãƒã‚¸ãƒƒã‚¯ FPGA ã‚¢ãƒ«ãƒ†ãƒ©ã¯ã€åŒç¤¾è£½FPGAã«å†…è”µã™ã‚‹IEEE754æº–æ‹ ã®ãƒãƒ¼ãƒ‰ã‚¦ã‚§ã‚¢æµ®å‹•å°æ•°ç‚¹DSPã‚’ç™ºè¡¨ã—ãŸã€‚ã¾ãšã€20nmãƒ—ãƒã‚»ã‚¹ã§è£½é€ ã•ã‚Œã‚‹ã€ŒArria 10ã€FPGAï¼†SoCã¨ã€14nmãƒˆãƒ©ã‚¤ã‚²ãƒ¼ãƒˆãƒ—ãƒã‚»ã‚¹ã§è£½é€ ã•ã‚Œã‚‹ã€ŒStratix 10ã€FPGAï¼†SoCã§ã€ãƒãƒ¼ãƒ‰ã‚¦ã‚§ã‚¢æµ®å‹•å°æ•°ç‚¹DSPãƒ–ãƒãƒƒã‚¯ã‚’å†…è”µã—ãŸè£½å“ã‚’ç”¨æ„ã™ã‚‹ã€‚DSPæ€§èƒ½ã¯Arria 10ã§æœ€å¤§1.5T FLOPSã€Stratix 10ã§æœ€å¤§10T FLOPSã‚’å®Ÿç¾ã§ãã‚‹ã¨ã„ã†ã€‚ ã‚¢ãƒ«ãƒ†ãƒ©ã¯2014å¹´4æœˆ23æ—¥ã€åŒç¤¾è£½FPGAã«å†…è”µã™ã‚‹IEEE754æº–æ‹ ã®ãƒãƒ¼ãƒ‰ã‚¦ã‚§ã‚¢æµ®å‹•å°æ•°ç‚¹DSPã‚’ç™ºè¡¨ã—ãŸã€‚ã¾ãšã€20nmãƒ—ãƒã‚»ã‚¹ã§è£½é€ ã•ã‚Œã‚‹ã€ŒArria 10ã€FPGAï¼†SoCã¨ã€14nmãƒˆãƒ©ã‚¤ã‚²ãƒ¼ãƒˆãƒ—ãƒã‚»ã‚¹ã§è£½é€ ã•ã‚Œã‚‹ã€ŒStratix 10
nsyee 2014/05/09
FPGA

GPU

DSP
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SSDã¨HDDã®æœ¬å½“ã®ã‚¢ã‚¯ã‚»ã‚¹é€Ÿåº¦ã‚’ã€FPGAã§å°‚ç”¨ãƒãƒ¼ãƒ‰ã‚¦ã‚§ã‚¢ã‚’ä½œã£ã¦æ¸¬ã£ã¦ã¿ãŸ - ãªã²ãŸãµJTAGæ—¥è¨˜
é–‹ç™ºä¸ã®SerialATAã®IPã‚³ã‚¢ã‚’ç”¨ã„ã¦ã€HDDã¨SSD(Solid State Drive)ã®ã‚¢ã‚¯ã‚»ã‚¹é€Ÿåº¦ã®æ¯”è¼ƒã‚’è¡Œã£ã¦ã¿ã¾ã—ãŸã€‚ ãƒ‘ã‚½ã‚³ãƒ³ã«ã¤ãªã„ã§ãƒ™ãƒ³ãƒãƒžãƒ¼ã‚¯ã‚½ãƒ•ãƒˆã§æ¸¬ã‚‹ã®ã§ã¯ãªãã€FPGAã§ä½œã£ãŸå°‚ç”¨ã®ãƒãƒ¼ãƒ‰ã‚¦ã‚§ã‚¢ã§æ¸¬ã‚Šã¾ã™ã€‚ã ã‹ã‚‰ãƒ‘ã‚½ã‚³ãƒ³ã®æ€§èƒ½ã«å·¦å³ã•ã‚Œãšã€ãƒ‰ãƒ©ã‚¤ãƒ–ã®çœŸã®å®ŸåŠ›ãŒæ¸¬ã‚Œã‚‹ã ã‚ã†ã¨æ€ã†ã‚ã‘ã§ã™ã€‚ ä¸‹ã®å†™çœŸã¯å®Ÿé¨“ç’°å¢ƒã®ã‚»ãƒƒãƒˆã‚¢ãƒƒãƒ—ã§ã™ã€‚EXPARTAN-6Tã¨ã„ã†ã€XILINX FPGAã®è©•ä¾¡ãƒœãƒ¼ãƒ‰ã«SATA IPã‚³ã‚¢ã‚’å…¥ã‚Œã¦å‹•ã‹ã—ã¦ã„ã¾ã™ã€‚ ä½¿ã£ãŸHDDã¯Hitachiã®HDS721050CLA362ã¨ã„ã†ã‚‚ã®ã§500GBã®å®¹é‡ãŒã‚ã‚Šã¾ã™ã€‚æœ€å¤§ã‚»ã‚¯ã‚¿æ•°ã¯976,773,168ã§ã™ã€‚ ãã‚Œã«å¯¾ã—ã¦SSDã¯OCZã®Vertex PLUSã¨ã„ã†ã‚‚ã®ã§60GBã®å®¹é‡ãŒã‚ã‚Šã¾ã™ã€‚æœ€å¤§ã‚»ã‚¯ã‚¿æ•°ã¯11,7231,408ã§ã™ã€‚ ã„ãšã‚Œã‚‚ã€DMAãƒ¢ãƒ¼ãƒ‰ã§è»¢é€ã—ã¾ã™ã€‚1å›žã®ãƒ–ãƒãƒƒã‚¯ã¯6
nsyee 2014/03/24
FPGA

SSD
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Xilinx Highlights All Programmable FPGA-Based Application Acceleration Solutions at Linley Data Center Conference 2014 - Feb 3, 2014
Xilinx Highlights All Programmable FPGA-Based Application Acceleration Solutions at Linley Data Center Conference 2014 Feb 3, 2014 SAN JOSE, Calif., Feb. 3, 2014 /PRNewswire/ -- Xilinx, Inc. (NASDAQ: XLNX) will highlight All Programmable FPGA-based application acceleration solutions at the Linley Data Center Conference 2014. Â Xilinx techno logy experts will present and demonstrate solutions includi
nsyee 2014/03/16
FPGA
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ã€ã‚»ãƒƒã‚·ãƒ§ãƒ³æ¦‚è¦ã€‘ãƒ‡ãƒ¼ã‚¿å‡¦ç†ã‚’é«˜é€ŸåŒ–ã™ã‚‹æ‰‹æ®µã¨ã—ã¦ã€å…ˆé€²çš„ãƒ‡ãƒã‚¤ã‚¹ã®åˆ©æ´»ç”¨ãŒæœ‰æœ›ã‹ã¤æ€¥å‹™ã§ã‚ã‚‹ã“ã¨ã¯è«–ã‚’ä¿ŸãŸãªã„ã€‚æœ¬ä¼ç”»ã§ã¯ç¬¬ä¸€ç·šã®ç ”ç©¶è€…ã«ã‚ˆã‚‹æœ€æ–°æˆæžœã®è¬›æ¼”ãªã‚‰ã³ã«å°†æ¥å±•æœ›ã«é–¢ã™ã‚‹ãƒ‘ãƒãƒ«ã‚’è¡Œã†ã€‚ æœ¬ä¼ç”»ã¯2éƒ¨æ§‹æˆã§ã‚ã‚‹ã€‚ç¬¬1éƒ¨ã§ã¯å„ç¨®ã®å…ˆé€²çš„ãƒ‡ãƒã‚¤ã‚¹ï¼ˆTileraã€GPGPUã€FPGAï¼‰ã‚’ç”¨ã„ãŸãƒ‡ãƒ¼ã‚¿å‡¦ç†(Stream Data Processingã€MapReduceç‰)ã®åŠ é€ŸåŒ–ã«é–¢ã—ã¦ã€ä¸‰å¥½å¥æ–‡åšå£«ã€åŠ è—¤çœŸå¹³åšå£«ã€æœ¬åº„åˆ©å®ˆåšå£«ã€æ¾è°·å®ç´€åšå£«ã‚’ãŠæ‹›ãã—ã¦æœ€æ–°ã®å¾¡ç ”ç©¶å†…å®¹ã‚’å¾¡è¬›æ¼”é ‚ãã€‚ç¬¬2éƒ¨ã§ã¯é«˜æ€§èƒ½åŒ–æŠ€æ³•ã®æ¨©å¨ã§ã‚ã‚‰ã‚Œã‚‹å¤©é‡Žè‹±æ™´åšå£«ã‚’ãŠæ‹›ãã—ã¦å¾¡è¬›æ¼”é ‚ã„ãŸå¾Œã€å‚åŠ è€…ã«ã‚ˆã‚Šå…ˆé€²çš„ãƒ‡ãƒã‚¤ã‚¹ã«ã‚ˆã‚‹ãƒ‡ãƒ¼ã‚¿å‡¦ç†ã®æœªæ¥ã«ã¤ã„ã¦å¾¡è°è«–é ‚ãã€‚ ã€ç•¥æ´ã€‘1999å¹´æ…¶æ‡‰ç¾©å¡¾å¤§å¦ç†å·¥å¦éƒ¨é›»æ°—å·¥å¦ç§‘å’æ¥ã€‚2005å¹´åŒå¤§å¦å¤§å¦é™¢ç†å·¥å¦ç ”ç©¶ç§‘é–‹æ”¾ç’°å¢ƒç§‘å¦å°‚æ”»å¾ŒæœŸåšå£«èª²ç¨‹ä¿®äº†ã€‚åŒå¹´ã€æ…¶æ‡‰ç¾©å¡¾å¤§å¦ç†å·¥å¦éƒ¨åŠ©æ‰‹ã€‚200
nsyee 2014/03/06
FPGA

event
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nsyee 2014/02/19
FPGA

tutorial

Ad
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FPGAã ï¼ã‚¯ãƒ©ã‚¦ãƒ‰ã ï¼ã‚„ã‚ã£ï¼ã‚„ã‚ã£ï¼(ã¤ã„ã§ã«F#) - ã±ãŸã¸ã
ã•ãã‚‰ã‚¤ãƒ³ã‚¿ãƒ¼ãƒãƒƒãƒˆã®VPSã«FPGAã®é–‹ç™ºç’°å¢ƒã‚’å…¥ã‚ŒãŸè¨˜éŒ²ã§ã™ã€‚ã©ã“ã§ã‚‚FPGAã¨F#ã®é–‹ç™ºãŒã§ãã‚‹ã‚ˆã†ã«ãªã‚Šã¾ã—ãŸã€‚ OSã®ã‚¤ãƒ³ã‚¹ãƒˆãƒ¼ãƒ« ã•ãã‚‰ã‚¤ãƒ³ã‚¿ãƒ¼ãƒãƒƒãƒˆã¨å¥‘ç´„ã‚’çµã‚“ã ã‚‰OSã‚’å…¥ã‚Œç›´ã—ã¾ã—ãŸã€‚åƒ•ãŒUbuntuã—ã‹ä½¿ãˆãªã„è»Ÿå¼±è€…ãªã®ã§OSã¯Ubuntuã§ã€‚ Ubutuã®ã‚¤ãƒ³ã‚¹ãƒˆãƒ¼ãƒ« VPSã‚³ãƒ³ãƒˆãƒãƒ¼ãƒ«ãƒ‘ãƒãƒ«ã‹ã‚‰OSæŒ‡ã‚¤ãƒ³ã‚¹ãƒˆãƒ¼ãƒ«ã‚’é¸æŠžã—ã€Ubuntu 10.04 i386ã‚’é¸æŠžã—ã¾ã™ã€‚amd64ã‚’å…¥ã‚Œã‚‹ã¨QurtusII(64bit)ç‰ˆã®ã‚¤ãƒ³ã‚¹ãƒˆãƒ¼ãƒ«ãŒçªç ´ã§ãã¾ã›ã‚“ã§ã—ãŸã€‚ç´ ç›´ã«32bitç‰ˆã‚’å…¥ã‚Œã¾ã—ã‚‡ã†ã€‚ OSã®ã‚¤ãƒ³ã‚¹ãƒˆãƒ¼ãƒ«ã®å¾Œã€ãƒ‡ã‚¹ã‚¯ãƒˆãƒƒãƒ—ç’°å¢ƒã‚’å…¥ã‚Œã¾ã™ã€‚ï¼ˆè»Ÿå¼±è€…ãªã®ã§ï¼‰ sudo tasksel install ubuntu-desktop ã“ã®å¾Œå†èµ·å‹•ã‚’ã™ã‚‹ã¨ã€VNCã‚³ãƒ³ã‚½ãƒ¼ãƒ«ã«ã„ã¤ã‚‚ã®ç”»é¢ãŒè¡¨ç¤ºã•ã‚Œã‚Œã°æˆåŠŸã€‚ã•ãã‚‰ã®VNCã‚³ãƒ³ã‚½ãƒ¼ãƒ«ã¯Java6ã§ãªã„ã¨é§„ç›®ãªã®ã§ã€Java7
nsyee 2014/02/19
FPGA

VPS

fsharp

ubuntu
ãƒªãƒ³ã‚¯
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nsyee 2014/02/11
FPGA
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