AIC_Course Outline_Theory_OBE_140318 done

Download as pdf or txt
Download as pdf or txt
You are on page 1of 3

Electrical Engineering

COMSATS Institute of
Department
Information Technology
February, 2018

Analog Integrated Circuits, Analysis & Design


Course code: EEE - 333 (3+1)

Prerequisites:
1) Digital Logic Design (EEE 241)
2) Electronics I (EEE 231).
3) Electronics II (EEE 232).
Course Instructor: Malik Summair Asghar
E-mail: [email protected]
Office: Z-Block, Room 316

Course Catalog Description:


This course is intended to give knowledge and experience in design of analog integrated
circuits (such as amplifiers) for system-on-chip in nano-scale CMOS technologies. In
addition, the course gives a detailed introduction to interconnect design as well as circuit
techniques for on-chip timing, synchronization, and clock generation.
This course deals with the fundamentals of CMOS analog integrated circuits. The major
topics include the characterization of analog integrated circuits in frequency and time
domains (noise, distortion, and slew rate). The building blocks of CMOS analog integrated
circuits including common-source, common-drain, common-gate, cascade, and
differential-pair amplifiers, the mismatches of differential-pair amplifiers and offset
voltage compensation techniques, common-mode feedback, voltage reference circuits,
voltage operational amplifiers, voltage comparators, current mirrors and voltage-controlled
oscillators (ring, LC, relaxation oscillators).

Textbook(s):
1. B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2001.

Reference Books
1. P. Gray, P. Hurst, S. Lewis, and R.G. Meyer, Analysis and Design of Analog
Integrated Circuits.
2. Carusone, Johns, and Martin, Analog Integrated Circuit Design, 2nd edition,
3. John Wiley, 2012.

Course Learning Objective:

The course will focus on the following topics:


 Small and large signal models for analysis of analog integrated circuits.

 Design, analysis, and evaluation of analog CMOS integrated circuits. As a


representative benchmark, various types of amplifiers, current sources, current
mirrors, voltage controlled oscillators, and other versatile circuit building blocks
will be studied. The circuit analyses will take into account non-ideal effects such as
noise and variations in process parameters, supply voltages, and temperature.

Subject: Analog Integrated Circuit Analysis & Design Spring - 2018


 Use of professional circuit simulators in Laboratory like Cadence for design,
analysis, and evaluation of integrated circuits.

 Modeling and design of interconnects. Particularly, studies on transmission lines


for high-speed on-chip and off-chip communications.

 On-chip timing and synchronization techniques, including studies on clock- and


data-recovery circuits and systems such as phase- and delay-locked-loops.

Course Learning Outcomes:

The learning outcomes for this course are as follows. After successfully completing the
course, the students will be able to:

1. Describe physics of MOSFET’s needed for a basic analog design, by developing


simplified models to know underlying operations. (C2-PLO1)

2. Analyze low-frequency characteristics of single-stage amplifiers and differential


amplifiers. Have indebt knowledge and skill in analysis, design, and evaluation of
analog integrated circuits such as amplifier, current sources and current mirrors.
(C4-PLO2)

3. Employ small and large signal models for analysis of analog integrated circuits
such as amplifier, current sources and current mirrors. (C3-PLO2)

4. Investigate high-frequency response of amplifiers, differential amplifiers and


current mirrors. Analyze the limitations of frequency response. (C4-PLO3).

Learning Outcomes Assessment Plan:

Sr. # Course Learning Outcomes Assessment


1. 1, Assignment No. 1
2. 2 Assignment No. 2
3. 3 Assignment No. 3
4. 4 Assignment No. 4
5. 1 Quiz No. 1
6. 2 Quiz No. 2
7. 3 Quiz No. 3
8. 4 Quiz No. 4
9. 1,2 Sessional No. 1
10. 2,3 Sessional No. 2
11. 1,2,3, 4 Terminal Examination

Course Learning Outcomes mapped to Standard Program Learning Outcomes:

CLOs /
1 2 3 4 5 6 7 8 9 10 11 12
PLOs
1 C2
2 C4
3 C3
4 C4

Subject: Analog Integrated Circuit Analysis & Design Spring - 2018


Assessment Plan:

Theory Quizzes(4) 15%


Homework assignments 10%
2 Sessional exams (in class, 60-80 minutes each, 25%
(10%+15%)
Terminal exam (3 hours) 50%
Total (theory) 100
%
Lab work Lab reports (12) 25%
2 Lab sessionals 25%
Lab project and terminal exam 50%
Total (lab) 100
%
Final marks Theory marks * 0.75 + Lab marks * 0.25

Course Outline and Contents:

Week 01  Introduction,
 Basic MOS Physics
Week 02  MOS I/V Characteristics
 Second-order effects
Week 03  MOS Device Models
Week 04  Single Stage Amplifiers
 Common Source Stage
Week 05  Source Follower
 Common Gate Stage
Week 06  Cascode Stage
 Differential Amplifiers
Week 07  Differential Amplifiers(continued)
 Common-Mode response
Week 08  Basic Current Mirrors
 Cascode Current Mirrors
Week 09  Active Current Mirrors
 Active Current Mirrors(Continued)
Week 10  Frequency response of Amplifiers
 Common Source Stage
Week 11  Source Followers
 Common Gate Stage
Week 12  Cascode Stage
 Differential Stage
Week 13  Noise
Week 14  Feedback
Week 15  Special Topics (PLL, Oscillators etc.).
Week 16  Revision, Students problem solution

Subject: Analog Integrated Circuit Analysis & Design Spring - 2018

You might also like