College of Engineering: Laboratory Manual
College of Engineering: Laboratory Manual
College of Engineering: Laboratory Manual
M2H624929
1.
2019 - 2020
LABORATORY MANUAL
Semester B
Lab Instructor
Ms. Halima Al Ghafri
Ms. Aziza Al Toubi
S No Title Page No
List of Experiments 3
Preface 4
1 Module Details 5
3 Syllabus 5
4 Learning Outcomes 6
7 Assessment Strategy 8
Experiments 12-39
Electronic and Measurement Lab- M2H624929 (2019 –2020) Rev: 01 Semester: B 2|Page
List of Experiments
Page
Sl.No Title of the experiment
No:
6 Familiarization of Flip-Flops 29
This lab manual is intended to provide you with a concise guide in respect of Electronic and
Measurement Lab (M2H624929). This manual provides you with the information related to all
the experiments to be conducted and it remains as a course guide to achieve the module
objective. It is recommended that the students go through the text books and references
mentioned so as to have a detailed understanding of the module. In this module handbook,
you will find information and advice that will be helpful for you as you progress through the
module.
Grateful acknowledgement is made to all the authors whose works have been cited as
examples from their books, journals and projects.
1. Module Details
BEng
Honours in Electronic and Electrical and
Level 2
Electrical M2H624929 Measurement 10 Electronic
Semester B
Power Lab Measurements
Engineering
The aim of this lab module is to develop the practical skills of the students in accordance
with theoretical knowledge and understanding they have gained in Electronic Engineering
module and Electrical and Electronic Measurements module. Hands on experiments enable
the students to relate theoretical concepts to practical experience. The students acquire
practical knowhow regarding the operation of various analog and digital circuits as well as the
different measurement techniques used.
3. Syllabus
This module will be delivered through 2 contact hours per week, which will solely be devoted
for laboratory exercises.
6. Weekly teaching schedule
Date of
Week
commencem Lab exercise Remarks
No.
ent of week
1 23 Feb 20 Module and Lab Induction.
2 01 Mar 20 Zener Diode as Voltage Regulator Lab Expt. 1
3 08 Mar 20
Transistor Characteristics (Simulation) Lab Expt. 2. Submission of lab
report 1.
4 15 Mar 20
Operational amplifier – Inverting & non- Lab Expt. 3. Submission of lab
inverting (Simulation) report 2.
First Order Active High Pass Filter (OR)
5 22 Mar 20 Lab Expt. 4. Submission of lab
Wien Bridge Oscillator using Operational report 3.
amplifier
Lab Expt. 5. Submission of lab
6 29 Mar 20 Design of Combinational digital circuits - 1 report 4.
10 03 May 20
Design of a lamp flasher using an IC 555 Lab Expt. 7. Submission of lab
timer. report 6.
Study of temperature measurement with
thermocouple (OR)
11 10 May 20 Lab Expt. 8. Submission of lab
report 7.
Study of displacement sensing using linear
variable displacement transformer(LVDT)
12 17 May 20 Practice lab session / End - Term Submission of lab report 8.
Cooper W.D. & Helfrick A.D, 2002. Modern Electronic Instrumentation and Measurement
R1
Techniques. 5th edition. New Delhi: Prentice-Hall India. (P) Ltd.
Golding E.W and.Widdis F.C, Electrical Measurement and Measuring Instrument. 5 th edition.
R2
India: A.H.Wheeler &Co. (P) Ltd
Marks
Sl. No. Type of assessment Description Weightage
(Maximum)
Overall 100%
Pass Requirement
(Minimum Marks) Students should obtain a minimum of 50% marks for passing in this module.
Each lab experiment will be evaluated based on the lab report submitted by the student and
their performance in the lab.
Guidelines and Instructions regarding lab work and submission of lab report:
1. All laboratory exercises are mandatory and students should not miss any lab session.
2. Student should prepare lab reports for each experiment and submit them in the week
following each lab session. Late submissions will not be accepted.
7. Upon completion of all the experiments, the lab reports should be consolidated and
submitted in CCELearn.
8. The lab reports along with students’ performance in the lab will together account for 50%
of the continuous assessment.
IN CASE OF SHOCK
In case of shock from equipments, appliances, or outlet extensions, the victim should
be freed from contact with the electricity by turning off the supply switch or by removing the
plug from its receptacle. If the switch or receptacle cannot be quickly located, the suspected
electrical device may be pulled free of the victim. Other persons arriving on the scene must be
clearly warned not to touch the suspected equipment until it is de-energized.
The injured person should be pulled free of contact with stationary equipment (such as a
bus bar) if the equipment cannot be quickly deenergized or if the survival of others relies on
the electricity and prevents immediate shutdown of the circuits. This can be done quickly and
easily by carefully applying the following procedures:
2) Use a dry board, belt, clothing, or other available nonconductive material to free the
victim from electrical contact.
3) Do NOT touch the victim until the source of electricity has been removed.
Once the victim has been removed from the electrical source, it should be determined whether
the person is breathing. If the person is not breathing, a method of artificial respiration is to be
provided.
The following general rules and precautions are of supreme importance and are always to be
followed in laboratories. These rules are for the safety of experimenters, observers and other
people in the lab.
Execution of Lab work in a safe manner is even more important than performing accurate
measurements and construction of neat circuits. The first step is always to become familiar
with the Lab itself. You should know where the fire extinguishers are and where the
emergency exits is located. Equally important is the location of nearest phone to call for help.
You should also know all equipments and substances that are used in the Lab to take the
necessary precautions.
1. Keep the work area and workbench clean and clear from unwanted items and items not
used in the experiment.
2. All connecting wires and cables should be carefully arranged so that people will not step
or trip over them.
3. Make sure that all the connections are in agreement with the approved circuit diagram.
Never make changes of connections or wiring on live circuits.
4. DOUBLE CHECK circuits for proper connections and polarity prior to applying the power.
Observe POLARITY when connecting polarized components or test equipment into a
circuit, especially with electrolytic capacitors.
5. While making connections, connect the power source at the last. While disconnecting,
disconnect the power source at first.
6. Before connecting the power source get your connections checked and approved by your
instructor.
7. Always make sure that the power switch is OFF before plugging into the outlet. Turn
OFF the instruments and equipments and also the mains before plugging into or
unplugging from the outlet.
8. When unplugging a power cord, pull on the plug, not on the cable.
9. When using a multiple range meters always use the higher range first to determine the
feasibility of using lower ranges.
10. Report any damages to equipment, hazards, and potential hazards noticed, to the
laboratory instructor.
11. Before using any specific equipment, refer the instruction manual provided by the
manufacturer of the equipment. Information regarding safe use and possible hazards
should be studied carefully. Use only the tool designed to do the job in hand.
12. While working in Electrical power Lab, always keeps the body, or any part of it, away and
out of the circuit. When making measurements, if it is essential to touch or hold an
instrument, make it a habit to use only one hand at a time. Never touch the circuits by
both hands.
13. Appropriate personal protective clothing must be worn at all times in laboratories and
comply with instructions to students.
14. Don’t wear any loose conductive jewelry and trinkets, including rings, which may come in
contact with exposed circuits. Also avoid wearing long loose ties, scarves, or other loose
clothing while working around moving/ rotating machinery. The possibility exists for such
items to be caught in moving parts.
15. Never work alone in the laboratory. There must be at least two persons in the laboratory
while working on live circuits.
16. Each group is responsible for their Work bench. After the Lab exercise is over, all
equipment should be powered down and all probes, cords, etc. returned to their proper
position. Do not cut and drop wires on the Lab bench. Lose cut wires have caused many
short circuits.
17. Don’t use any ungrounded electrical or electronic apparatus in the laboratory unless it is
double insulated or battery operated.
18. Don’t keep fluids, chemicals, or heated bodies near the instruments and circuits.
19. No open drinks and/or food are allowed near the Lab benches. Spilled drinks have
caused many accidents.
Experiment - 1
ZENER DIODE AS VOLTAGE REGULATOR
Aim: To design and test shunt voltage regulator using Zener diode.
Objectives:
1. To set up the circuit of a shunt voltage regulator using zener diode.
2. To calculate the line regulation and load regulation and to plot the regulation
characteristics.
Pre-lab task:
Collect the datasheet of the Zener diode and identify the various Zener parameters.
Theory:
Voltage regulation is a measure of the circuit’s ability to maintain a constant output voltage
irrespective of the changes in input voltage or load current. The zener diode when operated in
the breakdown or zener region, will maintain a substantially constant voltage for a large value
of current through it. This characteristic permits it to be used as a voltage regulator. The
resistor R1 limits the zener current from exceeding its rated maximum (IZ max).
Load Regulation: It is the change in the regulated output voltage when the load current is
changed from minimum (no load) to maximum (full load). Load Regulation is expressed in
percentage;
% Load Regulation = {(VNL – VFL) / VFL} × 100
Line Regulation: It is defined as the percentage change in output voltage for a change in
input voltage.
% Line Regulation = {(Change in output voltage) / (Change in input voltage)} × 100
Circuit diagram:
Fig. 1
Procedure:
A) Load Regulation
1. Make the connections as per the circuit diagram.
2. Keeping the input voltage Vin constant, measure the load current and load voltage.
3. Repeat Step 2 for various values of load resistance.
4. Plot the load regulation characteristics (Vout Versus IL).
Observations:
Table 1: Load Regulation
10V 680
10V 820
10V 1k
% load regulation,
1 kΩ
1 kΩ
1 kΩ
1kΩ
1kΩ
% line regulation, =
Graph:
Conclusion:
Experiment – 2
Objectives:
To study and plot the input and output characteristics of a Bipolar Junction Transistor
connected in Common emitter configuration using ORCAD Software.
Theory:
A bipolar junction transistor is a semiconductor device with three terminals and two p-n
junctions. The three terminals are emitter, collector and base. A transistor can be connected in
three configurations: Common Base, Common Emitter, and Common Collector.
Common Emitter Configuration: The emitter terminal is made common to the input and
output. The input is applied between the base and emitter and the output is taken across the
emitter and collector.
Input Characteristics: The curve plotted between the base current and the base-emitter
voltage at constant collector- emitter voltage.
Output Characteristics: The curve plotted between collector current and the collector –emitter
voltage at constant base current.
Circuit diagram:
Vbe
R1
470k Vce
R2
1k
Q1
Q2N3904
I1
50uAdc
V1
15Vdc
0
Procedure:
1. Draw the circuit diagram using ORCAD Software. (Refer to Appendix 2 for general
procedure for circuit simulation using ORCAD).
2. The analysis settings for the simulation profile to plot the input characteristics of the
transistor (CE) are as follows:
Analysis Type: DC Sweep
Options – Primary Sweep
>
Sweep Variable: Current Source, Name: I1 (name should be same as in your
schematic)
Sweep Type: Linear > Start Value: 1u
End Value: 100u
Increment: 10u
Options – Secondary Sweep >
Sweep Variable: Voltage Source, Name: V1 (name should be same as in
your schematic)
Sweep Type: Linear > Start Value: 1
End Value: 15
Increment: 5
3. Run the simulation.
4. In the simulation window, select Plot > Axis Settings > X- Axis Variable. Choose the
appropriate X-Axis Variable (Base - Emitter Voltage).
5. From Trace Dropdown Menu, select Add Trace and chose the appropriate Variable (Base
Current).
6. To plot the output characteristics, either create a new simulation profile or edit the already
created simulation profile.
The analysis settings for the simulation profile to plot the output characteristics of the
transistor (CE) are as follows:
Analysis Type: DC Sweep
Options – Primary Sweep
>
Sweep Variable: Voltage Source, Name: V1 (name should be same as in your
schematic)
Sweep Type: Linear > Start Value: 1
End Value: 15
Increment:
0.5 Options – Secondary Sweep >
Sweep Variable: Current Source, Name: I1 (name should be same as in your
schematic)
Sweep Type: Linear > Start Value: 1u
End Value: 50u
Increment: 10u
Expected Output waveform:
OUTPUT CHARACTERISTICS
INPUT CHARACTERISTICS
Observations:
Conclusion:
EXPERIMENT – 3
Aim: To construct and operational amplifier based inverting and non-inverting amplifier.
Objectives:
To simulate the circuits of op-amp inverting and non-inverting amplifiers using ORCAD
software and to observe the output waveforms.
Theory:
An inverting amplifier is the one in which the input signal is connected to the inverting input
terminal and the non - inverting input terminal is grounded. The output voltage is fed back to
the inverting terminal through the Rf – R1 network, where Rf is the feedback resistor. The
equation for voltage gain of inverting amplifier is
The negative sign indicates a phase shift of 180̊ between the input and the output.
The non - inverting amplifier amplifies without inverting the input signal. The input signal is
connected to the non-inverting terminal and the inverting input terminal is grounded. It also
has a negative feedback system as the output is fed back to the inverting input terminal. The
equation for voltage gain of non-inverting amplifier is
By changing the value of the feedback resistors, we can change the gain of the circuit.
Circuit diagram:
Rf
R2
10k
+Vcc
+Vcc
-Vcc
15Vdc
4
R1
1
V-
- OS1
Vout
2 1k uA741
VOFF = 0 OUT
6
VAMPL = 1 V1 3 5
0 + OS2
FREQ = 1k 7
-Vcc U2 V+
15Vdc
+Vcc
-Vcc 0
Fig. 1 Inverting Amplifier
R2Rf
+Vcc 10k
-Vcc
+Vcc
R1 4
15Vdc V-
2 1
- OS1
10k
uA741OUT
Vout
0
VOFF = 0 5
3 7 OS2
+
V1 U2 V+
-Vcc
0
Procedure:
1. Draw the circuit diagram using ORCAD Software. (Refer to Appendix 2 for general
procedure for circuit simulation using ORCAD).
2. The analysis settings for the simulation profile should be as follows:
Analysis Type: Time Domain (Transient)
Options – General Settings > Modify the run time to 1ms.
3. Run the simulation.
4. In the simulation window, from Trace Dropdown Menu, select Add Trace and chose the
input voltage and output voltage and observe the waveforms.
5. Vary the value of feedback resistor and run the simulation again and observe the
waveforms and note the changes.
Observations:
a) Inverting amplifier
Gain (measured)
Rf V0ut Gain (calculated)
Av= V0/Vin
Av= - Rf/RI
10 k
12 kΩ
Phase shift =
b) Non inverting amplifier
10 k
100 k
Phase shift =
a. Inverting Amplifier
Conclusion:
Experiment – 4
(A) FIRST ORDER ACTIVE HIGH PASS FILTER
Aim: To design and test first order active high pass filter using operational amplifier.
Objectives:
a) To study the circuit of a first order active high pass filter and plot its frequency
response curve and determine the cut off frequency.
b) To compare the theoretical and practical cut off.
Theory:
Filters are frequency selective networks that pass signals within a specified band of
frequencies and blocks or attenuate signals of other frequencies.
High pass filter
High pass filters allow frequency from 0 Hz to some high value (which is known as the
critical frequency,) to pass through the circuit without attenuation and all the other frequencies
are rejected. Critical frequency is the frequency at which the gain reduces to 70.7% of its
maximum value.
In 1st order LPF, only one resistor and capacitor will be present. The critical frequency
is given by the equation fc = 1/2RC. When the applied frequency is greater than the
critical frequency, the output voltage reduces at the rate of –20dB/decade.
Circuit diagram:
Output waveform:
Observations:
Vin = 1 V (peak to peak)
50
100
500
1000
1500
2000
2500
3000
4000
5000
6000
8000
10000
20000
50000
Conclusion:
Experiment - 4
(B) DESIGN OF A WIEN BRIDGE OSCILLATOR USING OP-AMP
Aim: To design and test Wien bridge oscillator using operational amplifier.
Objectives:
To set up a Wien Bridge Oscillator circuit using op-amp, observe the output waveform and
measure its frequency.
Theory:
A Wien bridge oscillator is one of the simplest oscillator circuits which basically consist of an
amplifier connected in its non-inverting configuration with a gain 3 (to satisfy Barkhausen Criteria)
and in which a balanced Wien bridge network is used as the feedback element. The bridge has a
series RC network in one arm and a parallel RC network in the adjoining arm; on the remaining
two arms of the bridge resistors R1 and R2 are connected. The phase angle criterion for the
oscillator is that the total phase shift around the circuit must be 0°. This condition occurs only
when the bridge is balanced. i.e. at resonance. At resonant frequency f r, the attenuation is
minimum.
The attenuation provided by the circuit is 1/3 and the resonant frequency is
Circuit diagram:
R1 = 2 R2 for oscillation
Observations:
R= 1.5kΩ, C =0.1µF
Output Voltage, Time period Frequency Frequency
Sl.No
Vout (in volts) (in ms) measured (1/T) Calculated (1/ 2πRC)
Conclusion:
Experiment 5
DESIGN OF A COMBINATIONAL DIGITAL CIRCUIT
Aim: To construct and test combinational digital circuit.
Objectives:
To build a half adder circuit using logic gates and verify its truth table.
To study the operation binary to gray code converter.
Theory:
Half Adder
A logic circuit used for the addition of two one-bit numbers is referred to as a half adder. It
accepts two binary digits as its inputs and produces two binary digits at the output, a sum bit
(Σ) and a carry bit (Cout). The simplest half-adder design incorporates an XOR gate for the
sum bit and an AND gate for the carry bit. The input variables of a half adder are called the
augend and addend bits.
Logic expression
Circuit Diagram
Procedure
1. Connect the circuit as shown in figure. Refer to the pin diagrams of the given IC’s
(Appendix 1). Connect pin 7 of the IC to GND and pin 14 to VCC.
2. Give the inputs and check for the corresponding outputs.
3. To give Logic 0 at the input, connect the input to GND (pin 7). To give a Logic HIGH,
connect the input to VCC (pin 14).
4. Verify the truth table.
Observations:
Truth Table for Half Adder Circuit
Input Output
A B Cout Sum
0 0
0 1
1 0
1 1
Logic Expression
Conclusion
Experiment 6
FAMILIARIZATION OF FLIP-FLOPS
Aim: To familiarize with the sequential logic circuit and verify the truth tables of J-K and D flip
flops.
Objectives:
To implement a D Flip Flop using NAND Gates and to verify its truth table.
To verify the truth table of J-K and D flip-flop.
Theory:
Flip-flops are synchronous bistable devices and are capable of serving as a one bit memory.
The output changes state only at a specified point on a triggering input called the clock (CLK).
The D flip-flop is useful when a single data bit (1 or 0) is to be stored. D flip-flop has only one
input, in addition to the clock. The output follows the input at the triggering clock edge. A D flip
flop is a bistable circuit in which the Q output always takes the state of the D input at the
moment of a positive edge (or negative edge if the clock input is active low). It is called a D flip
flop since the output takes the value of the D input or Data input and delays it by maximum
one clock count.
Circuit Diagram
Procedure:
1. Connect the circuit as shown in figure. Refer to the pin diagrams of the given IC
(Appendix 1) and Connect pin 7 of the IC to GND and pin 14 to VCC.
2. Give 1 Hz pulse signal from the function generator as the enable signal of the D flip flop.
3. Give logic HIGH at the D input.
4. Observe the outputs Q and record the results. Verify the truth table.
Observations:
Truth Table
The J-K flip-flop is the most versatile of the basic flip-flops. It has the input- following character
of the clocked D flip-flop but has two inputs, traditionally labeled J and K. If J and K are
different then the output Q takes the value of J at the next clock edge. The inputs are labeled
J and K in honor of the inventor of the device, Jack Kilby. (J-K FF IC: 7473)
Procedure:
1. Connect the circuit as shown in figure. Refer to the pin diagrams of the given IC
(Appendix 1).
2. Connect 1 Hz pulse signal from the function generator as clock signal and connect the J-K
/ D inputs as shown in the table.
3. Give a single pulse and observe the out change as the truth table.
4. Observe the outputs Q and /Q for each input and verify the truth table.
Conclusion
Experiment 7
Objectives: To study and design the operation of IC 555 timer as an Astable Multivibrator.
To design a lamp flasher for a given flash rate.
Theory:
A multivibrator is a circuit designed to have zero, one or two stable output states. There are
three types of multivibrator:
Astable multivibrator (Free running multivibrator)
Monostable multivibrator (One-shot multivibrator)
Bistable multivibrator (Flip- Flop)
Astable Multivibrator is a switching circuit that has no stable output state. There are two quasi
stable states. The circuit changes automatically from one quasi stable state to another without
any external triggering pulse, hence it is also called a free running multivibrator. The 555 is a
monolithic timer IC circuit that can produce accurate and highly stable oscillations (square
pulse). It is an IC used in a variety of switching applications.
Circuit Diagram
1. Set up the circuit as shown in Fig.1. The circuit works as an astable multivibrator (free
running square wave generator).
2. Connect pin 3 (output) to channel 1 and pin 6 (Capacitor Voltage) to channel 2 of the
CRO.
3. Observe the output pulses which are being generated at pin 3.
4. Sketch the voltage wave forms at pin 3 and 6.
5. Repeat the above steps for another value of R1: 22 k.
6. Complete the observation table and compare the calculated values of time period,
frequency and duty cycle with the measured values.
Observations
Frequency, F =
3.3 k
22 k
Vc – Capacitor Voltage
Vo – Output Voltage
Expected Output waveform:
Conclusion
Experiment - 8
(a) LVDT
Linear variable differential transformer LVDT is a transducer. Basically it is passive inductive
transformer similar to a potential transformer.
Components required
LVDT Trainer kit, multi meter, CRO
Description
LVDT primary winding is driven by sinusoidal signal of about 1Khz at 2Vpp. Basic oscillator is
constructed around U1 in wein bridge configuration. This sine wave is further fed to the
primary of LVDT. Switch SW1 is used to select LVDT operation as against all other sensors.
Voltage induced in secondary S1 & S2 is rectified by precision rectifier Voltage induced in
secondary S1 & S2 depends on core position which couples primary turns to the number of
secondary turns. Secondaries are connected in Anti series to achieve difference signal. This
difference signal is further amplified by Op-Amp and then phase sensitively rectified. Final
amplifier is provided with zero output adjustment & span adjustment to adjust 0-2V swing. The
computer interface would need (0-2V) unipolar, which can be set using zero pot.
1. Select the required sensor using rotary 6 position switch keeping at correct location (1 st &
DPDT switch SW2 on LVDT)
2. Identify all adjustment controls and supply terminals. Connect +12V DC to the respective
terminals on the panel.
3. Connect CRO to the TP11 test point and observe the amplitude of sine signal around
2Vpp.
4. Adjust micrometer to near zero mark and adjust zero adjustment pot for zero output
voltage on voltmeter.
5. Now move micrometer to extreme right position i.e. near 20mm and adjust output to 2V
with the help of span adjust potentiometer.
6. Move the micrometer towards left as given in table & note down the output voltage on
voltmeter (Digital)
Wiring Sequence
+12V-1, -12V-3, GND-2, VM(+)-6, VM(-)-7
Observation table
Micrometer reading Output voltage Calculated displacement
distance in mm [x 10 = displacement (mm)]
0
5
10
15
:
20
Graph
Plot a graph of distance versus output voltage
Conclusion
(b) Thermocouple (J & K type)
Objective
At the completion of this unit you will be able to understand the working of the
Thermocouple temperature transducer and also plot the graph of characteristic property
against temperature.
Procedure
Circuit diagram for the thermocouple with instrumentation amplifier is as figure. Connect the
test set up as shown below.
220E C7
10K
Room temp
D5 10K
1N4148 220E 2
O/P(V)
36
3
+12V P3 Span
THERMOCOUPLE (K) 1K 10K OP 07
10K
Rf120K
C5
47K 2
1K
47E 2
P1 100E 3 6 U5
OP07
Zero 47E THERMOCOUPLE (J)
Adjustment
For different values of temperature, note down the output of the thermocouple. The gain of
amplifier is so set that output in volts (x100) is same as temperature in 0C. Don't forget that
offset error in temperature control loop will cause here variation in output of TC.
Fill down the following table by observing the output voltage of thermocouple.
Graph
Plot the graph between the temperature and the output voltage.
Conclusion
Appendix -1
g. IC 7474 h. IC 7473
Appendix -2
1. Select ORCAD 16>ORCAD Capture CIS Demo from the Start menu of the computer.
3. Enter the name of the project , create a new project using Analog or mixed A/D. Specify
5. Select the components from the Place > Part tool or from the Status bar at the right most
6. Place the components on the schematic window as per the circuit diagram.
7. Select the Place> Wire tool to connect the components as per the circuit diagram.
8. Double click on the components and change the values as specified in the circuit.
9. From PSPICE dropdown menu, select New Simulation Profile and create a new one by
10. In the simulation settings window, select Analysis type from the drop down menu and
11. Once the new simulation profile is created, you can make necessary changes by
selcting the edit simulation profile from the PSPICE dropdown menu.
12. Select Run from the PSPICE dropdown menu to run the simulation.
13. Adjust the run time by selecting edit run time settings in the simulation dropdown menu
RISK ASSESSMENT
Signature of Student:
Signature of Laboratory Instructor/ Module leader/Tutor:
Date:
Date:
National University, College of Engineering
Department of Electrical and Communication Engineering
Name of Student
Title of Experiment
Date of Submission
Signature: Student