DEPARTMENT

OF
ELECTRONICS & COMMUNICATION ENGINEERING

AC + LIC LABORATORY MANUAL

IV Semester (17EC4DLACL)
Autonomous Course
2018-19

Staff incharges : Sapna P.J.

Navya Holla K., Trupti Tagare.
Lab Instructor : M.S. Puttaraju, G. Padma
HOD : Dr. T.C.Manjunath

Name of the Student :

Semester /Section :

USN :

Batch :

Dayananda Sagar College of Engineering

Shavige Malleshwara Hills, Kumaraswamy Layout,
Banashankari, Bangalore-560078, Karnataka
Tel : +91 80 26662226 26661104 Extn : 2731 Fax : +90 80 2666 0789
Web - http://www.dayanandasagar.edu Email : [email protected]
( An Autonomous Institute Affiliated to VTU, Approved by AICTE & ISO 9001:2008 Certified )
( Accredited by NBA, National Assessment & Accreditation Council (NAAC) with 'A' grade )

1
Dayananda Sagar College of Engineering
Dept. of E & C Engg
Name of the Laboratory : Analog Communication
and Linear Integrated
Circuits Lab
AC + LIC Lab
17EC4DLACL
Semester/Year : IV/2018 & 2019
(Autonomous)

No. of Students/Batch : 20

No. of equipment’s : 20

Major Equipment’s : Digital Storage Oscilloscope

Function generator
Power Supply
Fixed Power Supply
Multi Meter, Bread Boards
Resistance Box
Capacitance Box

Area in square meters : 182.3 Sq mts

Location : Level – 3(Room No. 17215,

17214 )

Total Cost of Lab : Rs. 5,10,000/-

Lab Incharge/s: Mrs. Sapna P.J. / Trupti Tagare

Mrs. Navya Holla K
Instructor : Mr. M.S. Puttaraju, Mrs. G. Padma
HOD : Dr. T.C. Manjunath, Ph.D. (IIT Bombay)

2
About the college & the department
The Dayananda Sagar College of Engineering was established in
1979, was founded by Sri R. Dayananda Sagar and is run by the
Mahatma Gandhi Vidya Peetha Trust (MGVP). The college offers
undergraduate, post-graduates and doctoral programmes under
Visvesvaraya Technological University & is currently autonomous
institution. MGVP Trust is an educational trust and was promoted
by Late. Shri. R. Dayananda Sagar in 1960. The Trust manages 28
educational institutions in the name of “Dayananda Sagar
Institutions” (DSI) and multi – Specialty hospitals in the name of
Sagar Hospitals - Bangalore, India. Dayananda Sagar College of
Engineering is approved by All India Council for Technical
Education (AICTE), Govt. of India and affiliated to Visvesvaraya
Technological University. It has widest choice of engineering
branches having 16 Under Graduate courses & 17 Post Graduate
courses. In addition, it has 21 Research Centres in different
branches of Engineering catering to research scholars for
obtaining Ph.D under VTU. Various courses are accredited by NBA
& the college has a NAAC with ISO certification. One of the vibrant
& oldest dept is the ECE dept. & is the biggest in the DSI group
with 70 staffs & 1200+ students with 10 Ph.D.’s & 30+ staffs
pursuing their research in various universities. At present, the
department runs a UG course (BE) with an intake of 240 & 2 PG
courses (M.Tech.), viz., VLSI Design Embedded Systems & Digital
Electronics & Communications with an intake of 18 students each.
The department has got an excellent infrastructure of 10
sophisticated labs & dozen class room, R & D centre, etc…

3
Vision and Mission of the Institute:
Vision:
 To impart quality technical education with a focus on Research and
Innovation emphasizing on Development of Sustainable and Inclusive
Technology for the benefit of society.

Mission:
 To provide an environment that enhances creativity and Innovation in
pursuit of Excellence.
 To nurture teamwork in order to transform individuals as responsible
leaders and entrepreneurs.
 To train the students to the changing technical scenario and make them
to understand the importance of sustainable and inclusive
technologies.

Vision and Mission of the Department

Vision :
 To achieve continuous improvement in quality technical education for
global competence with focus on industry, societal needs, research and
professional success.

Mission:
 Offering quality education in Electronics and Communication
Engineering with effective teaching learning process in
multidisciplinary environment.
 Training the students to take-up projects in emerging technologies and
work with team spirit.
 To imbibe professional ethics, development of skills and research
culture for better placement opportunities.

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PROGRAM EDUCATIONAL OBJECTIVES (PEOs):

After four years, the students will be

PEO1 : ready to apply the state-of-art technology in industry and meeting the
societal needs with knowledge of Electronics and Communication
Engineering due to strong academic culture.
PEO2 : competent in technical and soft skills to be employed with capability
of working in multidisciplinary domains.
PEO3 : professionals, capable of pursuing higher studies in technical,
research or management programs.

PROGRAM SPECIFIC OBJECTIVES (PSOs):

Students will be able to

PSO1 : Design, develop and integrate electronic circuits and systems using
current practices and standards.
PSO2 : Apply knowledge of hardware and software in designing Embedded
and Communication systems.

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PROGRAM OUTCOMES (POs)

PO1: Engineering Knowledge.

PO2: Problem Analysis.

PO3: Design Development of solutions.

PO4: Conduct investigations on complex problems.

PO5: Modern tool usage.

PO6: The Engineer and Society.

PO7: Environment and Sustainability.

PO8: Ethics.

PO9: Individual and team work.

PO10: Communication.

PO11: Project management and finance.

PO12: Life Long learning.

COURSE OBJECTIVES:

1. To understand and design active second order Butterworth high pass

and low pass filters.
2. To design and study the operation of Schmitt trigger, R-2R DAC using
op-amp.
3. To design and analyze Multi-vibrators using 555 Timers.
4. To Design and analyze Precision Rectifiers using op-amp.
5. To understand the concepts of different analog modulation
techniques.
6. To analyze analog systems for FM operations.

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COURSE OUTCOMES:

At the end of the course, student will be able to

CO1 Design filters for different cut-off frequencies.

CO2 Model Precision Rectifiers using op-amp
CO3 Design op-amp Schmitt trigger for given specification.
Design and test the performance of Multi-vibrators for specified
CO4
pulse width/duty cycle.
Apply the knowledge of network circuits to convert the signals from
CO5
digital to analog.
CO6 Analyze different analog and pulse modulation techniques.

Mapping of Course outcomes to Program outcomes

PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12

CO1 3 2 2 - - - - - 2 2 - -

CO2 3 2 - - - - - - 2 2 - -

CO3 3 2 2 - - - - - 2 2 - -

CO4 3 2 2 - - - - - 2 2 - -

CO5 3 2 - - - - - - 2 2 - -

CO6 3 2 - - - - - - 2 2 - -

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ANALOG COMMUNICATION AND LINEAR INTERGRATED CIRCUITS LAB

Course code : 17EC4DLACL Credits: 2 & 2 hrs per lab

L:P:T:S: 1:2:0:0 CIE Marks: 50

Exam Hours : 3 SEE Marks: 50

EXPT Course Content Hours COs

1 Second order active LPF and HPF 02 CO1
2 Second order active BPF and BEF 02 CO1
Schmitt Trigger Design and test a Schmitt trigger circuit
3 02 CO3
for the given values of UTP and LTP
4 Design and test R-2R DAC using op-amp 02 CO5
Design and test the following circuits using IC 555
a. Astable Multivibrator for given frequency and duty
5 02
cycle CO4
b. Monostable Multivibrator for given pulse width W.
Amplitude modulation using transistor (Generation and
6 02 CO6
detection)
7 Pulse Amplitude Modulation and Detection 02 CO6
8 Pulse Width Modulation and Pulse Position Modulation 02 CO6
9 Frequency modulation using 8038/2206 02 CO6
10 Precision rectifiers – both Full Wave and Half Wave 02 CO2

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Cycle of experiments
No. Title Page No
CYCLE - 1
1 Second order active LPF and HPF. 12
2 Second order active BPF and BEF. 19
3 Design and test R-2R DAC using op-amp. 25
Amplitude modulation using transistor (Generation
4 29
and detection).
5 Pulse Amplitude Modulation and Detection. 33
Design and test the following circuits using IC 555.
a) Astable Multivibrator for given frequency and duty 38
6
cycle.
b) Monostable Multivibrator for given pulse width W. 44
CYCLE - 2
7 Precision rectifiers-both Full Wave and Half Wave. 48
8 Pulse Width Modulation. 54
9 Pulse Position Modulation. 57
10 Frequency modulation using 8038. 61
Schmitt Trigger Design and test a Schmitt trigger
11 66
circuit for the given values of UTP and LTP.

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DO’s
 Students should follow the dress code of the laboratory compulsorily.
 Keep your belongings in the corner of the laboratory.
 Students have to enter their name, USN, time in/out and signature in the
log register maintained in the laboratory.
 Students are required to enter components in the components register
related to the experiment and handle the equipment’s smoothly.
 Check the components, range and polarities of the meters before connecting
to the circuit.
 Come prepare for the experiment and background theory.
 Before connecting to the circuit refer the designed circuit diagram properly.
Debug the circuit for proper output.
 Students should maintain discipline in the laboratory and keep the
laboratory clean and tidy.
 Observation book and Record book should be complete in all respects and
get it corrected by the staff members.
 Clarify the doubts with staff members and instructors.
 Experiment once conducted, in the next lab, the entire record should be
complete in all respects, else the student will lose the marks.
 For programming lab, show the output to the concerned faculty.
 All the students should come to LAB on time with proper dress code and
identity cards
 Keep your belongings in the corner of laboratory.
 Students have to enter their name, USN, time-in/out and signature in the
log register maintained in the laboratory.
 All the students should submit their records before the commencement of
Laboratory experiments.
 Students should come to the lab well prepared for the experiments which are
to be performed in that particular session.
 Students are asked to do the experiments on their own and should not waste
their precious time by talking, roaming and sitting idle in the labs.
 Observation book and record book should be complete in all respects and it
should be corrected by the staff member.
 Before leaving the laboratory students should arrange their chairs and leave
in orderly manner after completion of their scheduled time.

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 Prior permission to be taken, if for some reasons, they cannot attend lab.
 Immediately report any sparks/ accidents/ injuries/ any other untoward
incident to the faculty /instructor.
 In case of an emergency or accident, follow the safety procedure.
 Switch OFF the power supply after completion of experiment.

DONT’s
 Do not switch on the power supply before verification of the connected
circuits by concerned staff.
 Do not feed higher voltages than rated to the device.
 Do not upload, delete or alter any software on the laboratory PC’s.
 Do not write or mark on the equipment’s.
 Usage of mobile phone is strictly prohibited.
 Ragging is punishable.
 If student damages the equipment or any of the component in the lab, then
he / she is solely responsible for replacing that entire amount of the
equipment or else, replace the equipment.
 The use of mobile/ any other personal electronic gadgets is prohibited in the
laboratory.
 Do not make noise in the Laboratory & do not sit on experiment table.
 Do not make loose connections and avoid overlapping of wires.
 Don’t switch on power supply without prior permission from the concerned
staff.
 Never point/touch the CRO/Monitor screen with the tip of the open.

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Experiment No. : 1 Date : / / .

ACTIVE LOW PASS AND HIGH PASS FILTER (2nd ORDER)

Aim : To design a 2nd order low pass and high pass filter and to draw the
frequency response.

Apparatus/Components required:
Op-amp IC741, Resistors, Capacitors, Power supply, Signal generator, CRO

Theory: A filter is frequency selective circuit that passes a specified band of

frequencies and blocks signals of frequencies outside this band. Filters may
be classified as follows. Analog & Digital, Passive & Active, Audio frequency &
Radio frequency filters. Depending on the elements used in construction,
filters may be classified as passive and active. Elements used in passive filters
are: Resistors, Capacitors and Inductors, and in active filters Op-amps or
Transistors are used along with resistors and capacitors. There are many
advantages of using active filters:

a) Since opamp is used in the construction of active filter, there is flexibility

in gain and frequency adjustment.
b) Since opamp input impedances is infinite, no loading problem on filter
characteristics.
c) This is applicable over a wide range of frequency.
d) This is cheaper in cost wise since big inductors are not used.

Working of the circuit: At low frequencies the reactance of the capacitor is

high, hence capacitor acts as open circuit and all low frequency signals are
passed and hence filter has a constant gain from 0 Hz to high cut off frequency
Fh, the gain decreases with increase in frequency and at Fh the gain is down
by 3dB. A high pass filter does not pass any signal up to lower cutoff FL, after
FL gain increases with increase in frequency. 2nd order filter have roll of 40
dB/decade, i.e., the gain increases or decreases at the rate of 40 dB/decade

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in the stop band. Active filters are mainly used in the field of DSP, Radio, T.V.
and Radar.

Design :
1
Fh 
2 R3 R2 C3C 2

Let R3  R2  R & C3  C2  C

1 1
Fh  
2  R 2C 2 2 R C

Let Fh = 1 KHz & C = 0.01 μF

1
Fh 
2  Fh C
R = 15.9 K
Rf
A  1
R1
For 2nd order filter, A = 1.586
R1 = 10 K
 Rf = 5.86 K
Procedure:
1) Connections are made as per the circuit diagram.
2) Input voltage (Vi ) of amplitude 1 V/2 V is applied from the signal
generator.
3) Input frequency is varied in steps from 10 Hz to 100 KHz and
corresponding output voltage (V0) is noted.
4) Gain in dB is calculated by using equation 20 log10 (V0/Vi).
5) Graph of Frequency versus Gain in dB is plotted in semi log sheet and
roll off is calculated which is approximately equal to 40 dB/decade.

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Circuit Diagram : Active Low Pass Filter

Fig. : Active Low Pass Filter

Frequency Response

Fig. : Frequency Response

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Tabular Column:
Input voltage : Vi = 1 V or 2 V
Frequency in Hz Output Voltage V0 (V) Gain dB = 20 log10 (V0/Vi)
100 Hz

15 KHz

Results :
The experiment was conducted successfully, the frequency response is
drawn and the roll off factor is calculated.
Roll off factor for LPF = __________________

Applications:
1.
2.
3.
4.

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ACTIVE HIGH PASS FILTER

Design:
1
F1 
2π RC
Let F1 = 1 KHz, C = 0.01 μF
1
R  15.9 K
2 π C F1

Rf
A  1
R1
For 2nd order filter, A = 1.586
Let R1 = 10 K, therefore Rf = 5.86 K

Circuit Diagram : ACTIVE HIGH PASS FILTER

Fig.: Active high pass filter

Frequency Response

Fig. : Frequency Response

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Tabular Column:
Input voltage: Vi = 1 V or 2 V
Frequency in Hz Output Voltage V0 (V) Gain dB = 20 log10 (V0/Vi)
50 Hz

5 KHz

Results:
The experiment was conducted successfully, the frequency response is
drawn and the roll off factor is calculated.
Roll off factor for HPF = __________________

Applications:
1.
2.
3.
4.

Remarks:

Signature of staff incharge with date:

17
Probable viva questions:
1. Define a filter. How are filters classified?
2. Define gain, stop band and pass band of a filter.
3. Explain the operation of a second order High pass filter.
4. Explain the operation of a second order Low pass filter.
5. How can a first order low pass filter can be converted into second order
low pass filter.
6. What is Roll off factor of filter ?
7. What is the pass band voltage gain of a second order low pass
butterworth filter.

References:
1. http://www.nptel.ac.in/courses/117107094/lecturers/lecture_16/lect
ure16_page1.htm
2. http://textofvideo.nptel.iitm.ac.in/122106025/lec37.pdf

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Experiment No. : 2 Date : / / .

ACTIVE BAND PASS AND BAND REJECT FILTER (2nd ORDER)

Aim: To design a 2nd order band pass and band reject filter and to draw the
frequency response.

Apparatus/Components required:
Op-amp IC741, Resistors, Capacitors, Power supply, Signal generator, CRO.

Theory:
The band pass filter has pass band between two cut-off frequencies F2 and Fl
such that F2 > Fl. There are two types of band pass filters, namely wide band
and narrow band pass filter. A filter is defined as wide band pass filter if its
figure of merit or quality factor Q < 10 and also Af < 2Q².The band reject filter
is also called Band elimination filter and in this filter frequencies are
attenuated in the stop band while they are passed outside this band. The
narrow band reject filter is also called notch filter and it is mainly used in
rejection of single frequency such as 60 Hz power line frequency used in power
line.

Design:
Let
FC = 5 KHz & C1 = C2 = C = 0.001 µF
B.W. = 500 Hz & Af = 5
FC
Q= = 10
BW
Q
R1 = = 63.66 KΩ
2 π FC C A f

Q
R2 = = 1.6 KΩ

2 π FC C 2Q 2  Af 
Q
R3 = = 636.6 KΩ
π FC C

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Procedure:
1. Connections are made as per the circuit diagram.
2. Input voltage (Vi) of amplitude 1 V-2 V is applied from the signal generator.
3. Input frequency is varied in steps from 10 Hz to 100 KHz and
corresponding output voltage (V0) is noted.
4. Gain in dB is calculated by using equation 20 log10 (V0/Vi).
5. Graph of frequency versus gain in dB is plotted in semi log sheet.

Circuit Diagram:

ACTIVE BAND PASS FILTER

Frequency Response:

20
Tabular Column:

Input voltage : Vi = 1V or 2V

Frequency in Hz Output Voltage V0 (V) Gain dB = 20 log10 (V0/Vi)

1K Hz

10K Hz

ACTIVE BAND REJECT FILTER

Design:
Let
FC = 100 Hz
C = 0.1 µF
B.W. = 10 Hz
1
FC 
2π RC

1
R  15.9 KHz
2 π FC C

Choose R1 = R2 = R = 15 KΩ
C1 = C2 = C = 0.1 μF
and C3 = 2C = 0.001 μF
R
R3 = = 8 KΩ ≈ 10 KΩ
2

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Procedure:

1. Connections are made as per the circuit diagram.

2. Input voltage (Vi) of amplitude 1 V - 2 V is applied from the signal
generator.
3. Input frequency is varied in steps from 10 Hz to 100 KHz and
corresponding output voltage (V0) is noted.
4. Gain in dB is calculated by using equation 20 log10 (Vo/Vi).
5. Graph of frequency versus gain in dB is plotted in semi log sheet.

Circuit Diagram:

Frequency Response:

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Tabular Column:

Input voltage : Vi = 1 V or 2 V
Frequency in Hz Output Voltage V0 (V) Gain dB = 20 log10 (V0/Vi)
10 Hz

300 Hz

Results: The experiment was conducted & the frequency response is drawn

Bandwidth of BPF was ________

Applications:
1.
2.
3.
4.

Remarks :

Signature of staff incharge with date:

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Probable viva questions:

1. What is band pass filter ? Which are the 2 types of BPF?

2. What is a notch filter?
3. Give some applications of filters as applied to communication.
4. What is the difference between Butterworth and Chebyshev filter?
5. Draw the frequency response of a band elimination filter?
6. What is all pass filters? What is its application?

References:

1. http://nptel.ac.in/courses/117107094/15

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Experiment No. : 3 Date : / / .

DESIGN AND TEST R-2R DAC USING OP-AMP

Aim: To study the operation of 4 bit DAC using R-2R ladder network and to
generate staircase wave using DAC circuit.

Apparatus/Components required: Resistors, Breadboard, Multimeter, Op-

amp [μA 741], Connecting wires, Power supply.

Theory: A ladder is a series/parallel resistor network. An R-2R ladder type

DAC is Shown in the figure. It needs only 2 values R and 2R. Here D0, D1, D2
and D3 are electronic switches, which are digitally controlled. When 1 is
present on the MSB line, switch D3 connects the resistor 2R to Vref, conversely
when 0 is present on the MSB line, the resistor 2R is connected to ground.
Since the ladder is composed of linear resistors, it is a linear n/w and the
principal of superposition can be used. This means that the total o/p voltage
due to a combination of i/p digital levels can be found by simply taking the
sum of the o/p that are caused by each of the many digital i/p’s, all acting
individually.

Design:
 Op-amp voltage follower acts as buffer stage.
 D0, D1, D2 and D3 are digital I/P may be low (0) or high (1).
 VR (0) = 0 Volts
 VR (1) = VR = reference voltage can be selected depending on maximum
analog o/p voltage required.
 If the digital i/p are obtained from a digital IC trainer then VR = +5 V
fixed.
 The analog voltage V0 for a 4 bit DAC is given as

  V   2 R 
V0  23 D3  2 2 D2  21 D1  2 0 D0 . R4    
 2   3R 
 If VR = +5 volts, then

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5
  2
V0   4 . 23 D3  22 D2  21 D1  20 D0 . 
2  3
Procedure:
1. Rig up the circuit as per the circuit diagram.
2. Switch on the supply and apply the DC reference voltage of +5V for logic
1 and 0 for logic 0.
3. Vary them in stage from 0000 to 1111 as shown in the tabular column
and measure the corresponding voltage using multi meter.
4. Readings are tabulated and verified

Circuit Diagram :

Waveform :

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Tabular Column :
Decimal no Digital i/p Theoretical value Expt value
0 0000 0
1 0001 0.20883
2 0010 0.4166
3 0011 0.625
4 0100 0.833
5 0101
6 0111
7
8
9
10
11
12
13
14
15 1111

Results:
R-2R DAC is designed and tested.
The theoretical and experimental values of O/P voltage are compared.

Applications:
1.
2.
3.
4.

Remarks :

Signature of Staff Incharge with date:

27
Probable viva questions:
1. What is the difference between A/D and D/A converters ?
2. Explain R/2R ladder technique of D/A conversion.
3. What are the different types of D/A conversion ?
4. Why the switches used in weighted resistor DAC are of single pole double
throw (SPDT) type ?
5. What is the disadvantage of binary weighted type DAC ?

References:
1. “Operational Amplifiers and Linear IC’s”, David A. Bell, 2nd edition,
PHI/Pearson, 2004.

28
Experiment No. : 4 Date : / / .

AMPLITUDE MODULATION USING TRANSISTOR

(GENERATION AND DETECTION)

Aim:
1. Design and construct collector Amplitude modulator for given carrier
frequency 500 kHz and modulating frequency 1 kHz.
2. Study the variation in the modulation index as a function of
modulating voltage.
3. Display the amplitude modulator output and trapezoidal pattern &
to determine depth of modulation.

Apparatus/Components required: IFT, Transistor (SL100), resistor (470k,

120, 10k), capacitor 0.01 F (2 no’s).

Theory: Amplitude modulation is a type of modulation where the amplitude

of the carrier signal is varied in accordance with the information bearing
signal. The envelope, or boundary, of the amplitude modulated signal embeds
the information bearing signal. The total power of the transmitted signal
varies with the modulating signal, whereas the carrier power remains
constant. Nonlinear device such as a transistor is used to combine the carrier
and the modulating signal to generate an amplitude modulated signal. The
output of the nonlinear device consists of discrete upper and lower sidebands.
The circuit used gives out most efficient high level modulation. Transistor is
operated in Class C mode in which it is biased well below cut off. The carrier
input to base must be sufficient to drive transistor into conduction over part
of RF cycle during which collector current flows in the form of pulses.
Modulation signal m(t) is applied in series with VCC through low frequency
transformer. Modulated output is obtained through IFT.

29
Procedure:
1. Connect the circuit as shown in the figure/circuit diagram.
2. Adjust the frequency of carrier wave around 500 kHz and amplitude 1v (p-
p) to get a undistorted wave.
3. Adjust the frequency of m(t) around 500 Hz to 1 kHz and 10 v(p-p).
4. Feeding Am output to Y plates and modulation signal to X plates of CRO
obtain trapezoidal pattern.
L1  L2
m
L1  L2
where, L1 = Emax, L2 = Emin
5. Keeping carrier amplitude constant vary modulation signal voltage in
Emax  Emin
appropriate steps and measure modulation index, m 
Emax  Emin
6. Tabulate results and draw graph of m v/s modulation voltage amplitude.

Circuit Diagram

30
Waveform:

Tabular Column:

AF input Emax Emin m

Emax  Emin
m
Emax  Emin

Results: The experiment was conducted & the results are tabulated, the
graph is plotted for m v/s modulating voltage (AF input)

31
Applications:
1.
2.
3.
4.

Remarks :

Signature of Staff Incharge with date:

Probable viva questions:

1. What are the basic components of electronic communication ?
2. What is a communication channel? State two types of communication
channel.
3. Define analog and digital signals.
4. What is a carrier signal ?
5. Name the basic types of continuous modulation.
6. What is over modulation ? Why over modulation is not preferred ?
7. How much power will be saved if the carrier of a 100 percent modulated
AM wave is suppressed ?
8. What is the position of the operating point of class-C amplifier used in
collector modulation ?

References:
1. An Introduction to Analog and Digital Communication, Simon Haykins,
John Wiley India Pvt. Ltd., 2008.

32
Experiment No. : 5 Date : / / .

PULSE AMPLITUDE MODULATION AND DEMODULATION

Aim: To conduct an experiment to generate PAM signal and also design a

circuit to demodulate the obtained PAM signal and verify sampling
theorem and Plot relevant Waveforms.

Apparatus/Components required: Transistor, Resistors, Capacitor, Power

Supply, Signal generators, CRO.

Theory: In Pulse Amplitude Modulate (PAM), the amplitude of the periodic

pulses varies with instantaneous sample values of a continuous message
signal. PAM modulator is a simple emitter follower circuit. In the absence of
clock pulse output follows the input base of transistor coupled with
modulating signal and carrier. Amplitude of carrier is kept high to bring
transistor in the cut off region. When pulse signal is high transistor circuit
behaves as an emitter follower and output follows the input-modulating
signal. When the clock signal is low the transition is cut off and output is zero.
PAM demodulator is simple RC low pass circuit where RC time constant has
a cut off frequency of Fm (i.e.,) higher frequency component of modulating
signal. The sampled signal can be recovered exactly when sampling frequency
is equal or greater than twice the highest frequency component of modulating
signal. PAM signal is often used as input to a PCM that will change analog
signals to binary code.

Design :
MODULATOR circuit is designed as follows ….
Let

33
Ic = IE = 0.5 mA, when Q is on,
VCC  VCE 5  2.5
IE  
RE RE
2.5 V
RE   5 K  4.7 K
0.5 mA
IB = I R1 [ with m(t) = 0 ]
IC
IB 

Let 𝛽 = 2
0 .5 m A
IB   250 A
2
VE = IE RE = ( 0.5 × 103 )(5 ×103) = 2.5V
VA = VE + VBE = 3.2V
Vg1  VA 5  3.2
R1    0.0072 
IB 250
R1 = 7.2 K = 10 K
I B 250
IR2    125 A
2 2
VA  Vg2 3.2  1
R2    18 K
IR2 125

Choose R2 = 22 K
Procedure:
1. Before wiring the circuit, check all the components using the multimeter.
2. Rig up the connection as shown in the circuit diagram.
3. Set the C(t) frequency to 2 KHz and amplitude 10V P-P. (Vg1= 5Vpeak)
4. Set the m(t) frequency to 200 Hz and amplitude 2V P-P. (Vg2 = 1V peak)
5. Check the PAM O/P at the emitter by varying the C(t) and m(t)
amplitude if necessary.
6. Rig up the demodulator circuit.
7. Give PAM output as input.
8. To get undistorted m(t) change the C(t) frequency to higher
value; to 10 KHz

34
9. Verification of sampling theorem
a) Over sampling fs > 2fm (fm = 200 Hz, fs = 2 KHz )
b) Under sampling fs < 2fm (fm = 200 Hz, fs = 40 Hz )
c) Correct sampling fs = 2fm (fm = 200 Hz, fs = 400 Hz )

Circuit Diagram :

35
Waveform :

Results: The experiment was conducted & the PAM output is verified.

Applications:
1.
2.
3.
4.

Remarks :

Signature of Staff Incharge with date:

36
Probable viva questions:
1. What is PAM ?
2. What is the difference between AM and PAM ?
3. What is the basic principle of PAM ?
4. Mention the applications of PAM.
5. What is the process of sampling an analog signal.
6. Which multiplexing technique is used in PAM ?
7. What do you mean by Nyquist rate ?

References:
1. Communication Systems, Simon Haykins, 5th Edition, John Willey, India
Pvt. Ltd, 2009.

37
Experiment No. : 6A Date : / / .

DESIGN AND TESTING OF ASTABLE MULTIVIBRATOR FOR THE GIVEN

FREQUENCY AND DUTY CYCLE USING IC 555

Aim: To Design a symmetrical and unsymmetrical astable multivibrator using

IC 555 timer.

Apparatus/Components required: IC555, Resistance 6.8 K & 3.3 K,

capacitance = 0.1 & 0.01 μF.

Theory: IC555, an astable multivibrator and in this mode of operation it

generates rectangular pulses, by suitably modifying the circuit, square wave
can be generated. This circuit can be made to work as square wave generator.
This has 2 o/p states both of this states are quasi-stable states, hence the
name free running oscillator. The multivibrator keeps on switching b/w 2
states by itself and it does not need any external triggering. The circuit
diagram is as shown in the figure. If the time taken by capacitor is equal to
the time for discharge then the TON= TOFF, it is called symmetrical astable
multivibrator and if TON not equal to TOFF, i.e., time taken for charging is not
equal to the time taken for discharging then it’s an unsymmetrical astable
multivibrator.

Working: Initially when the output is high capacitor C starts charging

towards VCC through RA and RB. However as soon as the voltage across the
capacitor equals 2/3 VCC, comparator 1 triggers the flip-flop and the output
switches to low state. Now capacitor C discharges through RB and the
transistor Q1. When voltage across C equals 1/3 Vcc, comparator 2’s output
triggers the flip-flop and the output goes high. Then the cycle repeats. The
capacitor is periodically charged and discharged between 2/3 VCC and 1/3
VCC respectively. The time during which the capacitor charges from 1/3 Vcc to
2/3 Vcc is equal to the time the output remains high and is given by

38
tc = 0.693 (RA + RB) C
where, RA and RB are in ohms and C is in Farads.
Similarly, the time during which the capacitor discharges from 2/3 Vcc to
1/3 Vcc is equal to the time the output is low and is given by
td = 0.693 RB C
Thus, the total time period of the output waveform is
T = tc + td = 0.693 (RA + 2RB) C

Procedure:
FOR UNSYMMETRICAL SQUARE WAVES
1) Generate a signal of frequency 1 KHz.
2) Set up the circuit as shown in the figure with RA = 6.8 K RB = 3.3 K
3) Observe the out wave forms at PIN 3
4) Verify VTL =1/3 VCC and VTH = 2/3 VCC at PIN 6.

Circuit Diagram

Observations and calculations :

F = 1 KHz
D = 0.75
C = 0.1 F
TON = 0.693 (RA + RB) C
TOFF = 0.693 (RB) C

39
T = TON + TOFF
T = 0.693 (RA + 2RB) C …………….. (1)
TON
D
TON  TOFF

RA  RB
D …………….. (2)
R A  2R B

1
F ….. using eqn. (1)
T
1.44
F
R A  2R B C 
RA + 2RB = 14.4 KΩ …………….. (3)
Substitute this in eqn (2) with D = 0.75
RA + RB = 10.8 KΩ …………….. (4)
Solving eqns. (3) and (4), we get
RA = 7.2 KΩ
RB = 3.6 KΩ
Therefore, RA = 6.8 KΩ and RB = 3.3 KΩ is used.

Waveforms :

40
OBSERVATIONS AND CALCULATIONS:
VTH =
VTL =
TH =
TL =
D =

Procedure: FOR GENERATING SYMMETRICAL SQUARE WAVE

1. Connect the point contact diode (0A79) in parallel with RB (Anode of the
diode at pin 7)
2. The duty cycle of the o/p becomes 50 %.
3. Now o/p wave form timings are TON = 0.695 RAC & TOFF = 0.695 RBC
4. Choose RA = RB = 10 K & C = 0.1 F and setup the circuit and observe
the o/p wave forms and verify the observation of the circuit.

Circuit Diagram :

41
Waveform:

CALCULATIONS :
TON =
TOFF =
D =

Results: The circuit is constructed successfully and the working is verified.

Applications:
1.
2.
3.
4.

Remarks :

Signature of Staff Incharge with date:

42
Probable viva questions:
1. Explain the functional block diagram of IC 555.
2. State the working of IC 555 as an astable multivibrator ?
3. Define duty cycle.
4. How astable mode of 555 can be modified to get a symmetrical square
wav ?
5. What is a multivibrator ?
6. Why is an astable multivibrator called so ?
7. Mention the applications of astable multivibrator ?

References:
1. “Operational Amplifiers and Linear IC’s”, David A. Bell, 2nd edition,
PHI/Pearson, 2004.

43
Experiment No. : 6B Date : / / .

DESIGN AND TEST MONOSTABLE MULTIVIBRATOR FOR THE GIVEN

PULSE WIDTH W USING IC 555

Aim: To connect IC555 for monostable operation & to design and test a
monostable multivibrator for the given pulse width w using IC 555.

Apparatus/Components required: IC555 Timer, Resistor (as per calculation)

& CRO with connecting wires, etc.

Theory: Monostable multivibrator is a circuit, in which one of the states is

stable, but the other is not—the circuit will flip into the unstable state for a
determined period, but will eventually return to the stable state. Such a
circuit is useful for creating a timing period of fixed duration in response to
some external event. This circuit is also known as a one shot. A common
application is in eliminating switch bounce.

Working operation: Initially when the circuit is in the stable state i.e., when
the output is low, transistor Q1 is ON and the capacitor C is shorted out to
ground. Upon the application of a negative trigger pulse to pin 2, transistor
Q1 is turned OFF, which releases the short circuit across the external
capacitor C and drives the output high. The capacitor C now starts charging
up towards VCC through R. When the voltage across the capacitor equals 2/3
VC C, comparator 1’s output switches from low to high, which in turn drives
the output to its low state via the output of the flip-flop. At the same time the
output of the flip-flop turns transistor Q1 ON and hence the capacitor C
rapidly discharges through the transistor. The output of the monostable
remain slow until a trigger pulse is again applied. Then the cycle repeats. The
pulse width of the trigger input must be smaller than the expected pulse width
of the output waveform. Also the trigger pulse must be a negative going input
signal with amplitude larger than 1/3 VCC.

44
The time during which the output remains high is given by t = 1.1 RC, where
R is in Ohms and C is in Farads. Once triggered, the circuit’s output will
remain in the high state until the set time, t elapses. The output will not
change its state even if an input trigger is applied again during this time
interval t. The circuit can be reset during the timing cycle by applying negative
pulse to the reset terminal. The output will remain in the low state until a
trigger is again applied.

Design Procedure :
R = 10 KΩ, C = 0.1µF
Voltage across capacitor VC  VCC 1  e  t / RC 

2
At t = T, VC  VCC
3
Equating the above 2 equations, we get
2
3
 
VCC  VCC 1  e  t / RC  1.1 RC

Substitute the values of R & C, we get

T = 1.1 ms

Procedure: As a non–retriggerable one shot

1) Set up the circuit as shown in figure below in the circuit diagram.
2) Apply Negative pluses of 2 kHz frequency at the trigger input (pin 2)
[Note : usually the width of triggering pulse must be less than TON]
3) Observe the output (pin3) and measure pulse duration
4) Calculate pulse duration as TON =1.1 RC and compare it with the
Observed experiment value.
5) Choose RA = RB = 10 K and C = 0.1 F and set up the circuit.
6) Observe the output waveforms and verify the operation of the circuit.

45
Circuit Diagram :

Waveform:

Fig. : Waveform for continuous trigger signal

46
Results: The experiment was conducted for the design and testing of a
monostable multivibrator for the given pulse width W using IC555 & the
results are observed.

Applications:
1.
2.
3.
4.

Remarks :

Signature of Staff Incharge with date:

Probable viva questions:

1. Explain the use of IC555 as a monostable multivibrator.
2. Why is an monostable multivibrator called so ?
3. What do you mean by timer ?
4. Mention applications of monostable multivibrator.
5. What type of input is given to a monostable multivibrator ?

References:
1. “Operational Amplifiers and Linear IC’s”, David A. Bell, 2nd edition,
PHI/Pearson, 2004.

47
Experiment No. : 7 Date : / / .

HALF WAVE AND FULL WAVE PRECISION RECTIFIERS

Aim: To design a half wave and full wave precisions rectifier using operational
amplifiers

Apparatus/Components required: Op amp μA 741, diode (in 4001 x 2),

resistors (1 KΩ x 4),10 KΩ, Signal Generator, CRO, dual power supply, Wires.

Theory: Rectifier circuits are used in the design of power supply circuits. In
such applications, the voltages being rectified are usually much greater than
the diode voltage drop, rendering the exact value of the diode drop
unimportant to the proper operation of the rectifier. Other applications exist,
however, where this is not the case. For example, in instrumentation
applications, the signal to be rectified can be of very small amplitude, say 0.1
V, making it impossible to employ the conventional rectifier circuits. Also the
need arises for very precise transfer characteristics. The precision rectifier,
which is also known as a super diode, is a configuration obtained with an
OPAMP in order to have a circuit behaving like an ideal diode and rectifier. It
can be useful for high-precision signal processing. The HWR circuit in the
figure accepts an incoming waveform and as usual with op amps, inverts it.
However, only the positive-going portions of the output waveform, which
correspond to the negative-going portions of the input signal, actually reach
the output. The direct feedback diode shunts any negative-going output back
to the "" input directly, preventing it from being reproduced. The slight voltage
drop across the diode itself is blocked from the output by the second diode.
The second diode allows positive-going output voltage to reach the output.
Furthermore, since the output voltage is taken from beyond the output diode
itself, the op amp will necessarily compensate for any non-linear
characteristics of the diode itself. As a result, the output voltage is a true and
accurate (but inverted) reproduction of the negative portions of the input
signal. Thus, this circuit operates as a precision half-wave rectifier. If Rf is
equal to Rin as is the usual case, the output voltage will have the same
amplitude as the input voltage.

48
Design:
In inverting mode

or V0   f Vi 
Rf R
A
R1 R1

Therefore,
Rf
 Slope  10
R1

Rf = 10 R1;
Let
R1 = 1 KΩ & Rf =10 KΩ
For an Half Wave rectifier,
Rf = R1, i.e., slope = 1
Vi = 5 V p-p

V0  
Rf
Vi   5 V
R1

Let,
Rf = R1 = 1 KΩ

Procedure:
1) Connect the circuit as shown above.
2) Give i/p of 0.5 V peak to peak sinusoidal signal and frequency 1 Khz.
3) Display the o/p waveform on CRO.
4) Press x-y mode on the CRO and observe the transfer characteristics.
5) Connect the circuit for a Full wave rectifier.
6) And repeat the same procedure as above.
7) Observe the o/p waveform and transfer characteristics for FWPR and
verify it with the given waveforms above.

49
Circuit Diagram: Half wave rectifier

Waveforms:

Full wave rectifier :

R1 = R2 = R3 = R4 = R = 1 KΩ
R
R5 = = 500 Ω
2
Choose
R5 = 470 Ω
Design
During the positive half cycle,

V0  
Vi
R f 
R1

Vi = 0.5 v (peak to peak) = = +0.25 v to – 0.25 v

Therefore,
V0
= 1  Rf = Ri
Vi

50
Choose
Ri = 1 KΩ  Rf = 1 KΩ
o/p of first op-amp is
R 
VS  Vi  2 
 R1 
Since
R2 = R1 Vs = Vi
R 
V0  VS   4   V0  Vi
 R2 
During negative half cycle,
KCL equation at point 2 of first op-amp is
Vi V V
 
R 1 2R R 5

R1 = R5 = R
2
V   Vi
3

 R    2 
V0  1  4       Vi 
 2R    3  
R4 = R
Vo = Vi
Circuit Diagram: Full wave rectifier

51
Waveforms:

Results: Half wave and full wave rectifiers are constructed using op amp, the
experiment was conducted and the input waveform are observed on the CRO
along with the transfer characteristics.

Applications:
1.
2.
3.
4.

Remarks:

Signature of Staff Incharge with date:

52
Probable viva questions:
1. What do you understand by precision rectifiers ?
2. How do they differ from conventional rectifier ?
3. Why use an op-amp as a rectifier ?
4. What are the advantages of Precision rectifier ?
5. How do precision rectifiers achieve rectification below cut-in voltage of
diode ?
6. Why diode is used in the feedback loop in the precision rectifier circuit ?

References:
1. “Operational Amplifiers and Linear IC’s”, David A. Bell, 2nd edition,
PHI/Pearson, 2004.

53
Experiment No. : 8 Date : / / .

PULSE WIDTH MODULATION

Aim: Conduct an experiment to generate a PWM signal for a given analog

signal of frequency less than 1 KHz also determine the dynamic range.

Apparatus/Components required: 555 Timer, Resistor, Capacitor, IN4001

diode, Signal generator, Op-amp 741, connecting wires, bread board, etc..

Theory: Pulse width changes with instantaneous value of modulating signal.

Pulse width modulator uses a monostable multivibrator with a modulating
input signal applied to pin no 5. By the application of continuous trigger
signal at pin no 2, a series of output pulses are obtained and the duration of
these pulses depends on modulating input at pin no 5. Modulating signal
applied at pin no 5 gets superimposed upon the already existing voltage 2/3
Vcc at the inverting input terminal of upper comparator. This in turn changes
the threshold level of upper comparator and output pulse width modulation
takes place. It is observed that pulse duration only varies keeping frequency
same as that of continuous input pulse train. PWM signal is used to amplitude
modulate the station carrier signal in high-level modulator.

Design
Let Tp = 1.1 RC
VCC = 5 V
Let C = 0.1 μF
Tp = 1.1 ms
R = 10 K
Design of the triggering circuit is shown as below …
Rt Ct << T
Let T = 1 ms
Rt Ct = 0.1 T
If Ct = 0.01 μF, then Rt = 10 K

54
Procedure:
1. Connect the circuit as shown in figure below in the circuit diagram.
2. Adjust the C(t) frequency to around (800 Hz – 2 KHz) and amplitude to
5V (p-p)
3. Adjust the m(t) frequency to around 200 Hz and amplitude to 2 V(p-p)
4. Slightly vary the amplitude of m(t) & frequency to 139 Hz and frequency
of C(t) to 850 Hz
5. See the o/p of PWM at pin 3.

Circuit Diagram :

Waveforms :

55
Results: The experiment was conducted & the PWM signal is generated and
output is verified & conclusions are drawn.

Applications:
1.
2.
3.
4.

Remarks:

Signature of Staff Incharge with date:

Probable viva questions:

1. State various Pulse modulation methods.
2. What are the advantages of PWM over PAM ?
3. What are the disadvantages of PWM ?
4. Explain the principle of PWM.
5. Mention the applications of PWM.

References:
1. Communication Systems, Simon Haykins, 5th Edition, John Willey, India
Pvt. Ltd, 2009.

56
Experiment No. : 9 Date : / / .

PULSE POSITION MODULATION

Aim: To conduct an experiment to generate a PPM signal of pulse width for a

given modulating signal.

Apparatus/Components required: 555Timer, Resistor, Capacitor, IN4001

diode, signal generator, Op-amp 741, bread board, connecting wires, etc…

Theory: The position of the pulse varies in accordance with amplitude of

sampled waveform. PPM can be derived from PWM through process of

differentiating. PWM signal is applied to a pin no 2 of IC 555 timer through a

diode RC combination. Thus input to pin no 2 is negative trigger pulses, which

corresponds to trailing edges of PWM waveform. IC555 timer is working in a

monostable mode and pulse width is constant. The negative trigger pulses

decide the starting time of output pulses and thus output at pin no 3 is

desired pulse position modulation. PPM is used in speed control of DC motors.

Design :

Let

PPM pulse width TP = 100 sec

Tm = minimum width of PWM signal

TP = 1.1 RC

Let C = 0.01 μF

57
200 10 6
R  10 KΩ
1.1 0.0110 6

Triggering circuit design is done as ….

To get spikes,

RtCt << Tm

Let Rt Ct = 0.1 Tm

Let Ct = 0.1 μF

Rt = 10 K

Circuit Diagram :

Procedure:

1. Rig up the circuit as shown in figure.

2. Set the sin wave m(t) around 200 Hz and amplitude of 2 V.

3. Set the triangular wave frequency C(t) around 2 KHz & amplitude of

58
around 2 V.

4. Now check the PWM o/p at pin 6 of op-amp.

5. Give this o/p as i/p at pin 2 of IC 555.

6. We will get PPM o/p at pin 3 hence the position of pulse width keeps

change.

Waveforms :

Fig. a) Modulating signal and triangular signal b) PWM c) PPM

Results: PPM signal is generated and o/p is observed.

Applications:

1.

2.

3.

4.

59
Remarks:

Signature of Staff Incharge with date:

Probable viva questions:

1. What is pulse position modulation ?

2. Explain the principle of PPM ?

3. What is the advantage of PPM over PWM and PAM ?

4. Explain the principle of PPM.

5. What are the applications of PPM ?

6. What are the different circuits that are used in the block diagram to

generate a PPM ?

References:

1. Communication Systems, Simon Haykins, 5th Edition, John Willey, India

Pvt. Ltd, 2009.

60
Experiment No. : 10 Date : / / .

FREQUENCY MODULATION USING 8038

Aim: Design and conduct a suitable experiment to generate a FM wave

using IC 8038. Find the modulation index and the bandwidth of operation
(T) and to display various wave forms.

Apparatus/Components required: IC 8038, resistors –10 K (3 no’s), 6.8

K, 8.2 K, Capacitors -1 F, Signal generator, Connecting wires, etc…

Theory: Frequency modulation conveys information over a carrier wave by

varying its instantaneous frequency. An important concept in the
understanding of FM is that of frequency deviation. The amount of frequency
deviation a signal experiences is a measure of the change in transmitter
output frequency from the rest frequency of the transmitter. The rest
frequency of a transmitter is defined as the output frequency with no
modulating signal applied. For a transmitter with linear modulation
characteristics, the frequency deviation of the carrier is directly proportional
to the amplitude of the applied modulating signal. Thus, an FM transmitter
is said to have a modulation sensitivity, represented by a constant, kf, where

kf = frequency deviation/V = kf kHz/V.

IC 8038 a waveform generator is used in F.M generation frequently.

Modulated signal is given by

s(t) = Ac cos [ct+ sin mt]

m(t)= Am cos mt
Am
Modulation index = K f
Fm
where < 0.3 it is narrow band F.M. and > 0.3 it is wide band F.M.

61
 IC 8038 is a 14 pin IC where pins 10, 11, 12 are used for sine wave adjust.
Pin 2 gives sine wave output the amplitude of this wave is 0.22 Vcc and Vcc
varies between ±5 v to ±15 v.
 This IC also generates square wave and triangular wave.
 Pin 4 and 5 are used for duty cycle.
 A external capacitor connected to pin 10 along with resistors connected to
pin 5 and determines output frequency.
 Pin 8 is used for F.M sweep input.
 Modulating signal is applied to pin8 sweep voltage should be within the
range 2/3 Vcc < Vsweep < Vcc, where Vcc is total voltage.
 Sweep frequency of F.M. is 10 khz.
 An external capacitor connected to timing capacitor with timing resistors
connected to 4 & 5 determines the frequency of output waveforms.

Design :
Given frequency f = 25 KHz
1
f
5  RB 
R A C 1  
3  2R A  R B 
R A = RB = R
0.3
f
RC
Let R = 10 K & C = 0.001 µF

Procedure:
1) Give ± 10 V as Vcc to IC 8038 and shorting pin no’s 7 and 8 observe output
at 9, 3, 2 on CRO.
2) Measure sine wave amplitude and frequency.
3) Connect modulating signal of Vm = 5 v(p-p) and frequency of 800 Hz to 1.5
kHZ. Between pin 7 & 8, through R-C as shown in the figure.
4) Observe FM output at pin 2.

62
5) Draw output waveform.
6) Determine maximum phase deviations following steps are carried out.
a) Shot 7 and 8, without RC connects a variable DC supply.
b) Vary DC voltage from (0-6 v) and observe frequency variation at pin 2.
c) Note down DC input and output frequency on CRO.
d) Draw graph of frequency v/s input voltage.

Circuit Diagram :

Waveforms:

63
f i
Sensitivity-(from the graph) Slope S =
Vi

δ
Maximum deviation: δ = S × Vm =
fm

Tabular Column:
DC input volts (Vi) FM output (f)

For carrier sine wave: Amplitude = 2.2 v

Results: The modulation index is =

Applications:
1.
2.
3.
4.

64
Remarks :

Signature of Staff Incharge with date:

Probable viva questions:

1. Why frequency modulation is better than amplitude modulation ?
2. What is frequency deviation in FM ?
3. What is transmission BW for FM ?
4. When maximum frequency deviation occurs in FM ?
5. List some advantages of FM over AM.
6. What is the carson’s rule for bandwidth of FM wave ?
7. What are the standard intermediate frequency values of AM radio
and FM radio ?

References:
1. An Introduction to Analog and Digital Communication, Simon Haykins,
John Wiley India Pvt. Ltd., 2008.

65
Experiment No. : 11 Date : / / .

SCHMITT TRIGGER

Aim: To design op-amp Schmitt trigger for given specification

Apparatus/Components required: Op-amp IC 741, resistor [1K, 15K], power

supply [DC], signal generator, CRO, connecting wires.

Theory: A Schmitt trigger is an inverting comparator with a positive feedback.

The applied voltage Vin triggers (changes the state of the o/p) the o/p Vout
every time the i/p voltage exceeds a certain voltage level called the upper
threshold voltage [UTP]. The applied voltage Vin also changes the state of the
o/p, i.e., triggering the o/p when the value of Vin falls below a certain reference
voltage called lower threshold voltage [LTP]. The values of the upper threshold
voltage [UTP] and the lower threshold voltage [LTP] are obtained by using the
voltage divider circuit R1 & R2. When the i/p voltage is above the upper
threshold, the o/p voltage is constant at the lower saturation point (Vsat ) this
stage the voltage across the resistor R2 is VLt = lower threshold voltage. When
Vin is less than the lower threshold, the o/p is constant at the upper
saturation point Vsat. At this stage, the voltage across the resistor R2 is Vut =
upper threshold voltage. The width of hysterics curve = Vutp – VLltp

Design :
Design a Schmitt trigger for UTP = 2.5 V and LTP = 1.0 V, Vsat = 12 V

 R1 
UTP + LTP = 2 Vref   ……………… (1)
 R 1  R 2 

 R2 
UTP  LTP = 2 Vsat   …………….. (2)

 1R  R 
2 

 R2  1 .5
From eqn. (2) : 2   =
 R 1  R 2  12

 R2 
  = 0.0625
 R 1  R 2 
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R1 + R2 = 16 R2
R1 = 15 R2
Choose R2 = 1 K, then R1 = 15 K
15 R 2
Form eqn. (1) : 3.5 = 2 Vref
16 R 2
Therefore, Vref = 1.87 V  1.9 V

Procedure:
1) Rig up the circuit as per the circuit diagram.
2) Use a sinusoidal signal of 500Hz as i/p and amplitude of 6V peak to peak.
3) Display o/p rectangular wave on CRO and measure UTP and LTP.
4) Use X and Y mode and display the hysteresis curve on CRO, measure UTP
and LTP and compare it with the designed values.

Circuit Diagram :

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Waveforms :

Transfer characteristics :

Here, Vi is linear varying signal ; say a sinusoidal or triangular waveform,

Working : say initially Vi < 0 then V0 = + Vsat.
Let us find voltage at node X.
R2 R1
VX  Vsat  Vref
R1  R 2 R1  R 2
Until Vi reaches Vx , the o/p cannot change its state.
This value of i/p which changes the o/p form + Vsat to –Vsat is called upper
trip point (UTP)
Therefore,

UTP 
R2
Vsat   R1 Vref 
R1  R 2 R1  R 2
To regain original state the Vi must decrease from value greater than UTP.
i.e., Vo = Vsat
Then,

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VX 
R2
 Vsat   R1 Vref 
R1  R 2 R1  R 2
Therefore,

LTP 
R2
 Vsat   R1 Vref 
R1  R 2 R1  R 2

when Vref = 0 V
UTP = LTP

Results: The experiment was conducted, the results was observed.

Applications:
1.
2.
3.
4.

Remarks:

Signature of Staff Incharge with date:

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Probable viva questions:
1. Explain op-amp as a Schmitt trigger.
2. What are the applications of Schmitt trigger.
3. Why is a Schmitt trigger called a regenerative comparator.
4. What type of feedback is used in Schmitt trigger.
5. Which circuit converts irregularly shaped waveform to regular shaped
waveforms ?
6. In which configuration a dead band condition occurs in Schmitt trigger ?

References:
1. “Operational Amplifiers and Linear IC’s”, David A. Bell, 2nd edition,
PHI/Pearson, 2004.

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AC+LIC LABORATORY (ECL47)

PROBABLE/SUGGESTED QUESTION BANK

1. Design a second order active Low Pass Filter for a given cutoff frequency
fc = ____ Hz (< 10 KHz). Conduct an experiment to draw the frequency
response.
2. Design a second order active High Pass Filter for a given cut-off
frequency fc = ____ Hz (< 10 KHz). Conduct an experiment to draw the
frequency response.
3. Design a Band Pass Filter for fc = ____ Hz & draw the frequency response.
4. Design a Band Elimination Filter for fc = ____ Hz & draw the frequency
response.
5. Design an Op-Amp Schmitt trigger for UTP = ____ and LTP = ____
6. Design a symmetrical astable multivibrator using IC555.
7. Design a monostable multivibrator for the ____ pulse width.
8. Conduct an experiment to generate an AM signal using collector
modulation for an Fc = _____ KHz and Fm = ____ Hz. Plot the variations of
modulating signal amplitude v/s modulation index. Also demodulate it.
9. Design and conduct a suitable experiment to generate an FM wave using
IC 8038. Find the modulation index and bandwidth. Display the various
waveforms.
10. Conduct an experiment to generate PAM signal and also design a circuit
to demodulate the obtained PAM signal. Plot the relevant waveforms.
11. Conduct an expt to generate a PPM signal for a given modulating signal.
12. Conduct an experiment to generate a PWM signal, also determine the
dynamic range.
13. Design and test R-2R DAC using Op-Amp.
14. Design and test Half wave and Full wave precision rectifier circuits using
Op-Amp.
15. Design a PWM circuit using summing amplifier and ZCD.

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Appendix
LM 741 OPAMP

One of the cheapest and most-popular OP-AMP is the 741. Operational

amplifiers can be used to perform mathematical operations on voltage signals
such as inversion, addition, subtraction, integration, differentiation, and
multiplication by a constant. The pinout for an LM741 is shown below:

The basic parameters for a 741 are :

Rail voltages : +/ 15v DC (+/ 5v min, +/ 18v max)
Input impedance: approx 2M
Low Frequency voltage gain: approx 2,00,000
Input bias current: 80 nA
Slew rate: 0.5 v per microsecond
Maximum output current: 20 mA
Recommended output load: not less than 2 k

555 Timer

The 555 timer is an integrated circuit (chip) implementing a variety of timer

and multivibrator applications. It was produced by Signetics Corporation in
early 1970. The original name was the SE555/NE555 and was called “The IC
Time Machine”. The 555 gets its name from the three 5-KΩ resistors used in
typical early implementations. It is widely used because of its ease to use, low
price and reliability. It is one of the most popular and versatile integrated
circuits which can be used to build lots of different circuits.

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It includes 23 transistors, 2 diodes and 16 resistors on a silicon chip installed
in an 8-pin mini dual-in-line package (DIP-8). The 555 Timer is a monolithic
timing circuit that can produce accurate and highly stable time delays or
oscillations. The timer basically operates in one of the two modes—
monostable (one-shot) multivibrator or as an astable (free-running)
multivibrator. In the monostable mode, it can produce accurate time delays
from microseconds to hours. In the astable mode, it can produce rectangular
waves with a variable duty cycle. Frequently, the 555 is used in astable mode
to generate a continuous series of pulses, but you can also use the 555 to
make a one-shot or monostable circuit.

The 555 can source or sink 200 mA of output current, and is capable of
driving wide range of output devices. The output can drive TTL (Transistor-
Transistor Logic) and has a temperature stability of 50 parts per million (ppm)
per degree Celsius change in temperature, or equivalently 0.005 %/°C.

Applications of 555 timer in monostable mode include timers, missing pulse

detection, bounce free switches, touch switches, frequency divider,
capacitance measurement, pulse width modulation (PWM) etc.

In astable or free running mode, the 555 can operate as an oscillator. The
uses include LED and lamp flashers, logic clocks, security alarms, pulse
generation, tone generation, pulse position modulation, etc. In the bistable
mode, the 555 can operate as a flip-flop and is used to make bounce-free
latched switches, etc.

Refer to the figure below for the brief description of the pin connections. The
pin numbers used refer to the 8-pin mini DIP and 8-pin metal can packages.
The 555 can be used with a supply voltage (VCC) in the range 4.5 to 15 V (18
V absolute maximum).

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Pin 1: Ground. All voltages are measured with respect to this terminal.

Pin 2: Trigger. The output of the timer depends on the amplitude of the
external trigger pulse applied to this pin. The output is low if the voltage at
this pin is greater than 2/3 Vcc. When a negative going pulse of amplitude
greater than 1/3 VCC is applied to this pin, comparator 2 output goes low,
which in turn switches the output of the timer high. The output remains high
as long as the trigger terminal is held at a low voltage.

Pin 3: Output. There are two ways by which a load can be connected to the
output terminal: either between pin 3 and ground or between pin3 and supply
voltage +VCC. When the output is low the load current flows through the load
connected between pin 3 and +VCC into the output terminal and is called sink
current. The current through the grounded load is zero when the output is
low. For this reason the load connected between pin 3 and +VCC is called the
normally on load and that connected between pin 3 and ground is called
normally off-load. On the other hand, when the output is high the current

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through the load connected between pin 3 and +VCC is zero. The output
terminal supplies current to the normally off load. This current is called
source current. The maximum value of sink or source current is 200mA.

Pin 4: Reset. The 555 timer can be reset (disabled) by applying a negative
pulse to this pin. When the reset function is not in use, the reset terminal
should be connected to +VCC to avoid any possibility of false triggering.

Pin 5: Control Voltage. An external voltage applied to this terminal changes

the threshold as well as trigger voltage. Thus by imposing a voltage on this
pin or by connecting a pot between this pin and ground, the pulse width of
the output waveform can be varied. When not used, the control pin should
be bypassed to ground with a 0.01 µF Capacitor to prevent any noise
problems.

Pin 6: Threshold. This is the non-inverting input of comparator 1, which

monitors the voltage across the external capacitor. When the voltage at this
pin is greater than or equal to the threshold voltage 2/3 VCC, the output of
comparator 1 goes high, which in turn switches the output of the timer low.

Pin 7: Discharge. This pin is connected internally to the collector of transistor

Q1. When the output is high Q1 is OFF and acts as an open circuit to external
capacitor C connected across it. On the other hand, when the output is low,
Q1 is saturated and acts as a short circuit, shorting out the external
capacitor C to ground.

Pin 8: +VCC. The supply voltage of +5V to + 18V is applied to this pin with
respect to ground.

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ICL 8038

The ICL8038 waveform generator is a monolithic integrated circuit capable of

producing high accuracy sine, square, triangular, saw tooth and pulse
waveforms with a minimum of external components. The frequency (or
repetition rate) can be selected externally from 0.001Hz to more than 300 kHz
using either resistors or capacitors, and frequency modulation and sweeping
can be accomplished with an external voltage. The ICL8038 is fabricated with
advanced monolithic technology, using Schottky barrier diodes and thin film
resistors, and the output is stable over a wide range of temperature and
supply variations. These devices may be interfaced with phase locked loop
circuitry to reduce temperature drift to less than 250 ppm/OC.

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