ECE Lab Manual
ECE Lab Manual
ECE Lab Manual
LABORATORY MANUAL
Observations:
i. Data should be clearly recorded using Tabular Columns.
ii. Unit of the observed data should be clearly mentioned.
iii. Relevant calculations should be shown. If repetitive calculations are needed, only show
a sample calculation and summarize the others in a table.
TOTAL : 45 PERIODS
Course outcomes:
CO 1 Analyze various types of feedback amplifiers
CO 2 Design oscillators, tuned amplifiers
CONTENTS
Page
Sl. No. Name of the Experiment
No.
DESIGN EXPERIMENTS
1.a Current series feedback amplifer 9
1.b Voltage shunt feedback amplifier 16
2.a RC phase shift oscillator 23
2.b Wein- Bridge oscillator 29
3.a Hartley’s oscillator 34
3.b Colpitt’s oscillator 40
4 Single Tuned Oscillator 45
5 RC Integrator and Differentiator circuits 50
6.a Astable Multivibrator 55
6.b Monostable Multivibrator 60
7 Clippers and Clampers 66
SIMULATION USING SPICE EXPERIMENTS
9 Tuned Collector oscillator 73
10 Wein-Bridge Oscillator 77
11 Double and Stagger tuned Amplifier 79
12 Bistatble Multivibrator 82
13 Schmitt Trigger circuit with Predictable hysteresis 85
14 Analysis of power amplifier 88
CONTENT BEYOND THE SYLLABUS
15 Voltage and Current Time base circuits 93
AIM:
To design a negative feedback amplifier and to draw its frequency
response.
REQUIREMENTS:
Design examples:
VCC= 15V, IC=1mA, AV= 30, fL= 50Hz, S=3, hFE= 100, hie= 1.1KΏ
Gain formula is,
AV= - hFE RLeff / hie
Assume, VCE = VCC / 2 (transistor in active region)
VCE = 15 /2=7.5V
VE = VCC / 10= 15/10=1.5V
Emitter resistance is given by, re =26mV/ IE
Therefore re =26 Ώ
hie= hfe re
hie =2.6KΏ
CIRCUIT DIAGRAM:
WITH FEEDBACK:
MODEL TABULATION:
Without feedback:
Vi=
Frequency Output Voltage Gain = 20 log(V0/Vi)
Sl. No Gain = V0/Vi
(Hz) (V0) (volts) (dB)
With feedback:
Vi=
Frequency Output Voltage Gain = 20 log(V0/Vi)
Sl. No Gain = V0/Vi
(Hz) (V0) (volts) (dB)
MODEL GRAPH:
THEORY
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Set VCC = 10V; set input voltage using audio frequency oscillator.
3. By varying audio frequency oscillator take down output frequency
oscillator voltage for difference in frequency.
4. Calculate the gain in dB
5. Plot gain Vs frequency curve in semi-log sheet.
6. Repeat the steps 1 to 6 with feedback
7. Compare this response with respect to the amplifier without feedback.
INFERENCE:
Thus current series feedback amplifier is designed and studied
its performance.
VIVA QUESTIONS:
1. What is feedback?
5. Calculate the value of output impedance with and without feed back.
WORK SHEET
AIM:
To design and study frequency response of voltage shunt feedback amplifier.
REQUIREMENTS:
Equipment Name Range Quantity
S.No List
Signal generator (0-30)MHz 1
CRO (0-20)V 1
1. Equipments
Regulated Power (0-30)V 1
Supply
Resistor 3k, 1.1 1
k,5k
2.5
2. Components k,1k,
Capacitor 66F, 1
30F,58 µf
Transistors BC 107 1
Bread board - 1
3. Other Connecting Wires Single As required
accessories strand
DESIGN PROCEDURE:
Given specifications:
VCC= 10V, IC=1.2mA, AV= 30, fI = 1 kHz, S=2, hFE= 150, β=0.4
The feedback factor, β= - 1/RF= +1/0.4=2.5KΏ
VCE= VCC/2= 5V
From equation (1), RC= 3 KΏ
CIRCUIT DIAGRAM:
+10V
R1 RC 3K
5K C1
VCC
1n
Rs Ci
Q1
1k 66uf
5V Vi R2 R5
CE
1.1K 1k
58uf
CIRCUIT DIAGRAM
MODEL TABULATION:
Without feedback:
Vi=
Frequency Output Voltage Gain = 20 log(V0/Vi)
Sl. No Gain = V0/Vi
(Hz) (V0) (volts) (dB)
With feedback:
Vi=
Frequency Output Voltage Gain = 20 log(V0/Vi)
Sl. No Gain = V0/Vi
(Hz) (V0) (volts) (dB)
MODEL GRAPH:
THEORY:
Negative feedback in general increases the bandwidth of the transfer function
stabilized by the specific type of feedback used in a circuit. In Voltage shunt
feedback amplifier, consider a common emitter stage with a resistance R’ connected
from collector to base. This is a case of voltage shunt feedback and we expect the
bandwidth of the Trans resistance to be improved due to the feedback through R’.
The voltage source is represented by its Norton’s equivalent current source Is=Vs/Rs.
PROCEDURE:
INFERENCE:
Thus voltage shunt feedback amplifier is designed and studied its performance.
VIVA QUESTIONS:
WORK SHEET
AIM:
REQUIREMENTS:
S. RANGE QUANT
N REQUIREMENT ITY
o S
1 Resistors 7.5k,1.4 k
4.8K,1.2K, 1each, 3
19K, 6.5K
2 Power supply (0-30)V 1
3 Transistor BC107 1
4 Capacitors 1.3f , 2.1f, 1,1,3
1.3f, 0.01F
5 CRO (0-30)MHz 1
6 Bread board - 1
Design Example:
Specifications:
VCC = 12V, ICq =1mA, =100, Vceq = 5V, f=1 KHz, S=10, C=0.01 µf,
hfe= 330, AV= 29
Design:
(i)To find R:
VCE = VCC /2 = 6V
Cf = 0.636f = 0.01f
CIRCUIT DIAGRAM:
MODEL GRAPH:
TABULATION:
THEORY:
The low frequencies RC oscillators are more suitable. Tuned circuit is not
an essential requirement for oscillation. The essential requirement is that there must
be a 180o phase shift around the feedback network and loop gain should be greater
than unity. The 180o phase shift in feedback signal can be achieved by suitable RC
network.
PROCEDURE:
3. For the given supply the amplitude and time period is measured from CRO.
INFERENCE:
Thus the RC-phase shift oscillator is designed and constructed for the
given frequency.
Theoretical frequency :
Practical frequency :
1. What is an oscillator?
WORK SHEET
AIM:
To design a Wein-bridge oscillator using transistors and to find the
frequency of oscillation.
9.2 REQUIREMENTS:
S.No REQUIREMENTS RANGE QUANTITY
1 Resistors
2 Power supply 5V 1
3 Transistor BC107 1
4 Capacitors
5 CRO 1
6 Bread board 1
DESIGN EXAMPLE:
Assume f=1 KHz, C=0.1µf
f = 1/ 2∏RC
R= 1/2∏fC
R =1/2x3.14x1x103x0.1x103
R= 1.59KΩ
To calculate R1:
R1= 10R
R1 =10x1.5K
R1 =15.9KΩ
To calculate Rf (Feedback resistor):
Rf = 2R1
Rf = 2(15.9x103) =31.8KΩ ≈ 33KΩ
THEORY:
Generally in an oscillator, amplifier stage introduces 180o phase shift and
feedback network introduces additional 180o phase shift, to obtain a phase shift of
360o around a loop. This is a condition for any oscillator. But Wein bridge oscillator
uses a non-inverting amplifier and hence does not provide any phase shift during
amplifier stage. As total phase shift requires is 0 o or 2n radians, in Wein bridge
type no phase shift is necessary through feedback. Thus the total phase shift around a
loop is 0o. The output of the amplifier is applied between the terminals 1 and 3,
which are the input to the feedback network. While the amplifier input is supplied
from the diagonal terminals 2 and 4, which is the output from the feedback network.
Thus amplifier supplied its own output through the Wein bridge as a feedback
network.
The two arms of the bridge, namely R1, C1 in series and R2, C2 in parallel are
called frequency sensitive arms. This is because the components of these two arms
decide the frequency of the oscillator. Advantage of Wein bridge oscillator is that by
varying the two-capacitor values simultaneously, by mounting them on the common
shaft, different frequency ranges can be provided.
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Set VCC = 5V.
3. For the given supply the amplitude and time period is measured from CRO.
4. Frequency of oscillation is calculated by the formula f=1/T
5. Amplitude Vs time graph is drawn.
CIRCUIT DIAGRAM
MODEL GRAPH:
MODEL TABULATION:
INFERENCE:
Thus the Wein – bridge oscillator is designed for the given frequency
of oscillation.
Theoretical frequency :
Practical frequency :
VIVA QUESTIONS:
WORK SHEET
AIM:
To design and construct a Hartley oscillator at the given operating frequency.
REQUIREMENTS:
Design Example:
CO=0.039=0.01µf
PROCEDURE:
3. For the given supply the amplitude and time period is measured from CRO.
CIRCUIT DIAGRAM:
MODEL GRAPH:
MODEL TABULATION:
INFERENCE:
Thus the Hartley oscillator is designed and constructed for the given frequency.
Theoretical frequency :
Practical frequency
VIVA QUESTIONS:
WORK SHEET
AIM:
8.2 REQUIREMENTS:
S.N
EQUIPME RANG QUANTI
o NTS E TY
1
Resistors
2
RPS (0-30)V 1
3
Transistor BC107 1
4
Capacitors
5
Inductor 10mH 1
6
CRO 30MHz 1
7
Bread board - 1
TAB 8.1
8.3 Design of feed back Network:
Given C1= 0.1 F, L=10mH, f=20 KHz, VCC=12V,IC=3mA, S=12
C1 + C 2
f = 1/2∏ , C2= 0.01F
LC1C 2
Amplifier design:
(i)Selection of RC:
Gain formula is,
AV= - hfe RLeff / hie
Assume VCE=VCC/2 (Transistor active)
VCE= 12/2= 6V
VE=IERE= VCC/10=1.2V
VCC=ICRC + VCE + IERE
RC= (VCC- VCE -IERE) / IC
Therefore RC= 1.6K=2 K
(ii) Selection of RE:
IC= IE=3mA
RE= VE/IE= 1K
(iii) Selection of R1 & R2:
Stability factor S=12
S=1+(RB/ RE)
12=1+ (RB/1x103)=11k
Using potential divider rule,
CIRCUIT DIAGRAM:
FIG 8.1
MODEL GRAPH:
FIG 8.2
MODEL TABULATION:
TAB.8.2
INFERENCE:
Thus the Collipit’s oscillator is designed and constructed for the given
frequency.
Theoretical frequency :
Practical frequency :
VIVA QUESTIONS:
WORK SHEET
Ex. No.:4
Date: SINGLE TUNED AMPLIFIER
AIM:
To design a single tuned amplifier and to draw its frequency response.
REQUIREMENTS:
DESIGN EXAMPLE:
Given specifications
Vcc = 12V, β = 100, Ic = 1mA, L=1mH, f=2 KHz, S= [2-10]
Assume, VCE = VCC / 2=6V
VE = VCC / 10 =1.2V
To calculate C:
F = 1/ 2∏ LC
CIRCUIT DIAGRAM:
MODEL GRAPH:
TABULATION:
THEORY:
The single tuned amplifier selecting the range of frequency the resistance load
replaced by the tank circuit. Tank circuit is nothing but inductors and capacitor in
parallel with each other. The tuned amplifier gives the response only at particular
frequency at which the output is almost zero. The resistor R1 and R2 provide potential
diving biasing, Re and Ce provide the thermal stabilization. This it fixes up the
operating point.
PROCEDURE:
3. Gain is calculated in dB
INFERENCE:
Thus the class – c single tuned amplifier is designed and frequency response
is plotted.
VIVA QUESTIONS:
1. Define Q-factor?
WORK SHEET
Ex. No.: 5
Date: INTEGRATOR AND DIFFERENTIATOR
AIM:
To design and construct a differentiator and integrator circuit.
REQUIREMENTS:
Equipment Name Range Quantity
S.No List
Function (0-30)MHz 1
generator
1. Equipments CRO (0-20)V 1
Regulated Power (0-30)V 1
Supply
Resistor 1 k 1
2. Components
Capacitor 1 uf 1
Bread board - 1
3. Other Connecting Wires Single As required
accessories strand
THEORY:
Differentiator:
Differentiator is a circuit which differentiates the input signal, it allows high
order frequency and blocks low order frequency. If time constant is very low it acts
as a differentiator. In this circuit input is continuous pulse with high and low value.
Integrator:
In a low pass filter when the time constant is very large it acts as a integrator.
In this the voltage drop across C will be very small in comparison with the drop
across resistor R. So total input appears across the R.
PROCEDURE:
1. Connections are given as per the circuit diagram.
2. Set the signal voltage.
3. Observe the output waveform.
4. Sketch the output waveform.
INTEGRATOR:
CIRCUIT DIAGRAM:
MODEL TABULATION:
MODEL GRAPH:
DIFFERENTIATOR
CIRCUIT DIAGRAM:
MODEL TABULATION:
MODEL GRAPH:
INFERENCE:
Thus the integrator and differentiator are constructed and output waveform
observed and readings were tabulated.
VIVA QUESTIONS:
WORK SHEET
AIM:
To design an Emitter coupled Astable multivibrator and study the output
waveform.
REQUIREMENTS:
1 Resistors
2 RPS (0-30)V 1
3 Transistor BC107 2
4 Capacitors
5 CRO (0-30)MHz 1
6 Bread board - 1
DESIGN EXAMPLE:
Given specifications:
VCC= 10V; hfe = 100; f=1 KHz; I c = 2mA; Vce (sat) = 0.2v;
To design RC:
R ≤ hFE RC
RC= VCC- VC2 (Sat) / IC= 4.9 k
Since R ≤ hFE RC
Therefore R≤ 100 x 4.7 x103=490 k 470 k
To Design C:
Since T= 1.38RC
1x10-3=1.38x 490x103x C
Therefore C=0.01F
THEORY:
The astable multivibrator generates square wave without any external
triggering pulse. It has no stable state, i.e., it has two quasi- Stable states. It switches
back and forth from one stable state to other, remaining in each state for a time
depending upon the discharging of a capacitive circuit. When supply voltage + Vcc is
applied, one transistor will Conduct more than the other due to some circuit
imbalance.
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Set VCC = 5V.
3. For the given supply the amplitude and time period is measured
from CRO.
4. Frequency of oscillation is calculated by the formula f=1/T
5. Amplitude Vs time graph is drawn.
CIRCUIT DIAGRAM
MODEL GRAPH:
FIG.8.2
TABULATION:
Amplitude(V) Time
period(msec)
INFERENCE:
Thus the astable multivibrator is designed and output waveform is
plotted
VIVA QUESTIONS:
AIM:
To design and test the performance of Monostable multivibrator for the given
frequency
REQUIREMENTS:
2 RPS (0-30)V 1
3 Transistor BC107 1
4 CRO (0-30)MHz 1
5 Capacitor 3.2nf 1
25pf 1
6 Bread board - 1
DESIGN EXAMPLE:
Given specifications:
VCC= 12V; hfe = 200; f=1 KHz; I c = 2mA; Vce (sat) = 0.2v; VBB= - 2V,
(i)To calculate RC:
RC = VCC - Vce (sat) / IC
RC = 12 – 0.2 / 2x10-3=5.9KΩ
(ii) To calculate R:
IB2(min)=IC2 / hfe= 2x10-3 / 200 = 10µ A
Select IB2 > IB1(min) (say 25µ A)
Then R = VCC – V BE (sat) / IB2
Therefore R= 12-0.7/25x10-6=452KΩ
(iii) To calculate C:
T=0.69RC
1x10-3= 0.69x452x103xC
C=3.2nf
THEORY:
The monostable multivibrator has one stable state when an external trigger
input is applied the circuit changes its state from stable quasi stable state. And then
automatically after some time interval the circuit returns back to the original normal
stable state. The time T is dependent on circuit components.
The capacitor C1 is a speed-up capacitor coupled to base of Q2 through C.
Thus DC coupling in bistable multivibrator is replaced by a capacitor coupling. The
resistor R at input of Q2 is returned to VCC. The value of R2, V BB are chosen such that
transistor Q1 is off by reverse biasing it. Q2 is on. This is possible by forward
biasing Q2 with the help of VCC and resistance R. Thus Q2-ON and Q1-OFF is
normal stable state of circuit.
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Give a negative trigger input to Q2.
3. Note the output of transistor Q2 and Q1.
4. Find the value of Ton and Toff.
CIRCUIT DIAGRAM:
MODEL GRAPH:
TABULATION:
TON TOFF
INFERENCE:
Thus the monostable multivibrator is designed and the performance is tested.
Theoretical period :
Practical period :
WORK SHEET
Ex. No.: 7
Date: CLIPPER AND CLAMPER CIRCUITS
AIM:
To construct and design the clipper and clamper circuits using diodes.
REQUIREMENTS:
DESIGN PROCEDURE:
T=t=1/f=1x10-3 sec=RC
Assume, C=1uF
Then, R=1KΩ
POSITIVE CLIPPER
CIRCUIT DIAGRAM:
MODEL TABULATION:
Input
Output
MODEL GRAPH:
NEGATIVE CLIPPER:
CIRCUIT DIAGRAM:
MODEL TABULATION:
Input
Output
MODEL GRAPH:
CLAMPER CIRCUIT:
Vin=5V
MODEL TABULATION:
Input
Output
MODEL GRAPH:
Vin=5V
MODEL TABULATION:
MODEL GRAPH
THEORY
CLIPPER:
A Clipper is a circuit that removes either the positive or negative part of a
waveform. For a positive clipper only the negative half cycle will appear as output.
CLAMPER:
A Clamper circuit is a circuit that adds a dc voltage to the signal. A positive
clamper shifts the ac reference level upto a dc level.
WORKING:
During the positive half cycle, the diode turns on and looks like a short circuit
across the output terminals. Ideally, the output voltage is zero. But practically, the
diode voltage is 0.7 V while conducting.
On the negative half cycle, the diode is open and hence the negative half cycle
appear across the output.
APPLICATION:
PROCEDURE:
1. Connect as per the circuit diagram.
2. Set the signal voltage (say 5V, 1 KHz) using signal generator.
3. Observe the output waveform using CRO.
4. Sketch the output waveform.
INFERENCE:
Thus the output waveform for Clipper and clamper was observed and its
readings are tabulated.
VIVA QUESTIONS:
Ex. No.: 9
Date: TUNED COLLECTOR OSCILLATOR
AIM:
To simulate a tuned collector oscillator using PSPICE.
REQUIREMENTS:
1. PC
2. PSPICE software
THEORY:
Tuned collector oscillation is a type of transistor LC oscillator where the tuned
circuit (tank) consists of a transformer and a capacitor is connected in the collector
circuit of the transistor. Tuned collector oscillator is of course the simplest and the
basic type of LC oscillators. The tuned circuit connected at the collector circuit
behaves like a purely resistive load at resonance and determines the oscillator
frequency. The common applications of tuned collector oscillator are RF oscillator
circuits, mixers, frequency demodulators, signal generators etc.,
PROCEDURE:
1. Click on the start menu and select the pspice simulation software
2. Select the parts required for the circuit from the parts menu and them in
the work space.
3. Connect the parts using wires
4. Save the file and select the appropriate analysis
5. Simulate the circuit and observe the corresponding output waveforms.
CIRCUIT DIAGRAM:
`
MODEL GRAPH:
INFERENCE:
Thus the tuned collector oscillator is simulated using PSpice.
VIVA QUESTIONS:
1. What is PSpice?
AIM:
To simulate voltage and current time base circuits by using PSPICE.
REQUIREMENTS:
1. PC
2. PSPICE software
THEORY:
MODEL GRAPH:
INFERENCE:
Thus the Wein Bridge Oscillator is simulated using Pspice.
Ex. No.: 11
Date: DOUBLE AND STAGGERED TUNED AMPLIFIER
AIM:
To simulate double and staggered tuned amplifiers.
REQUIREMENTS:
1. PC
2. PSPICE software
THEORY:
It also produces a sharper transition from the passband to the stopband. Both
staggered tuning and synchronous tuning circuits are easier to tune and manufacture
than many other filter types. The function of stagger-tuned circuits can be expressed
as a rational function and hence they can be designed to any of the major filter
responses such as Butterworth and Chebyshev. The poles of the circuit are easy to
PROCEDURE:
1. Click on the start menu and select the pspice simulation software
2. Select the parts required for the circuit from the parts menu and place
them in the work space
3. Connect the parts using wires
4. Save the file and select the appropriate analysis
5. Simulate the circuit and observe the corresponding output waveforms
CIRCUIT DIAGRAM:
DOUBLE TUNNED AMPLIFIER
MODEL GRAPH:
INFERENCE:
Thus the double and staggered tuned amplifier is simulated.
Ex. No.: 12
Date: BI-STABLE MULTIVIBRATOR
AIM:
To simulate an Bi-stable multivibrator using PSPICE.
REQUIREMENTS:
1. PC
2. PSPICE software
THEORY:
Bi- stable multivibrator contains two stable states and no quasi states. It
requires two clock or trigger pulses to change the states. It is also called as flip flop,
scale of two toggle circuit, trigger circuit. It is used in digital operations like
counting, storing data’s in flip flops and production of square waveforms.
PROCEDURE:
1. Click on the start menu and select the pspice simulation software
2. Select the parts required for the circuit from the parts menu and place
them in the work space
3. Connect the parts using wires
4. Save the file and select the appropriate analysis
5. Simulate the circuit and observe the corresponding output waveforms
CIRCUIT DIAGRAM:
MODEL GRAPH:
INFERENCE:
Thus the Bi-stable multivibrator is simulated using PSpice.
VIVA QUESTIONS:
Ex. No.: 13
Date: SCHMITT TRIGGER CIRCUIT WITH PREDICTABLE
HYSTERESIS
AIM:
To simulate Schmitt Trigger circuit with Predictable hysteresis.
REQUIREMENTS:
1. PC
2. PSPICE software
THEORY:
PROCEDURE:
1. Click on the start menu and select the pspice simulation software
2. Select the parts required for the circuit from the parts menu and place
them in the work space
3. Connect the parts using wires
4. Save the file and select the appropriate analysis
5. Simulate the circuit and observe the corresponding output waveforms
CIRCUIT DIAGRAM:
MODEL GRAPH:
INFERENCE:
Thus the Schmitt trigger is simulated using PSpice.
Ex. No.: 14
Date: ANALYSIS OF POWER AMPLIFIER
AIM:
To design and test the performance of power amplifier.
REQUIREMENTS:
S.No QUIPMENTS RANGE QUANTITY
1 Resistors
2 RPS (0-30)V 1
3 Transistor BC107 1
4 CRO (0-30)MHz 1
5 Capacitor 3.2nf 1
25pf 1
6 Bread board - 1
DESIGN EXAMPLE:
Given specifications:
VCC= 12V; hfe = 200; f=1 KHz; I c = 2mA; Vce (sat) = 0.2v; VBB= - 2V,
(i)To calculate RC:
RC = VCC - Vce (sat) / IC
RC = 12 – 0.2 / 2x10-3=5.9KΩ
(ii) To calculate R:
IB2(min)=IC2 / hfe= 2x10-3 / 200 = 10µ A
Select IB2 > IB1(min) (say 25µ A)
Then R = VCC – V BE (sat) / IB2
Therefore R= 12-0.7/25x10-6=452KΩ
(iii) To calculate C:
T=0.69RC
1x10-3= 0.69x452x103xC
C=3.2nf
To calculate R1 & R2:
VB1= {(VBB R1/ R1 +R2) + (VCE (sat) R2 / R1+R2)}
Since Q1 is in off state ,VB1 ≤ 0
Then (VBB R1/ R1 +R2) = (VCE (sat) R2 / R1+R2)
VBB R1 = VCE (sat) R2
2 R1 = 0.2 R2
Assume R1=10KΩ, then R2=100 KΩ
Consider, C1= 25pf (commutative capacitor)
THEORY:
An electronic amplifier is used for increasing the power of a signal. It does this
by taking energy from a power supply and controlling the output to match the input
signal shape but with a larger amplitude. In this sense, an amplifier may be
considered as modulating the output of the power supply.
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Give a negative trigger input to Q2.
3. Note the output of transistor Q2 and Q1.
4. Find the value of Ton and Toff.
CIRCUIT DIAGRAM:
MODEL GRAPH:
TABULATION:
TON TOFF
INFERENCE:
Thus the Power amplifier is designed and the performance is tested.
Theoretical period :
Practical period :
VIVA QUESTIONS:
Ex. No.: 15
Date: VOLTAGE AND CURRENT TIME BASE CIRCUITS
AIM:
To simulate voltage and current time base circuits by using PSPICE.
REQUIREMENTS:
1. PC
2. PSPICE software
THEORY:
PROCEDURE:
1. Click on the start menu and select the pspice simulation software
2. Select the parts required for the circuit from the parts menu and place
them in the work space
3. Connect the parts using wires
4. Save the file and select the appropriate analysis
5. Simulate the circuit and observe the corresponding output waveforms
CIRCUIT DIAGRAM:
MODEL GRAPH:
INFERENCE:
Thus the Voltage and Current time base circuits are simulated using Pspice.