SPI master and SPI slave for FPGA written in VHDL

Simple UART controller for FPGA written in VHDL

RMII Firewall FPGA

A sample design of Nios with on-board SDRAM for CYC1000 (a low cost Cyclone10 FPGA board)

SDRAM Tester implemented in FPGA

A simple driver for RGB Led Panels of different sizes

The CYC1000 FPGA Remote System Upgrade project

Base carrier board for ATLAS, cost reduced version.

Atari ST/STe core demistyfied. See Readme in board folder (Deca, ...)

Incredible code to implementen a pal signal with a level count of pins in verilog.

BBC micro - Demistified for Deca & Neptuno. [This fork is only a mirror, not for development]

RTL, a graphic form to deal with free wrappers in DVI signals

Diseñar la placa - ¡Créalo tu mismo! De coste más reducido para la Fpga CYC1000, con una BLUEPILL STM32F103C8T6

The core and firmware that uses nowadays the PI-PICO family for use in ATLAS I/O Board is located in GITLAB.

Una muy buena forma de transformar la IO BOARD ATLAS con CYC1000 en una entrenadora en toda regla

Core creado por Miguel Angel

This code creates a bidimensional pattern.

Error de Fallo de las instancias de memoria en Quartus II Lite dado que son asíncronas.

Prácticas muy interesantes donde nos enseñan a usar las características de la MAX1000.