Gowin has clear advantages over Xilinx in the educational FPGA board market: Gowin boards are several times less expensive, the synthesis speed is several times faster, and the EDA package is two orders of magnitude smaller: we are talking about 1G versus 100G disk space. Of course, Xilinx is still the king of high-end prototyping boards that cost $10K-100K, but for the students such boards are irrelevant; such boards are for ASIC design companies. A beginning EE student needs a board for less than $100, and Gowin not only fits the bill but also covers all the needs, specifically:
Electronics for beginners
Arduino, DYI and how to assemble electronics
The results of 7 Verilog meetups + the goals and the steps going forward
Since the New Year we had 7 Verilog meetups at HackerDojo. We discussed the modern way of designing digital circuits using hardware description languages, the exercises on FPGA boards and the topic of microarchitecture. For the last two sessions we went over the most basic CPU core that can be used as a baseline for further exercises.
Now, in order to make progress toward the goal of creating new educational materials, it is essential for the regular participants to solve all the homework exercises (see the details in the post below) in parallel with studying the recommended materials.
The next steps are:
1) We are going to do weekly Zoom calls on Sundays, starting March 24, 2024 at 11 am California time (summer time). The link. During this call we are going to discuss the SystemVerilog Homework and the individual projects.
2) Once we develop more materials, we are going to organize a Show-and-Tell session in Hacker Dojo, for a wider audience. During the session several participants from the core team will present demos on various FPGA boards and explain to the curious how FPGA and ASIC work.
Bootstrapping Azerbaijan as a new center of ASIC design + Verilog Meetup #6 in Silicon Valley
Last week I was doing a seminar on SystemVerilog, ASIC and FPGA at ADA University in Baku, Azerbaijan. I will replicate the last two sessions of this seminar, on RISC-V CPU simulation and synthesis, at the Verilog Meetups on March 3 and March 10 at Hacker Dojo, Mountain View, California. For this reason I am combining the information about Azerbaijan and California seminars in a single post.
First, let's talk about ADA University.
The first Silicon Valley meetup on portable SystemVerilog examples for ASIC and FPGA
Need to start your career or hobby in digital design and verification of silicon chips or reconfigurable hardware? Explore multiple FPGA toolchains and open-source ASIC tools? Design your own RISC-V CPU or ML accelerator? Prepare for an interview in SystemVerilog? Come to our first Silicon Valley meetup on portable SystemVerilog examples for ASIC and FPGA.
Exploring VALID/READY protocol, pipelines and experimenting with flow control using an HDL training tool
СÑÑлка на ÑÑÑÑкÑÑ Ð²ÐµÑÑÐ¸Ñ / link to Russian version
Understanding valid/ready protocol is extremely important for every microarchitect.
Valid/ready is one of the main protocols used to organise flow-control inside a logic block as well as on inter-block (SoC) level.
In the last lesson, we explored FIFO buffer using hdlgadgets - human-in-the-loop HDL training tool.
This time we will take two FIFO buffers (which form a pipeline with valid/ready handshakes) and will experiment with it by changing flow-control logic of the pipeline.
We will show that valid/ready is not only a mechanism for transferring data from one FIFO queue to another, but also a method for organizing various kinds of logical functionality between queues.
If you have not worked with valid/ready protocol before, you will be surprised how easy it is to achieve desired functionality of the design by simply writing couple of lines of Verilog code in the handshaking logic block between two FIFOs.
Exploring FIFO principles using an HDL training tool
СÑÑлка на ÑÑÑÑкÑÑ Ð²ÐµÑÑÐ¸Ñ / link to Russian version
FIFO is a key concept in hardware design. Understanding of FIFO is necessary for understanding the valid/ready protocol, which in turn is necessary for organisation of flow-control within a design.
Unfortunately, there are very few books on this topic, and to be fair, microarchitectural concepts are quite difficult to master from books, since understanding of these concepts are coming with practice. In other words it is more about developing hardware intuition.
The idea of the HDL training tool is that it can help develop a hardware intuition, providing the opportunity to explore ready-made scenarios in a step-by-step interactive way. The tool also provides detailed visualization of a simulated scenario.
Since the tool is a front-end for the HDL simulator, the real, synthesized SystemVerilog is executed on the simulator itself, which can be viewed and even modified.
So, the video of exploring FIFO on the training tool is here:
Wi-Fi internet radio from a router with station switching capability
ChatGPT was not used in writing this article. The animated image uses the webp file format instead of gif. |
In this article, you will find a complete description of how to make a Wi-Fi internet radio receiver from a router that can play mp3 streams from internet radio stations. It is also possible to switch between two internet radio stations. We will use OpenWRT firmware installed on the router to create a Wi-Fi internet radio. It is possible to complete this project without using a soldering iron. All the components can be placed inside the router to create a finished device â a Wi-Fi internet radio. |
- Any router with a USB port that can be installed with OpenWRT, a Linux-based operating system designed for embedded systems. You can check if your router is compatible with OpenWRT on this page: https://openwrt.org/toh/start.
- A USB sound card that costs $1-$2.
- Any passive (or active) speakers.
- Two patch cords â twisted pair crimped with 8P8C connectors (also known as RJ-45).
- A personal computer.
- Ethernet and Wi-Fi internet connection (optional).
About LC ladders
LC ladder component values can have different values for the same transfer function. Published tables have only one set. Why?
Android for electronics design engineers
There is a list of well-known electronics design tools for Android which can be found in every review for the last 10 years: âElectrodocâ, âEvery Circuitâ, âDroid Teslaâ, âElectronics Toolboxâ, âRF & Microwave Toolboxâ and so on. Also, there is a lot of trash on the market that turns finding a good tool into a quest.
This short review is about an unknown but cool tool âCircuit Calculatorâ working on Android devices and intended for professional electronics designers.
âFPGA InsideOutâ â animation about CRC and parallel CRC calculation
СÑÑлка на ÑÑÑÑкÑÑ Ð²ÐµÑÑÐ¸Ñ / link to Russian version
FPGA InsideOut is an attempt to make a set of educational FPGA videos presented in the âhuman-in-the-loopâ style. In these videos we will not only show how we are interfacing with an actual FPGA board but will also provide synchronous real-time visualisation of FPGA's internal logic.
For our first video we have picked a CRC circuit (cycle redundancy check) which is based on a linear feedback shift register. This circuit goes through several transformations during the course of the video. Intrigued? - letâs watch the video.
Making an Encoder Cable for Servosila Brushless Motor Controller. Testing in Direct Drive mode
In this video, we are making a cable for connecting a quadrature encoder to a Servosila brushless motor controller, and and then running a servo motor in Direct Drive mode. To make the cable we are using a cable assembly kit that can be purchased from the internet store. Alternatively, the components for the cable can be bought in other places. The part numbers are given in the controller's datasheet.
The cable assembly kit consists of a connector and a set of wires with pre-crimped socket blades. If you have a crimper tool, you can also attach the socket blades to wires by yourself.
Lets open a datasheet document that comes with the brushless motor controller. Note that each connector has its first pin clearly marked with a "1" sign. Conventionally, the numbering of pins is done in such a way that there are rows of odd-numbered and even-numbered pins.
The quadrature encoder's electrical interface has 5 wires in total. Positions of the pins of each of the wires are given in the table. The socket blades need to be pushed into the connector until you feel a "click". The blades lock into the connector's sockets. Optionally, primarily for cosmetic reasons, you may want to add a heat-shrink tubing to your cable.
The brushless motor controllers come in two distinct forms, a circular and a rectangular one. Both models are identical in terms of capabilities, features, firmware, and external electrical connectors.
The connector has a locking mechanism that keeps it in place. I soldered a mating connector to the other side of the cable - a connector that my brushless motor needs. Note that your motor will likely require a different connector, or no connector at all. It is always a good idea to test an end-to-end integrity of the cable and its connectors. Lets buzz the wires using a multimeter. The cable is ready.
SEPIC-Äuk split-rail converter average model
SEPIC-Äuk split-rail converter can be used to make positive and negative supplies from a single input voltage for relatively well-matched loads like operational amplifiers.
Transient models are time consuming. Average models reduce modeling time drastically.
The PWM switch average models for current- and voltage-mode are described in details in Christophe Bassoâs book âSwitch-Mode Power Supplies, Second Edition: SPICE Simulations and Practical Designsâ. Using of these models for SEPIC and Äuk converters is also shown.
This text shows how to use the PWM switch average model to design a split-rail SEPIC-Äuk converter.
A note on small-signal modeling of SEPIC CM CCM
Knowing parameters of small-signal control-to-output transfer functions makes it easier for engineers to design compensation networks of DC/DC converters. The equations for SEPIC can be found in different works and Application Notes, but there are differences. A work has been done to solve this problem.
Simplified design equations for SEPIC with Current Mode control (CM) in Continuous Conduction Mode (CCM) suitable for practical design of compensation networks are shown.
Controlling Brushless Motors using a Linux computer or a PLC
In this video, we will look at how to connect brushless motor controllers to a Linux computer. Specifically, we will use a computer running Debian. The same steps would work for Ubuntu Linux and other Linux distributions derived from Debian.
I've got a small sensorless brushless motor, and a bigger brushless motor with a built-in absolute encoder. Lets look at how to control those from my Debian Linux computer. Servosila brushless motor controllers come in several form factors with either a circular or a rectangular shape. The controllers come with a set of connectors for motors and encoders as well as for USB or CANbus networks.
The controllers can be powered by a power supply unit or by a battery. To spice up my setup, I am going to use a battery to power the controllers and thus their motors. The controllers need 7 to 60 volts DC of voltage input. If I connect the battery, the controllers get powered up. The small LED lights tells us that the controllers are happy with the power supply.
We need to connect the brushless motor controllers to the Linux computer. There are two ways to do that - via CANbus or via USB. Lets look at the USB option first. A regular USB cable is used. Only one of the controllers needs to be connected to a computer or a PLC.
Next, we need to build an internal CANbus network between the controllers. We are going to use a CANbus cross-cable to interconnect the controllers. Each controller comes with two identical CANbus ports that help chain multiple controllers together in a network. If one of the interconnected brushless motor controllers is connected to a computer via USB, then that particular controller becomes a USB-to-CANbus gateway for the rest of the network. Up to 16 controllers can be connected this way via a single USB cable to the same control computer or a PLC. The limit is due to finite throughput of the USB interface.
DSO138 upgrade
On Ali, an interesting toy â an oscilloscope called DSO138 is sold for a very inexpensive price. It has already gained quite a lot of popularity among electronics lovers, but the parameters of this device, alas, allow it to be more or less fully used only for debugging very low-frequency circuits. Actually, it is not positioned as a tool, but rather as a DIY-kit for novice electronics engineers.
This "toy" oscilloscope is assembled on the STM32F103 microcontroller, and with a fairly competent circuit design of the digital part, the presence of a fairly decent 320X240-dot color display, and not the most rotten analog path, everything, alas, is ruined by very weak ADCs on board the 32F103. The claimed band of 200 kHz can be recognized as such only with a very large stretch. Yes, it will show the presence or absence of a signal with such a frequency, but it will not be possible to really look at something beyond this.
At the same time, the 103-series has a slightly more powerful brother - the STM32F303, it is almost completely compatible with the legs, but it is significantly better in terms of the parameters we are interested in, there are 4 ADCs on board with a conversion frequency of 5 MHz (6 MHz with a 10-bit resolution). In this scenario, if you use all 4 ADCs in parallel with a 10-bit resolution, you can get a effective resolution of up to an honest 24 MSPS (millions of samples per second). The microcontroller is also inexpensive; you can easily find it on the same Ali for very reasonable money again. It is clear that the idea to change the microcontroller arose almost immediately after I tried this DSO138.
At the same time, if upgraded the toy can turn out to be a completely full-fledged tool that even professionals, not just novice amateurs, could already use. With these thoughts in mind, I decided to try to do something with a Chinese toy in my free time.
RS485 â a standard for industrial networks. What are the main features of the transceiver microcircuit?
When building a network for communication between a large number of devices, one may think: what interface to choose? Each interface has its own pros and cons that determine its application: CAN â Automotive, RS485 / RS232 â Industrial, Ethernet â Consumer Electronics / Server. What features of the transceiver microcircuit help to protect against many problems during installation and operation? How is the process of measuring and researching of transceiver microcircuits going on? New RS485 microcircuit is ready to get to market!
4th Order Low-pass Filter with 1 Op Amp
The idea to build a 4th order low-pass filter looks simple: add one more feedback loop. But there are pitfalls, as always.
Gyrators
Gyrators are impedance converters usually used to simulate inductance in circuits. Though they are rarely used in discrete electronics, they are interesting circuits looking like pole dancers in pictures. There are studies on gyrators, but still something is missing, so it is interesting to do another one.
3rd Order Low-pass Filter with 1 Op Amp
Common approach to build a 3rd order low-pass filter is to use two circuit stages and two Op Amps. Making a good One Op Amp design is not always easy, but it is possible.
Active Termination Drivers
The easiest way to build a driver with specified output impedance is to use an amplifier with high load compatibility and add a resistor to its output. The penalty is a voltage drop across this resistor, so there is power loss and we need a higher supply voltage. If our driver is able to deliver the same voltage and current to the same load, but the extra resistor will have a lower value, our device will be able to deliver the same output power at a lower supply voltage. Less power losses, less heat, and longer working time when a battery is used.
There is an idea how to solve this problem: active termination. We can synthesize the output impedance!
Now when we know what we want, go to design our drivers!
Authors' contribution
DAN_SEA 4359.0Lunathecat 4073.0dmitriyrudnev 2462.0Tiberius 2203.8megalloid 1312.0olartamonov 1309.0alizar 1295.4amartology 1288.0iliasam 1275.6OldFashionedEngineer 1263.0