2009年08鐃緒申14鐃緒申
ARM11鐃塾パフワ申鐃緒申鐃殉ンスワ申縫鐃緒申鐃緒申鐃緒申僂鐃緒申鐃緒申鐃獣縁申兵孫垰鐃緒申屬侶鐃渋�鐃緒申法
ARM11鐃緒申CP15鐃祝パフワ申鐃緒申鐃殉ンスワ申縫鐃緒申鐃緒申鐃緒申蝓�鐃緒申鐃塾ワ申鐃緒申鐃緒申鐃暑カ鐃緒申鐃藷タわ申鐃緒申鐃術わ申鐃銃器申単鐃祝プワ申鐃緒申鐃緒申鐃緒申2鐃緒申鐃瞬の誌申鐃瞬わ申鐃渋�鐃緒申鐃暑こ鐃夙わ申鐃叔わ申鐃殉わ申鐃緒申
鐃緒申測鐃術の関随申鐃緒申鐃准に使わ申鐃緒申茲�鐃祝ワ申鐃緒申鐃緒申鐃緒申鐃緒申鐃宿わ申鐃縦のヘッワ申鐃春ワ申鐃緒申鐃緒申砲泙箸鐃銃みまわ申鐃緒申鐃緒申
鐃緒申鐃緒申愎鐃緒申鐃淑ｏ申鐃緒申鐃緒申鐃祝￥申納鐃緒申鐃緒申鐃緒申董鐃緒申匹鐃緒申蕕�速鐃緒申鐃緒申鐃緒申鐃緒申咾鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃叔わ申鐃緒申
鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申
鐃緒申鐃緒申鐃藷タわ申鐃宿み出わ申鐃塾誌申鐃塾ワ申鐃緒申鐃出￥申鐃舜ッドを少なわ申鐃緒申鐃暑た鐃潤イ鐃緒申薀わ申鐃舜随申鐃祝わ申鐃銃わ申鐃殉わ申鐃緒申
gcc鐃塾鰹申張鐃緒申法鐃緒申鐃緒申僂鐃緒申討鐃緒申泙鐃緒申鐃�
#ifndef __KMC_PMON_ARM11_H
#define __KMC_PMON_ARM11_H
/* Performance Monitor Control Register of ARM1136*/
#define CMCR_ECC 6
#define CMCR_D 3
#define CMCR_C 2
#define CMCR_E 0
volatile __inline__ static unsigned long __attribute__((always_inline))
pmon_start_cycle_counter()
{
unsigned long x;
asm volatile("mrc p15, 0, %0, c15, c12, 0" : "=r" (x));
x |= ((1 << CMCR_D) | (1 << CMCR_C) | (1 << CMCR_E));
x &= ~(1 << CMCR_ECC);
asm volatile("mcr p15, 0, %0, c15, c12, 0" :: "r" (x));
asm volatile("mrc p15, 0, %0, c15, c12, 1" : "=r" (x));
return x;
}
volatile __inline__ static unsigned long __attribute__((always_inline))
pmon_read_cycle_counter()
{
unsigned long x;
asm volatile ("mrc p15, 0, %0, c15, c12, 1": "=r" (x));
return x;
}
#endif /* __KMC_PMON_ARM11_H */
鐃緒申鐃緒申鐃緒申法
pmon_arm1136.h 鐃薯インクルー鐃宿わ申鐃緒申(#include "pmon_arm11.h")
鐃叔緒申鐃�pmon_start_cycle_counter()鐃緒申討鐃叔ワ申鐃緒申鐃緒申箸鬟好鐃緒申鐃緒申箸鐃緒申鐃緒申泙鐃緒申鐃�
鐃緒申鐃塾醐申鐃叔わ申佞里箸鐃緒申鐃緒申鐃�pmon_read_cycle_counter()鐃叔ワ申鐃緒申鐃緒申鐃暑カ鐃緒申鐃藷タわ申鐃宿み出わ申鐃緒申鐃緒申鐃塾削申分鐃叔誌申鐃瞬わ申廚鐃殉わ申鐃緒申
鐃初イ鐃瞬ワ申鐃淑どわ申鐃宿加わ申鐃緒申必鐃竣わ申鐃淑わ申鐃塾で￥申Makefile鐃緒申鐃緒申鐃術刻申鐃緒申鐃緒申鐃竣でわ申鐃緒申
鐃緒申測鐃緒申鐃緒申鐃緒申鐃緒申分鐃塾ワ申鐃緒申鐃緒申鐃春ワ申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申儿鐃緒申濃箸鐃緒申泙鐃緒申鐃�
鐃緒申鐃緒申鐃緒申
#include <stdio.h>
#include "pmon_arm11.h"
int func(int x)
{
int sum = 0;
int i;
for (i = 1; i <= x; i++) {
sum += i;
}
return sum;
}
int
main()
{
unsigned long start, end;
int x;
start = pmon_start_cycle_counter();
x = func(1000);
end = pmon_read_cycle_counter();
printf("time = %ld, x = %d\n", end - start, x);
return x;
}
鐃緒申鐃春誌申鐃緒申
- ARM1136鐃叔わ申鐃獣醐申鐃盾ー鐃宿でわ申鐃緒申鐃緒申鐃術でわ申鐃殉わ申鐃藷。わ申鐃緒申魯鐃緒申鐃緒申鐃緒申襯�鐃緒申鐃藷タのレジ鐃緒申鐃緒申鐃緒申鐃獣醐申鐃盾ー鐃宿でなわ申鐃夙呼び書きでわ申鐃淑わ申鐃緒申鐃緒申任鐃緒申鐃�ARM1176鐃叔わ申Secure User and Non-secure Access Validation Control Register 鐃緒申鐃緒申鐃緒申妊罅種申鐃緒申鐃緒申癲種申匹任鐃緒申鐃術でわ申鐃緒申茲�鐃祝なわ申泙鐃緒申鐃�
- CortexA8,A9鐃叔わ申Performance Monitor Control Register鐃塾逸申鐃瞬わ申鐃純う鐃塾わ申mrc, mcr命鐃緒申僚鐃緒申鐃緒申鐃宿�鐃竣￥申
- 64分鐃緒申鐃緒申鐃緒申癲種申匹妊鐃緒申鐃緒申鵐燭鐃緒申鐃術わ申鐃銃わ申鐃殉わ申鐃緒申鐃緒申鐃緒申鐃緒申任鐃緒申鐃�8分半鐃循どわ申32bit鐃塾ワ申鐃緒申鐃藷タは逸申鐃緒申鐃緒申討鐃緒申泙鐃緒申泙鐃緒申鐃�(KZM-ARM11鐃旬￥申鐃緒申鐃塾常申鐃�)
