2024年07鐃緒申11鐃緒申
SoftFloat鐃緒申未鐃緒申鐃銃逸申鐃出ワ申鐃緒申3鐃祝わ申鐃盾そ鐃緒申単鐃緒申鐃緒申鐃緒申動鐃緒申鐃緒申鐃緒申鐃緒申鐃初算鐃薯ソフトワ申鐃緒申鐃緒申鐃緒申鐃淳ワ申譟種申鐃緒申鐃藷すわ申愎鐃緒申硫鐃緒申鐃緒申鐃緒申鐃�float鐃祝わ申鐃緒申戮鐃�
鐃緒申鐃緒申鐃緒申竜鐃緒申鐃�鐃叔わ申
鐃緒申鐃緒申鐃緒申未鐃緒申鐃銃逸申鐃出ワ申鐃竣と呼ぶのわ申適鐃准なのわ申鐃熟種申鐃緒申鐃緒申鐃緒申鐃緒申泙鐃緒申鵑�￥申鐃緒申鐃緒申鐃初く鐃竣ワ申鐃緒申鐃緒申泙砲鐃� 鐃緒申uint32_t 鐃緒申 31 鐃俊ット縁申鐃緒申鐃春トわ申鐃緒申鐃緒申隋�bit 0 鐃淑鰹申鐃緒申鐃緒申鐃緒申 0 鐃祝なり、0x0 鐃緒申 0x1 鐃塾どわ申鐃初か鐃緒申必鐃緒申鐃淑わ申廚箸鐃緒申鐃緒申鐃緒申曚硫鐃緒申蠅�鐃緒申鐃獣わ申鐃塾ではなわ申鐃緒申鐃夙思わ申譟�鐃緒申鐃緒申鐃夙は限わ申覆鐃緒申箸鐃緒申鐃緒申鐃縮ｏ申鐃縮わ申鐃緒申動鐃緒申丱鐃緒申箸鐃緒申泙鐃緒申鐃緒申鐃�鐃緒申鐃緒申竜鐃緒申鐃�鐃叔わ申
鐃緒申鐃緒申僖鐃緒申鐃初イ鐃藷タワ申鐃緒申愎鐃緒申鐃� C 鐃緒申鐃緒申鐃緒申佑鐃緒申鐃緒申討任呂覆鐃緒申鐃緒申鐃緒申鐃緒申縫鐃緒申鐃術ワ申鐃緒申亮鐃緒申鐃緒申鳩鐃俊つわ申鐃緒申鐃緒申痢淵鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申琉鐃緒申鐃緒申塙佑鐃緒申鐃緒申鐃祝なので￥申鐃淑わ申任發�鐃緒申覆里任鐃緒申腓�鐃緒申
鐃叔はなわ申 compiler-rt 鐃塾関随申鐃緒申鐃緒申鐃緒申廚覆里鐃緒申鐃緒申箸鐃緒申鐃緒申鐃緒申笋�鐃緒申鐃殉わ申泙鐃緒申鐃緒申鐃緒申匹鐃緒申鐃曙ジ鐃緒申鐃緒申鐃熟わ申鐃緒申鐃緒申討鐃緒申鐃緒申佑鐃緒申鐃駿ワ申鐃緒申鐃獣ワ申鐃祝書き刻申鐃緒申鐃緒申鐃緒申鐃春わ申鐃緒申鐃術器申鐃緒申鐃銃逸申鐃獣てわ申鐃暑か鐃緒申鐃緒申鐃緒申廚覆茲�鐃叔わ申鐃緒申鐃淑どとわ申鐃殉わ申鐃緒申鐃銃緒申鐃緒申蕕誌申討鐃緒申泙鐃緒申泙鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃縦器申戮泙鐃緒申鐃緒申鐃�
鐃緒申鐃盾そ鐃緒申鐃緒申鐃緒申鐃� __ltsf2 鐃緒申鐃熟ってわ申鐃緒申里鐃� float 鐃緒申鐃塾よう鐃叔￥申鐃緒申鐃塾まわ申 uint32_t 鐃叔逸申鐃獣てはわ申鐃緒申鐃淑わ申鐃塾わ申鐃盾し鐃緒申泙鐃緒申鐃�
鐃緒申劼慮鐃緒申擇硫鐃緒申弔鐃緒申鐃祝駈申鐃緒申鐃銃わ申鐃獣わ申鐃塾でわ申鐃緒申鐃緒申鐃淑駕申鐃緒申鐃緒申鐃淑常申虜鐃緒申鐃夙なわ申泙鐃緒申鐃�
RISC-V Calling Conventions
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-cc.adoc
鐃渋際に鰹申認鐃緒申鐃銃みまわ申鐃緒申鐃緒申
鐃緒申鐃緒申竜鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃銃逸申鐃緒申覆鐃緒申辰鐃緒申鐃緒申鐃緒申匹鐃緒申録鐃緒申鐃殉わ申鐃緒申
鐃緒申鐃緒申鐃緒申 compiler-rt 鐃塾関随申鐃熟￥申鐃緒申鐃緒申鐃獣ワ申鐃祝プッワ申鐃遵し鐃銃わ申鐃暑か鐃緒申任呂覆鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃� float 鐃緒申鐃緒申鐃緒申鐃緒申討鐃緒申襪�鐃緒申鐃緒申鐃緒申鐃銃逸申鐃緒申里鐃緒申鐃緒申箸鐃緒申鐃緒申鐃緒申箸鐃緒か鐃緒申泙鐃緒申鐃緒申鐃�
compiler-rt 鐃塾わ申鐃緒申鐃緒申鮖温佑砲鐃緒申董鐃緒申焚鐃緒申里茲�鐃祝ワ申鐃緒申鐃宿わ申鐃緒申鐃緒申鐃殉わ申鐃緒申鐃緒申
RISC-V Calling Conventions
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-cc.adoc
Integer Calling Convention鐃縦まりコ鐃緒申僖鐃緒申鐃緒申鵐織鐃緒申鐃舜随申鐃叔わ申鐃暑か鐃宿わ申鐃緒申鐃夙わ申無鐃舜件申鐃叔￥申SoftFloat 鐃塾ワ申鐃緒申鐃宿わ申鐃緒申鐃緒申鐃緒申鐃熟緒申鐃緒申 RISC-V 鐃塾呼び出わ申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃薯してわ申鐃淑わ申鐃緒申鐃夙わ申鐃緒申発鐃緒申鐃緒申鐃銃わ申鐃殉わ申鐃緒申鐃縦まわ申 float 鐃叔はなわ申 uint32_t 鐃緒申箸辰鐃緒申鐃銃逸申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申潺鐃曙ー鐃緒申鐃緒申鐃舜随申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申箸鐃緒申鐃緒申鐃緒申任鐃緒申鐃緒申鐃�uint32_t 鐃叔はなわ申 float 鐃緒申鐃緒申鐃緒申鐃緒申討鐃緒申鐃出￥申鐃緒申鐃� 32 bit 鐃緒申未鐃緒申鐃緒申覆里如鐃緒申鐃緒申鐃縦ワ申鐃緒申蠅件申鐃緒申鐃重�鐃緒申鐃熟でわ申鐃淑わ申鐃熟わ申鐃叔わ申鐃緒申
The base integer calling convention provides eight argument registers, a0-a7, the first two of which are also used to return values.
Scalars that are at most XLEN bits wide are passed in a single argument register, or on the stack by value if none is available. When passed in registers or on the stack, integer scalars narrower than XLEN bits are widened according to the sign of their type up to 32 bits, then sign-extended to XLEN bits. When passed in registers or on the stack, floating-point types narrower than XLEN bits are widened to XLEN bits, with the upper bits undefined.
鐃淑以駕申鐃緒申RV64I = XLEN 鐃緒申 64 鐃緒申鐃緒申鐃緒申箸鐃緒申鐃緒申鐃緒申鐃緒申鐃�
RISC-V 鐃緒申鐃緒申鐃緒申鐃銃び出わ申鐃緒申鐃緒申
鐃緒申鐃緒申的鐃緒申鐃緒申鐃緒申鐃銃び出わ申鐃緒申鐃緒申任鐃� a0-a7 鐃緒申 8 鐃縦の関随申鐃緒申鐃緒申鐃曙ジ鐃緒申鐃緒申鐃緒申鐃緒申僂鐃緒申鐃緒申能鐃緒申 2 鐃縦￥申a0鐃緒申a1鐃祝わ申鐃緒申鐃緒申佑砲鐃緒申鐃緒申僂鐃緒申鐃暑。64 bit 鐃殉でのワ申鐃緒申鐃緒申鐃粛わ申単鐃緒申離譽醐申鐃緒申鐃緒申粘愎鐃緒申鐃緒申呂鐃緒申鐃暑。鐃曙ジ鐃緒申鐃緒申鐃緒申足鐃緒申覆鐃緒申鐃緒申魯鐃緒申鐃緒申奪鐃緒申鐃緒申鐃緒申鐃熟わ申鐃緒申鐃緒申襦�
64 bit 鐃淑駕申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃粛わ申鐃曙ジ鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃獣ワ申鐃緒申鐃熟わ申鐃曙た鐃夙わ申鐃緒申鐃緒申鐃祝縁申鐃緒申鐃緒申 32 bit 鐃殉で鰹申張鐃緒申鐃曙、鐃緒申鐃塾醐申 64 bit 鐃緒申鐃緒申鐃緒申張鐃緒申鐃緒申襦�64 bit 鐃淑駕申鐃緒申鐃緒申動鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申= float鐃祝わ申鐃曙ジ鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃獣ワ申鐃緒申鐃熟わ申鐃曙た鐃緒申鐃塾常申鐃� 32 bit 鐃緒申未鐃緒申鐃緒申鐃�
鐃渋際に鰹申認鐃緒申鐃銃みまわ申鐃緒申鐃緒申
鐃緒申鐃緒申竜鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃銃逸申鐃緒申覆鐃緒申辰鐃緒申鐃緒申鐃緒申匹鐃緒申録鐃緒申鐃殉わ申鐃緒申
int __ltsf2(uint32_t a, uint32_t b) {
int aSign = a >> 31;
int bSign = b >> 31;
if (aSign != bSign) return -1;
return 1;
}
鐃緒申鐃塾ワ申鐃緒申鐃宿わ申鐃緒申楼焚鐃緒申里茲�鐃淑￥申31 bit 同鐃塾わ申鐃緒申咾里呂鐃緒申覆里法鐃緒申鐃緒申鐃縦ワ申鐃緒申蠅件申鐃� 63 bit 鐃旬わ申鐃緒申咾鐃緒申討鐃緒申鐃夙わ申鐃緒申鐃緒申鐃緒申鐃宿わ申鐃出まわ申鐃緒申鐃緒申
__ltsf2: xor a0, a1, a0 srai a0, a0, 63 ori a0, a0, 1 ret鐃緒申鐃緒申鐃銃わ申鐃塾常申鐃熟わ申鐃緒申任鐃緒申鐃緒申鐃淑わ申動鐃緒申鐃塾でわ申鐃緒申鐃緒申鐃緒申鐃緒申竜鐃緒申鐃�鐃叔醐申鐃准わ申鐃緒申鐃処う鐃祝￥申cimagf() 鐃緒申鐃緒申鐃緒申鐃緒申鐃曙た鐃緒申鐃緒申鐃緒申張鐃緒申鐃曙た鐃粛わ申鐃緒申鐃獣てわ申鐃緒申鐃緒申鐃緒申鐃緒申鐃銃逸申鐃緒申泙鐃緒申鵝�（わ申鐃緒申鐃銃わ申鐃塾常申鐃� float 鐃叔わ申鐃緒申鐃緒申張鐃緒申鐃緒申泙鐃緒申鐃緒申鐃縮わ申鐃緒申鐃淑のわ申 cimagf() 鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申張鐃緒申鐃曙た鐃粛わ申鐃緒申鐃緒申鐃緒申鐃粛でわ申鐃緒申鐃緒申
鐃緒申鐃緒申鐃緒申 compiler-rt 鐃塾関随申鐃熟￥申鐃緒申鐃緒申鐃獣ワ申鐃祝プッワ申鐃遵し鐃銃わ申鐃暑か鐃緒申任呂覆鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃� float 鐃緒申鐃緒申鐃緒申鐃緒申討鐃緒申襪�鐃緒申鐃緒申鐃緒申鐃銃逸申鐃緒申里鐃緒申鐃緒申箸鐃緒申鐃緒申鐃緒申箸鐃緒か鐃緒申泙鐃緒申鐃緒申鐃�
compiler-rt 鐃塾わ申鐃緒申鐃緒申鮖温佑砲鐃緒申董鐃緒申焚鐃緒申里茲�鐃祝ワ申鐃緒申鐃宿わ申鐃緒申鐃緒申鐃殉わ申鐃緒申鐃緒申
$ cat lt_float.c
#include <stdint.h>
static __inline uint32_t toUINT32(float x) {
const union {
float f;
uint32_t i;
} rep = {.f = x};
return rep.i;
}
int __ltsf2(float x, float y) {
uint32_t a = toUINT32(x);
uint32_t b = toUINT32(y);
int aSign = a >> 31;
int bSign = b >> 31;
if (aSign != bSign) return -1;
return 1;
}
鐃緒申適鐃緒申鐃薯かわ申鐃銃わ申鐃緒申鐃緒申鐃銃逸申鐃緒申泙鐃緒申鐃緒申鐃�
$ clang $CLANG_CFLAGS -g -O2 test_complex_main.c test_complex.c lt_float.c $PTHREAD_STUBS $QEMU_LDFLAGS $CLANG_LDFLAGS $ /c/msys64/ucrt64/bin/qemu-system-riscv64.exe -M virt -m 2G -nographic -semihosting -bios none -kernel a.out -2.000000 < 0 -> true鐃緒申鐃緒申鐃緒申鐃曙た鐃緒申鐃緒申鐃宿は以駕申鐃塾よう鐃祝￥申鐃緒申鐃緒申鐃緒申 bit 31 鐃緒申鐃緒申咾鐃緒申討鐃緒申泙鐃緒申鐃�
__ltsf2: xor a0, a1, a0 sraiw a0, a0, 31 ori a0, a0, 1 retunion 鐃緒申鐃塾ワ申鐃緒申鐃獣ワ申鐃術随申鐃緒申鐃獣てわ申鐃暑か鐃緒申鐃駿わ申鐃淑わ申里任蓮弔隼廚鐃緒申泙鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鐃緒申鳳討鐃緒申鐃緒申無鐃緒申鐃緒申適鐃緒申鐃緒申鐃曙た鐃緒申鐃緒申鐃宿わ申鐃出てわ申鐃殉わ申鐃緒申
