CHAPTER 1

OVERVIEW
1.1 INTRODUCTION
Now you can control your mouse cursor and windows media player with your TV
remote. So when you are watching a movie or listening songs on your PC, you need not
to get up from your seat to change the volume or to change the track you can simply use
your TV remote to do this for you.
This project is an implementation of RC5-remote reception on an 8052
microcontroller. The received code is decoded and sent to the PC IR remote software
written in Visual Basic. The cursor position is moved according to the keys pressed.
There are two modes of operation one is as mouse control and second is Windows media
player control. The convenience of selecting TV channels using your remote and then
pointing the same remote to your Computer so that you can control the whole system
using the single remote control. The 8052 microcontroller is used to control all the
system. An integrated Infrared Receiver is used to receive the infrared signal from the
remote control handset.
The received infrared signal was decoded by using the program, which was
written on the ROM of the Microcontroller. The programs are flashed on the ROM area
of the Microcontroller. The Flash memory is a type of EEPROM. The Details of the
switch pressed was sent to the PC through its serial port. In the PC, Visual Basic was
used to control the PC through the API functions.

1.2 AIM OF THE PROJECT

The main goal of the project is to control mouse cursor and windows media
player with TV remote. This is done with the implementation of RC5-remote on an 8052
microcontroller. Here the IR receiver is connected to the microcontroller. The
microcontroller is connected to the pc through RS232. When a certain key is pressed in
the remote, it sends infrared signal through its IR transmitter to the IR receiver which is
connected to the 8052 microcontroller the received infrared signal is decoded by using
the program written on the ROM of the microcontroller. Hence the operations of cursor
and windows media player are performed according to the key pressed.

1.3 COMPONENTS AND METHODOLOGY

1.3.1 HARDWARE COMPONENTS

Microcontrollers

Power supply

Voltage level converter

IR Transmitter

IR Receiver

PC

1.3.2 SOFTWARE TOOLS

Small Device Cross Compiler and Keil u-Vision3

Embedded C, Flash Magic.

Power Supply

Voltage
Level
Converter

CONTROLLIN
G UNIT

IR
Receiver

IR
Transmitter

PC
FIGURE 1.1: BLOCK DIAGRAM: OVERVIEW

Stepping down the 230V to 12V by the step down transformer.

The step downed A.C voltage is being rectified by the Bridge Rectifier.

The rectified A.C voltage is now filtered

Now the rectified, filtered D.C. voltage is fed to the Voltage Regulator.

This rectified, filtered and regulated voltage is again filtered for ripples

The output of 5V is generated first by this section which is fed to the Vcc pin or 40 th
pin of the microcontroller to supply operating voltage.

Crystal oscillator which is in conjunction with few capacitors is connected to the 18 th

and 19th pin of the microcontroller.

RS 232 is connected to the microcontroller to interface with PC.

MAX 232 IC is working as the interface between the RS 232 and the
microcontroller.

IR receiver is connected to the microcontroller through the port 3. IR receiver is

connected to P3.0

IR transmitter is fixed in the remote.

The IR transmitter transmits certain infrared signal with respect to the keys pressed in
the RC5 TV remote to the IR receiver which is connected to the 89S52

microcontroller.
The mouse cursor and the windows media player in the PC functions according to the
keys pressed in the TV remote.

1.4 SIGNIFICANCE AND APPLICATIONS

The use of some wireless mouse that are having the disadvantages like occupying
more space, more complex system, high power consumption, slow speed can be
overcome by the use of this application.

1.5 ORGANIZATION OF THE REPORT

The chapters are arranged in the following manner

Chapter 1 deals with introduction, aim, methodology, significance & organization

of the project.

Chapter 2 deals the Embedded Systems and its applications.

Chapter 3 deals with AT89S52 Microcontroller.

Chapter 4 deals with IR Transmitter, IR Receiver and 555 Timer.

Chapter 5 deals with Regulated power supply.

Chapter 6 deals with keil compilation tool.

Chapter 7 deals with flash magic.

Chapter 8 deals with Project circuitry.

CHAPTER 2
MICROCONTROLLER (AT89S52)
2.1 INTRODUCTION
A Microcontroller consists of a powerful CPU tightly coupled with memory,
various I/O interfaces such as serial port, parallel port timer or counter, interrupt
controller, data acquisition interfaces-Analog to Digital converter, Digital to Analog
converter, integrated on to a single silicon chip.
If a system is developed with a microprocessor, the designer has to go for
external memory such as RAM, ROM, EPROM and peripherals. But controller is
provided all these facilities on a single chip. Development of a Microcontroller
reduces PCB size and cost of design.
One of the major differences between a Microprocessor and a Microcontroller
is that a controller often deals with bits not bytes as in the real world application.
Intel has introduced a family of Microcontrollers called the MCS-51.

Features
Compatible with MCS-51 Products
8K Bytes of In-System Programmable (ISP) Flash Memory Endurance: 10,000
Write/Erase Cycles
4.0V to 5.5V Operating Range
Fully Static Operation: 0 Hz to 33 MHz
Three-level Program Memory Lock 256 x 8-bit Internal RAM 32 Programmable
I/O Lines
Three 16-bit Timer/Counters
Eight Interrupt Sources
Full Duplex UART Serial Channel
Low-power Idle and Power-down Modes

Interrupt Recovery from Power-down Mode Watchdog Timer

Dual Data Pointer
Power-off Flag Fast Programming Time
Flexible ISP Programming (Byte and Page Mode)
Green (Pb/Halide-free) Packaging Option

2.2 DESCRIPTION
The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller
with 8K bytes of in-system programmable Flash memory. The device is manufactured
using Atmels high-density nonvolatile memory technology and is compatible with the
industry standard 80C51 instruction set and pinout. The on-chip Flash allows the
program memory to be reprogrammed in-system or by a conventional nonvolatile
memory programmer. By combining a versatile 8-bit CPU with in-system
programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful
microcontroller which provides a highly-flexible and cost-effective solution to many
embedded control applications.
The AT89S52 provides the following standard features: 8K bytes of Flash, 256
bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit
timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port,
on-chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with static
logic for operation down to zero frequency and supports two software selectable
power saving modes. The Idle Mode stops the CPU while allowing the RAM,
timer/counters, serial port, and interrupt system to continue functioning. The Powerdown mode saves the RAM con-tents but freezes the oscillator, disabling all other
chip functions until the next interrupt or hardware reset. 8-bit Microcontroller with 8K
Bytes In-System Programmable Flash AT89S52 1919D

PIN-DIAGRAM:

FIG2.1: PIN DIAGRAM OF MICRO CONTROLLER

FIGURE 2.2: BLOCK DIAGRAM OF AT89S52 MICROCONTROLLER

DESCRIPTION
4.1 VCC
Supply voltage
4.2 GND
Ground
4.3 Port 0
Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin
can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as
high-impedance inputs.
9

Port 0 can also be configured to be the multiplexed low-order address/data bus

during accesses to external program and data memory. In this mode, P0 has internal
pull-ups.
Port 0 also receives the code bytes during Flash programming and outputs the
code bytes during program verification. External pull-ups are required during program
verification.
4.4 Port 1
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1
output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins,
they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port
1 pins that are externally being pulled low will source current (IIL) because of the
internal pull-ups.
In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external
count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively,
as shown in the following table.
Port 1 also receives the low-order address bytes during Flash programming
and verification

4.5 Port 2
Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2
output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins,
they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port
2 pins that are externally being pulled low will source current (IIL) because of the
internal pull-ups.
Port 2 emits the high-order address byte during fetches from external program
memory and during accesses to external data memory that uses 16-bit addresses
(MOVX @ DPTR). In this application, Port 2 uses strong internal pull-ups when
10

emitting 1s. During accesses to external data memory that uses 8-bit addresses
(MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register.
Port 2 also receives the high-order address bits and some control
signals during Flash programming and verification.
4.6 Port 3
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3
output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins,
they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port
3 pins that are externally being pulled low will source current (IIL) because of the
pull-ups.
Port 3 receives some control signals for Flash programming and verification.
Port 3 also serves the functions of various special features of the AT89S52, as
shown in the following table.

4.7 RST
Reset input. A high on this pin for two machine cycle while the oscillator is
running resets the device. This pin drives high for 98 oscillator periods after the
Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to
disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature
is enabled.
4.8 ALE/PROG
Address Latch Enable (ALE) is an output pulse for latching the low byte of the
address during accesses to external memory. This pin is also the program pulse input
(PROG) during Flash programming.
11

In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator

frequency and may be used for external timing or clocking purposes. Note, however,
that one ALE pulse is skipped during each access to external data memory.
If desired, ALE operation can be disabled by setting bit 0 of SFR location
8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction.
Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if
the microcontroller is in external execution mode.
4.9 PSEN
Program Store Enable (PSEN) is the read strobe to external program memory.
When the AT89S52 is executing code from external program memory, PSEN is
activated twice each machine cycle, except that two PSEN activations are skipped
during each access to external
data memory.
4.10 EA/VPP
External access enable (EA) must be strapped to GND in order to enable the
device to fetch code from external program memory locations starting at 0000H up to
FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched
on reset.
EA should be strapped to VCC for internal program executions.
This pin also receives the 12-volt programming enable voltage (VPP) during
Flash programming.
4.11 XTAL1
Input to the inverting oscillator amplifier and input to the internal clock
operating circuit.
4.12 XTAL2
Output from the inverting oscillator amplifier.

12

2.3 SPECIAL FUNCTION REGISTERS

A map of the on-chip memory area called the Special Function Register (SFR)
space is shown in Table 2-1.
Note that not all of the addresses are occupied, and unoccupied addresses may
not be implemented on the chip. Read accesses to these addresses will in general
return random data, and write accesses will have an indeterminate effect.
User software should not write 1s to these unlisted locations, since they may
be used in future products to invoke new features. In that case, the reset or inactive
values of the new bits will always be 0.
Timer 2 Registers: Control and status bits are contained in registers T2CON
(shown in Table 2.2) and T2MOD (shown in Table 2.6) for Timer 2. The register pair
(RCAP2H, RCAP2L) is the Capture/Reload registers for Timer 2 in 16-bit capture
mode or 16-bit auto-reload mode.
Interrupt registers: The individual interrupt enable bits are in the IE register.
Two priorities can be set for each of the six interrupt sources in the IP register.

13

Table 2.1: AT89S52 SFR Map and Reset Values

14

Table 2.2: T2CON Timer/Counter 2 Control Register

Table 2.3: AUXR: Auxiliary Register

15

Dual Data Pointer Registers: To facilitate accessing both internal and external data
memory, two banks of 16-bit Data Pointer Registers are provided: DP0 at SFR
address locations 82H-83H and DP1 at 84H-85H. Bit DPS = 0 in SFR AUXR1 selects
DP0 and DPS = 1 selects DP1. The user should ALWAYS initialize the DPS bit to the
appropriate value before accessing the respective Data Pointer Register.
Power Off Flag: The Power Off Flag (POF) is located at bit 4 (PCON.4) in the
PCON SFR. POF is set to 1 during power up. It can be set and rest under software
control and is not affected by reset.

Table 2.4: AUXR1: Auxiliary Register 1

2.4 Memory Organization

MCS-51 devices have a separate address space for Program and Data Memory.
Up to 64K bytes each of external Program and Data Memory can be addressed.
2.4.1 Program Memory
If the EA pin is connected to GND, all program fetches are directed to external
memory.
On the AT89S52, if EA is connected to VCC, program fetches to addresses
0000H through 1FFFH are directed to internal memory and fetches to addresses
2000H through FFFFH are to external memory.

2.4.2 Data Memory:

16

The AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes
occupy a parallel address space to the Special Function Registers. This means that the
upper 128 bytes have the same addresses as the SFR space but are physically separate
from SFR space.
When an instruction accesses an internal location above address 7FH, the
address mode used in the instruction specifies whether the CPU accesses the upper
128 bytes of RAM or the SFR space. Instructions which use direct addressing access
the SFR space.
For example, the following direct addressing instruction accesses the SFR at
location 0A0H (which is P2).
MOV 0A0H, #data
Instructions that use indirect addressing access the upper 128 bytes of RAM.
For example, the following indirect addressing instruction, where R0 contains 0A0H,
accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H).
MOV @R0, #data
Note that stack operations are examples of indirect addressing, so the upper
128 bytes of data RAM are available as stack space.

2.5 Watchdog Timer (One-time Enabled with Reset-out)

The WDT is intended as a recovery method in situations where the CPU may
be subjected to software upsets. The WDT consists of a 14-bit counter and the
Watchdog Timer Reset (WDTRST) SFR. The WDT is defaulted to disable from
exiting reset. To enable the WDT, a user must write 01EH and 0E1H in sequence to
the WDTRST register (SFR location 0A6H). When the WDT is enabled, it will
increment every machine cycle while the oscillator is running. The WDT timeout
period is dependent on the external clock frequency. There is no way to disable the
WDT except through reset (either hardware reset or WDT overflow reset). When
WDT overflows, it will drive an output RESET HIGH pulse at the RST pin.

2.5.1 Using the WDT

17

To enable the WDT, a user must write 01EH and 0E1H in sequence to the
WDTRST register (SFR location 0A6H). When the WDT is enabled, the user needs to
service it by writing 01EH
and 0E1H to WDTRST to avoid a WDT overflow. The 14-bit counter overflows when
it reaches 16383 (3FFFH), and this will reset the device. When the WDT is enabled, it
will increment every machine cycle while the oscillator is running. This means the
user must reset the WDT at least every 16383 machine cycles. To reset the WDT the
user must write 01EH and 0E1H to WDTRST. WDTRST is a write-only register. The
WDT counter cannot be read or written. When WDT overflows, it will generate an
output RESET pulse at the RST pin. The RESET pulse duration is 98xTOSC, where
TOSC = 1/FOSC. To make the best use of the WDT, it should be serviced in those
sections of code that will periodically be executed within the time required to prevent
a WDT reset.
2.5.2 WDT during Power-down and Idle
In Power-down mode the oscillator stops, which means the WDT also stops.
While in Power down mode, the user does not need to service the WDT. There are
two methods of exiting Power-down mode: by a hardware reset or via a levelactivated external interrupt which is enabled prior to entering Power-down mode.
When Power-down is exited with hardware reset, servicing the WDT should occur as
it normally does whenever the AT89S52 is reset. Exiting Power-down with an
interrupt is significantly different. The interrupt is held low long enough for the
oscillator to stabilize. When the interrupt is brought high, the interrupt is serviced. To
prevent the WDT from resetting the device while the interrupt pin is held low, the
WDT is not started until the interrupt is pulled high. It is suggested that the WDT be
reset during the interrupt service for the interrupt used to exit Power-down mode.
To ensure that the WDT does not overflow within a few states of exiting
Power-down, it is best to reset the WDT just before entering Power-down mode.
Before going into the IDLE mode, the WDIDLE bit in SFR AUXR is used to
determine whether the WDT continues to count if enabled. The WDT keeps counting
during IDLE (WDIDLE bit = 0) as the default state. To prevent the WDT from
resetting the AT89S52 while in IDLE mode, the user should always set up a timer that
will periodically exit IDLE, service the WDT, and reenter IDLE mode.

18

With WDIDLE bit enabled, the WDT will stop to count in IDLE mode and
resumes the count upon exit from IDLE.

UART
The UART in the AT89S52 operates the same way as the UART in the

AT89C51 and AT89C52.

2.6 TIMERS
2.6.1 Timer 0 and 1
Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and
Timer 1 in the AT89C51 and AT89C52.
2.6.2 Timer 2
Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event
counter. The type of operation is selected by bit C/T2 in the SFR T2CON (shown in
Table 2.2). Timer 2 has three operating modes: capture, auto-reload (up or down
counting), and baud rate generator. The modes are selected by bits in T2CON, as
shown in Table 2.5. Timer 2 consists of two 8-bit registers, TH2 and TL2. In the
Timer function, the TL2 register is incremented every machine cycle. Since a machine
cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator
frequency.
Table 2.5: Timer 2 Operating Modes

In the Counter function, the register is incremented in response to a 1-to-0

transition at its corresponding external input pin, T2. In this function, the external
input is sampled during S5P2 of every machine cycle. When the samples show a high
in one cycle and a low in the next cycle, the count is incremented. The new count
value appears in the register during S3P1 of the cycle following the one in which the
transition was detected. Since two machine cycles (24 oscillator periods) are required
to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator

19

frequency. To ensure that a given level is sampled at least once before it changes, the
level should be held for at least one full machine cycle.

Capture Mode:
In the capture mode, two options are selected by bit EXEN2 in T2CON. If

EXEN2 = 0, Timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in
T2CON. This bit can then be used to generate an interrupt. If EXEN2 = 1, Timer 2
performs the same operation, but a 1-to-0 transition at external input T2EX also
causes the current value in TH2 and TL2 to be captured into RCAP2H and RCAP2L,
respectively. In addition, the transition at T2EX causes bit EXF2 in T2CON to be set.
The EXF2 bit, like TF2, can generate an interrupt. The capture mode is illustrated in
Figure 2.4.

Auto-reload (Up or Down Counter):

Timer 2 can be programmed to count up or down when configured in its 16-bit

auto-reload mode. This feature is invoked by the DCEN (Down Counter Enable) bit
located in the SFR T2MOD (see Table 2.6). Upon reset, the DCEN bit is set to 0 so
that timer 2 will default to count up. When DCEN is set, Timer 2 can count up or
down, depending on the value of the
T2EX pin.

Figure 2.3: Timer in Capture Mode

20

Table 2.6: T2MOD Timer 2 Mode Control Register

Figure 2.6 shows Timer 2 automatically counting up when DCEN = 0. In this

mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2
counts up to 0FFFFH and then sets the TF2 bit upon overflow. The overflow also
causes the timer registers to be reloaded with the 16-bit value in RCAP2H and
RCAP2L. The values in Timer in Capture ModeRCAP2H and RCAP2L are preset by
software. If EXEN2 = 1, a 16-bit reload can be triggered either by an overflow or by a
1-to-0 transition at external input T2EX. This transition also sets the EXF2 bit. Both
the TF2 and EXF2 bits can generate an interrupt if enabled.
Setting the DCEN bit enables Timer 2 to count up or down, as shown in Figure
2.6. In this mode, the T2EX pin controls the direction of the count.
Logic 1 at T2EX makes Timer 2 count up. The timer will overflow at 0FFFFH
and set the TF2 bit. This overflow also causes the 16-bit value in RCAP2H and
RCAP2L to be reloaded into the timer registers, TH2 and TL2, respectively. Logic 0
at T2EX makes Timer 2 count down. The timer underflows when TH2 and TL2 equal
the values stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and
causes 0FFFFH to be reloaded into the timer registers.
The EXF2 bit toggles whenever Timer 2 overflows or underflows and can be
used as a 17th bit of resolution. In this operating mode, EXF2 does not flag an
interrupt.

21

Figure 2.4: Timer 2 Auto Reload Mode (DCEN = 0)

Figure 2.5: Timer 2 Auto Reload Mode (DCEN = 1)

2.7 BAUD RATE GENERATOR

Timer 2 is selected as the baud rate generator by setting TCLK and/or RCLK
in T2CON (Table 2.2). Note that the baud rates for transmit and receive can be
different if Timer 2 is used for the receiver or transmitter and Timer 1 is used for the
other function. Setting RCLK and/or TCLK puts Timer 2 into its baud rate generator
mode, as shown in Figure 2.6.

22

The baud rate generator mode is similar to the auto-reload mode, in that a
rollover in TH2 causes the Timer 2 registers to be reloaded with the 16-bit value in
registers RCAP2H and RCAP2L, which are preset by software.
The baud rates in mode 1 and 3 are determined in Timer2s over rate floe
according to the equation.

The Timer can be configured for either timer or counter operation. In most
applications, it is configured for timer operation (CP/T2 = 0). The timer operation is
different for Timer 2 when it is used as a baud rate generator. Normally, as a timer, it
increments every machine cycle (at 1/12 the oscillator frequency). As a baud rate
generator, however, it increments every state time (at 1/2 the oscillator frequency).
The baud rate formula is given below.

where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L taken as

a 16-bit unsigned integer.
Timer 2 as a baud rate generator is shown in Figure 2.6. This figure is valid
only if RCLK or TCLK = 1 in T2CON. Note that a rollover in TH2 does not set TF2
and will not generate an interrupt. Note too, that if EXEN2 is set, a 1-to-0 transition in
T2EX will set EXF2 but will not cause a reload from (RCAP2H, RCAP2L) to (TH2,
TL2). Thus, when Timer 2 is in use as a baud rate generator, T2EX can be used as an
extra external interrupt.
Note that when Timer 2 is running (TR2 = 1) as a timer in the baud rate
generator mode, TH2 or TL2 should not be read from or written to. Under these
conditions, the Timer is incremented every state time, and the results of a read or
write may not be accurate. The RCAP2 registers may be read but should not be
written to, because a write might overlap a reload and cause write and/or reload
errors. The timer should be turned off (clear TR2) before accessing the Timer 2 or
RCAP2 registers.

23

Figure 2.6: Timer 2 in Baud Rate Generator Mode

3.8 PROGRAMMABLE CLOCK OUT

A 50% duty cycle clock can be programmed to come out on P1.0, as shown in
Figure 3.7. This pin, besides being a regular I/O pin, has two alternate functions. It
can be programmed to input the external clock for Timer/Counter 2 or to output a
50% duty cycle clock ranging from 61 Hz to 4 MHz (for a 16-MHz operating
frequency).
To configure the Timer/Counter 2 as a clock generator, bit C/T2 (T2CON.1)
must be cleared and bit T2OE (T2MOD.1) must be set. Bit TR2 (T2CON.2) starts and
stops the timer.
The clock-out frequency depends on the oscillator frequency and the reload
value of Timer 2 capture registers (RCAP2H, RCAP2L), as shown in the following
equation.

In the clock-out mode, Timer 2 roll-overs will not generate an interrupt. This
behavior is similar to when Timer 2 is used as a baud-rate generator. It is possible to
use Timer 2 as a baud-rate generator and a clock generator simultaneously. Note,
however, that the baud-rate and clock-out frequencies cannot be determined
independently from one another since they both use RCAP2H and RCAP2L.

24

FIGURE 2.7: Timer 2 in Clock-Out Mode

329 INTERRUPTS
The AT89S52 has a total of six interrupt vectors: two external interrupts (INT0
and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt.
These interrupts are all shown in Figure 2.8.
Each of these interrupt sources can be individually enabled or disabled by
setting or clearing a bit in Special Function Register IE. IE also contains a global
disable bit, EA, which disables all interrupts at once.
Note that Table 2.7 shows that bit position IE.6 is unimplemented. User
software should not write a 1 to this bit position, since it may be used in future AT89
products.
Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in
register T2CON. Neither of these flags is cleared by hardware when the service
routine is vectored to. In fact, the service routine may have to determine whether it
was TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in
software.
The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in
which the timers overflow. The values are then polled by the circuitry in the next
cycle. However, the Timer 2 flag, TF2, is set at S2P2 and is polled in the same cycle
in which the timer overflows.

25

Table 2.7: Interrupt Enable (IE) Register

Figure 2.8: Interrupt Sources

3.10 OSCILLATOR CHARACTERISTICS

XTAL1 and XTAL2 are the input and output, respectively, of an inverting
amplifier that can be configured for use as an on-chip oscillator, as shown in Figure
2.9. Either a quartz crystal or ceramic resonator may be used. To drive the device
from an external clock source, XTAL2 should be left unconnected while XTAL1 is
driven, as shown in Figure 2.10. There are no requirements on the duty cycle of the
26

external clock signal, since the input to the internal clocking circuitry is through a
divide-by-two flip-flop, but minimum and maximum voltage high and lowtime
specifications must be observed.

2.11 Idle Mode

In idle mode, the CPU puts itself to sleep while all the on-chip peripherals
remain active. The mode is invoked by software. The content of the on-chip RAM and
all the special functions registers remain unchanged during this mode. The idle mode
can be terminated by any enabled interrupt or by a hardware reset. Note that when idle
mode is terminated by a hardware reset, the device normally resumes program
execution from where it left off, up to two machine cycles before the internal reset
algorithm takes control. On-chip hardware inhibits access to internal RAM in this
event, but access to the port pins is not inhibited. To eliminate the possibility of an
unexpected write to a port pin when idle mode is terminated by a reset, the instruction
following the one that invokes idle mode should not write to a port pin or to external
memory.

2.12 Power-down Mode

In the Power-down mode, the oscillator is stopped, and the instruction that
invokes Power-down is the last instruction executed. The on-chip RAM and Special
Function Registers retain their values until the Power-down mode is terminated. Exit
from Power-down mode can be initiated either by a hardware reset or by an enabled
external interrupt. Reset redefines the SFRs but does not change the on-chip RAM.
The reset should not be activated before VCC is restored to its normal operating level
and must be held active long enough to allow the oscillator to restart and stabilize.

Figure 2.9: Oscillator Connections

27

Figure 2.10: External Clock Drive Configuration

Table 2.8: Status of External Pins During Idle and Power-down Modes

28

CHAPTER 3
IR TRANSMITTER, IR RECEIVER
& 555 TIMER
3.1 INTRODUCTION
This is an IR transmitting circuit which can be used in many projects (I designed
this to try to make my 3D glasses wireless). This IR transmitter sends 40 kHz (frequency
can be adjusted using R2) carrier under computer control (computer can turn the IR
transmission on and off). IR carriers at around 40 kHz carrier frequencies are widely used
in TV remote controlling and ICs for receiving these signals are quite easily available.
The 555 timer integrated circuit (IC) has become a mainstay in electronics design. A 555
timer will produce a pulse when a trigger signal is applied to it. The pulse length is
determined by charging then discharging a capacitor connected to a 555 timer. A 555
timer can be used to debounce switches, modulate signals, create accurate clock signals,
create pulse width modulated (PWM) signals, etc. A 555 timer can be obtained from
various manufacturers including Fairchild Semiconductor and National Semiconductor.
A 555 timer is shown below in Fig 3.1.

FIGURE 3.1: 555 TIMER

Pins of the 555 timer are as follows:

GND Ground connection for chip
Trigger 555 timer triggers when this pin transitions from voltage at Vcc to 33% voltage
at Vcc. Output pin goes high when triggered
Output pin of 555 timer
Reset 555 timer when low
29

Vcc 5V to 15 V supply input

Discharge Used to discharge a capacitor
Threshold Used to detect when the capacitor has charged. The Output pin goes low
when capacitor has charged to 66.6% of Vcc.
Control Voltage Used to change Threshold and Trigger set point voltages and is rarely
used

FIGURE 3.2: 555 Timer Monostable Circuit

Fig 3.2 shows a monostable 555 timer circuit. The monostable circuit output one
pulse for each high to low transition of the trigger pin. The discharge pin is internally
connected to ground. The discharge pin is disconnected from ground and output pin is set
high when the trigger pin transitions from Vcc to 33% Vcc Voltage. The capacitor C
starts to charge through resistor, R. The threshold pin is used to detect when the voltage
across the capacitor reaches 66.6% Vcc voltage. When the voltage across the capacitor
reaches 66.6% Vcc voltage, the output pin is set low and the discharge pin is connected
back to ground. When the discharge pin is connected back to ground, the capacitor is
discharged.
The length of the output pulse depends on when the capacitor reaches 66.6% Vcc
voltage. This rate is determined by the charge capacity of the capacitor, C, and resistance,
R. The length of the output pulse, tP, is: t. R C P = 1 1.
The monostable 555 timer circuit can be used in the following applications:
Debounce a momentary/pushbutton switch
Turning on an actuator for a set period of time
Turn an output from a resistive sensor from analog signal to digital signal.
30

FIGURE 3.3: 555 Timer Astable Circuit

Fig 3.3 shows an Astable 555 timer circuit. The Astable 555 timer circuit outputs
a series of pulses. When the circuit is first turned on, the discharge pin is disconnected
from ground and output pin is set high because the trigger pin is below 33% Vcc Voltage.
The capacitor C starts to charge through resistors R1 and R2. The threshold pin is used to
detect when the voltage across the capacitor reaches 66.6% Vcc voltage. When the
voltage across the capacitor reaches 66.6% Vcc voltage, the output pin is set low and the
discharge pin is connected back to ground. When the discharge pin is connected back to
ground, the capacitor starts discharging though resistor R2. When the voltage across the
capacitor reaches 33.3% Vcc voltage, the cycle repeats and creates a series of output
pulses. An astable circuit triggers from previous output pulse whereas a monostable
circuit requires an externally applied trigger.
The astable 555 timer circuit can be used in the following applications:
Modulate transmitters such as ultrasonic and IR transmitters
Create an accurate clock signal
Turn on and off an actuator at set time intervals for a fixed duration

3.2 555 TIMER TO MODULATE INFRARED (IR) LIGHT

An IR emitter is going to be modulated using an astable 555 timer in this
electronics exercise. The IR emitter needs to be modulated by a frequency of 38 kHz
since the detector used in this exercise only detects 38 kHz modulated IR. The detector is
set to only see 38 kHz modulated IR because there are random IR sources such as
overhead lights, the sun, heaters, etc. in most environments that can cause interference if
using un-modulated IR.
31

Verify with the TA that everything is soldered correctly. Then apply power to the
transmitter circuit. Use an oscilloscope to observe the signal at node A. Adjust the 10k
variable resistor until the signal at node A is a 38 kHz series of pulses. Apply power to the
receiver circuit Point the IR light emitting diode (LED) on the transmitter to the detector
on the receiver. When the pushbutton is depressed the visible LED on the receiver should
blink. If the visible led is blinking randomly, put exposed 35 mm camera film around the
IR detector.

3.3 IR RECEIVERS
Infrared receivers pick up infrared signals within line-of-sight, and within 30 feet
or so, and turn the signal into electrical impulses. These electrical impulses can be carried
around the home on wires, and then turned back into infrared signals by emitters. Due to
their complexity and sensitivity, infrared receivers tend to be the most expensive part of
an infrared distribution system.

FIGURE 3.6: IR RECEIVER

32

CHAPTER 4
REGULATED POWER SUPPLY
4.1 INTRODUCTION
A variable regulated power supply, also called a variable bench power
supply, is one where you can continuously adjust the output voltage to your
requirements. Varying the output of the power supply is the recommended way to
test a project after having double checked parts placement against circuit drawings
and the parts placement guide.
This type of regulation is ideal for having a simple variable bench power
supply. Actually this is quite important because one of the first projects a hobbyist
should undertake is the construction of a variable regulated power supply. While a
dedicated supply is quite handy e.g. 5V or 12V, it's much handier to have a
variable supply on hand, especially for testing.
Most digital logic circuits and processors need a 5 volt power supply. To
use these parts we need to build a regulated 5 volt source. Usually you start with
an unregulated power To make a 5 volt power supply, we use a LM7805 voltage
regulator IC (Integrated Circuit). The IC is shown below.

The LM7805 is simple to use. You simply connect the positive lead of your
unregulated DC power supply (anything from 9VDC to 24VDC) to the Input pin,

33

connect the negative lead to the Common pin and then when you turn on the
power, you get a 5 volt supply from the Output pin.

4.2 CIRCUIT FEATURES

Brief description of operation: Gives out well regulated +5V output, output
current capability of 100 mA.
Circuit protection: Built-in overheating protection shuts down output when
regulator IC gets too hot
Circuit complexity: Very simple and easy to build
Circuit performance: Very stable +5V output voltage, reliable operation
Availability of components: Easy to get, uses only very common basic
components
Design testing: Based on datasheet example circuit, I have used this circuit
successfully as part of many electronics projects
Applications: Part of electronics devices, small laboratory power supply
Power supply voltage: Unregulated DC 8-18V power supply
Power supply current: Needed output current + 5 mA
Component costs: Few dollars for the electronics component plus the input
transformer cost

FIGURE 4.1 BLOCK DIAGRAM OF POWER SUPPLY

34

FIGURE 4.2: CIRCUIT DIAGRAM OF POWER SUPLY

4.3 RS232 (SERIAL PORT)

RS-232 (Recommended Standard - 232) is a telecommunications standard for
binary serial communications between devices. It supplies the roadmap for the way
devices speak to each other using serial ports. The devices are commonly referred to as a
DTE (data terminal equipment) and DCE (data communications equipment); for
example, a computer and modem, respectively.
RS232 is the most known serial port used in transmitting the data in
communication and interface. Even though serial port is harder to program than the
parallel port, this is the most effective method in which the data transmission requires
less wires that yields to the less cost. The RS232 is the communication line which enables
the data transmission by only using three wire links. The three links provides transmit,
receive and common ground...
The transmit and receive line on this connecter send and receive data between
the computers. As the name indicates, the data is transmitted serially. The two pins are
TXD & RXD. There are other lines on this port as RTS, CTS, DSR, DTR, and RTS, RI.
The 1 and 0 are the data which defines a voltage level of 3V to 25V and -3V to -25V
respectively.
The electrical characteristics of the serial port as per the EIA (Electronics Industry
Association) RS232C Standard specifies a maximum baud rate of 20,000bps, which is
slow compared to todays standard speed. For this reason, we have chosen the new RS232D Standard, which was recently released.
The RS-232D has existed in two types. i.e., D-TYPE 25 pin connector and DTYPE 9 pin connector, which are male connectors on the back of the PC. You need a
female connector on your communication from Host to Guest computer. The pin outs of
both D-9 & D-25 are show below.
35

TABLE 4.1 PIN OUTS OF D-9 AND D-25

D-Type-9D-Type-25 Pin Function

pin no. no.

outs

RD Receive Data (Serial data input)

TD Transmit Data (Serial data output)

RTSRequest to send (acknowledge to modem that UART is

ready to exchange data

CTSClear to send (i.e.; modem is ready to exchange data)

DSRData ready state (UART establishes a link)

SG Signal ground

DCDData Carrier detect (This line is active when modem detects

a carrier

20

DTRData Terminal Ready.

22

RI Ring Indicator (Becomes active when modem detects

ringing signal from PSTN

FIGURE 4.3: RS 232

When communicating with various micro processors one needs to convert the
RS232 levels down to lower levels, typically 3.3 or 5.0 Volts. Here is a cheap and simple
way to do that. Serial RS-232 (V.24) communication works with voltages -15V to +15V
for high and low. On the other hand, TTL logic operates between 0V and +5V. Modern
low power consumption logic operates in the range of 0V and +3.3V or even lower.

36

TABLE 4.2 LOGIC LEVELS OF TTL & RS232

RS-232

TTL

Logic

-15V -3V

+2V +5V

High

+3V +15V

0V +0.8V

Low

Thus the RS-232 signal levels are far too high TTL electronics, and the negative
RS-232 voltage for high cant be handled at all by computer logic. To receive serial data
from an RS-232 interface the voltage has to be reduced. Also the low and high voltage
level has to be inverted. This level converter uses a Max232 and five capacitors. The
max232 is quite cheap (less than 5 dollars) or if youre lucky you can get a free sample
from Maxim. The MAX232 from Maxim was the first IC which in one package contains
the necessary drivers and receivers to adapt the RS-232 signal voltage levels to TTL
logic.

4.4 RS232 INTERFACED TO MAX 232

J2

10
11

T XD P 3 .1
C4
5V

1
3
4
5

C0 . 51 u f
C6
0 .1 u f

0 .1 u f

2
6
C7
0 .1 u f

R 1 IN
R 2 IN

R 1O U T
R 2O U T

VC C

13
8

T1O U T

T 2 IN
T 1 IN
C
C
C
C

C1
1uf

16

U3

T1O U T
T2O U T

12
9
14
7

P 3 .0 R XD
T1O U T

1+
12+
2-

V+
V-

GND

5
4
3
2
1

M A X3232

15

9
8
7
6

FIGURE 4.4: RS232 INTERFACED TO MAX232

Rs232 is 9 pin db connector, only three pins of this are used ie 2,3,5 the transmit
pin of RS232 is connected to rx pin of microcontroller

4.5 MAX232 INTERFACED TO MICROCONTROLLER

37

FIGURE 4.5: MAX232 INTERFACED TO MICROCONTROLLER

MAX232 is connected to the microcontroller as shown in the figure above 11, 12

pin are connected to the 10 and 11 pin ie transmit and receive pin of microcontroller.

CHAPTER 5
38

KEIL COMPILATION TOOL

5.1 INTRODUCTION TO MICRO VISION KEIL (IDE)
Keil is a cross compiler. So first we have to understand the concept of compilers
and cross compilers. After then we shall learn how to work with keil.
5.2 CONCEPT OF COMPILER:
Compilers are programs used to convert a High Level Language to object code.
Desktop compilers produce an output object code for the underlying microprocessor, but
not for other microprocessors. I.E the programs written in one of the HLL like C will
compile the code to run on the system for a particular processor like x86 (underlying
microprocessor in the computer). For example compilers for Dos platform is different
from the Compilers for Unix platform.
So if one wants to define a compiler then compiler is a program that translates source
code into object code. The compiler derives its name from the way it works, looking at
the entire piece of source code and collecting and reorganizing the instruction. See there
is a bit little difference between compiler and an interpreter. Interpreter just interprets
whole program at a time while compiler analyzes and execute each line of source code in
succession, without looking at the entire program.
The advantage of interpreters is that they can execute a program immediately.
Secondly programs produced by compilers run much faster than the same programs
executed by an interpreter. However compilers require some time before an executable
program emerges. Now as compilers translate source code into object code, which is
unique for each type of computer, many compilers are available for the same language.

5.3 CONCEPT OF CROSS COMPILER

A cross compiler is similar to the compilers but we write a program for the target
processor (like 8052 and its derivatives) on the host processors (like computer of x86).
It means being in one environment you are writing a code for another environment is
called cross development. And the compiler used for cross development is called cross
compiler.
So the definition of cross compiler is a compiler that runs on one computer but
produces object code for a different type of computer. Cross compilers are used to
generate software that can run on computers with a new architecture or on special39

purpose devices that cannot host their own compilers. Cross compilers are very popular
for embedded development, where the target probably couldn't run a compiler. Typically
an embedded platform has restricted RAM, no hard disk, and limited I/O capability. Code
can be edited and compiled on a fast host machine (such as a PC or Unix workstation)
and the resulting executable code can then be downloaded to the target to be tested. Cross
compilers are beneficial whenever the host machine has more resources (memory, disk,
I/O etc) than the target. Keil C Compiler is one such compiler that supports a huge
number of host and target combinations. It supports as a target to 8 bit microcontrollers
like Atmel and Motorola etc.
The advantages of using cross compiler described as follows

By using this compilers not only can development of complex embedded

systems be completed in a fraction of the time, but reliability is improved, and
maintenance is easy.

Knowledge of the processor instruction set is not required.

A rudimentary knowledge of the 8052s memory architecture is desirable but

not necessary.

Register allocation and addressing mode details are managed by the compiler.

The ability to combine variable selection with specific operations improves

program readability.

Keywords and operational functions that more nearly resemble the human
thought process can be used.

Program development and debugging times are dramatically reduced when

compared to assembly language programming.

The library files that are supplied provide many standard routines (such as
formatted output, data conversions, and floating-point arithmetic) that may be
incorporated into your application.

Existing routine can be reused in new programs by utilizing the modular

programming techniques available with C.

The C language is very portable and very popular. C compilers are available for
almost all target systems. Existing software investments can be quickly and easily
converted from or adapted to other processors or environments.

Now after going through the concept of compiler and cross compilers lets we start with
Keil C cross compiler.

40

5.4 KEIL C CROSS COMPILER:

Keil is a German based Software development company. It provides several
development tools like

IDE (Integrated Development environment)

Project Manager

Simulator

Debugger

C Cross Compiler, Cross Assembler, Locator/Linker

Keil Software provides you with software development tools for the ARM
microcontrollers. With these tools, you can generate embedded applications for the
multitude of ARM derivatives. Keil provides following tools for ARM development
1.

ARM Optimizing C Cross Compiler,

2.

Macro Assembler,

3.

ARM Utilities (linker, object file converter, library manager),

4.

Source-Level Debugger/Simulator,

5.

Vision for Windows Integrated Development Environment.

The keil ARM tool kit includes three main tools, assembler, compiler and linker.
An assembler is used to assemble your ARM assembly program
A compiler is used to compile your C source code into an object file
A linker is used to create an absolute object module suitable for your in-circuit
emulator.
8052 project development cycle: These are the steps to develop ARM project using keil
1. Create source files in C or assembly.
2. Compile or assemble source files.
3. Correct errors in source files.
4. Link object files from compiler and assembler.
5. Test linked application

CHAPTER 6
41

FLASH MAGIC
6.1 INTRODUCTION
Flash Magic is a PC tool for programming flash based microcontrollers from NXP
using a serial protocol while in the target hardware.
Flash Magic is a feature-rich Windows based tool for the downloading of code
into NXP flash microcontrollers. It utilizes a feature of the microcontrollers called ISP,
which allows the transfer of data serially between a PC and the device.
Flash Magic can erase devices, program them, read data and read and set various
configuration information. Rather than providing the basic features of ISP, Flash Magic
adds additional features and intelligence, allowing complex operations to be performed.
For example, erasing can be any collection of pages, blocks, the hex file to be
programmed or the entire device. Some devices store the ISP boot loader in flash
memory, so Flash magic implements methods to protect this code from being erased.
Additional advanced features of Flash Magic include the automatic programming
of checksums, entering ISP mode via a serial command, execution of Just in Time
modules allowing endless flexibility in the data programmed, control over RS232 signals
to place devices into ISP mode, and control over the timing of such signals.
Flash Magic has been available for free for over six years and supports all current
8-bit (8052), 16-bit (XA) and 32-bit (ARM) flash microcontrollers from NXP.
Some ideas for applications built on the Flash Magic platform:

Custom ISP tool for in-house use, for example production line programming
where it is essential the user interface is simplified as much as possible

End user ISP tool for updating the firmware of products. You can build the hex
file into the application or allow it to be fetched over the internet. Adverts for new
products could be displayed to the user. Use one tool for all your products
involving potentially multiple NXP microcontrollers.

Gang programming tool. Invoke multiple instances of the Flash Magic DLL in
separate threads, each using a different COM port to allow parallel ISP
programming

42

Future-proofing products. Rather than write your own ISP tool and have to keep
updating it for new NXP devices, updates to the DLL will automatically add new
devices

6.2 FEATURES:

Straightforward and intuitive user interface

Five simple steps to erasing and programming a device and setting any options
desired

Programs Intel Hex Files

Automatic verifying after programming

Fills unused Flash to increase firmware security

Ability to automatically program checksums. Using the supplied checksum

calculation routine your firmware can easily verify the integrity of a Flash block,
ensuring no unauthorized or corrupted code can ever be executed

Program security bits

Check which Flash blocks are blank or in use with the ability to easily erase all
blocks in use

Read the device signature

Read any section of Flash and save as an Intel Hex File

Reprogram the Boot Vector and Status Byte with the help of confirmation features
that prevent accidentally programming incorrect values

Display the contents of Flash in ASCII and Hexadecimal formats

Single-click access to the manual, Flash Magic home page and NXP
Microcontrollers home page

Ability to use high-speed serial communications on devices that support it. Flash
Magic calculates the highest baud rate that both the device and your PC can use
and switches to that baud rate transparently

Command Line interface allowing Flash Magic to be used in IDEs and Batch
Files

Manual in PDF format

Supports half-duplex communications

Verify Hex Files previously programmed

Save and open settings

43

Able to reset Rx2 and 66x devices (revision G or higher)

Able to control the DTR and RTS RS232 signals when connected to RST and
/PSEN to place the device into BootROM and Execute modes automatically. An
example circuit diagram is included in the Manual. Essential for ISP with target
hardware that is hard to access.

Able to send commands to place the device in BootROM mode, with support for
command line interfaces. The installation includes an example project for the Keil
and Raisonance 8052 compilers that show how to build support for this feature
into applications.

Able to play any Wave file when finished programming.

Built in automated version checker - helps ensure you always have the latest
version.

Powerful, flexible Just In Time Code feature. Write your own JIT Modules to
generate last minute code for programming. Uses include:
o

Serial number generation

Copy protection and copy authorization

Storing program date and time - manufacture date

Storing program operator and location

Lookup table generation

Language tables or language selection

Centralized record keeping

Obtaining latest firmware from the Corporate Web site or project intranet

Sponsored by NXP Semiconductors

Features automatically updating Internet links including links to related technical

documents, software updates, utilities and code examples, using Embedded Hints
technology

Displays information about the selected Hex File, including the creation and
modification dates, flash memory used, percentage of the current device used

Completely free!

Flash Magic works on any versions of Windows, except Windows 95. 10Mb of
disk space is required

44

CHAPTER 7
PROJECT CIRCUITRY
7.1 PROJECT CIRCUIT

45

FIGURE 7.1: CIRCUIT DIAGRAM OF PROJECT

In this project, wireless mouse system is mainly based on the 8- bit micro
controller. Here we are using the micro controller named as 89C52 and it needs 5volts of
power supply. In the power supply circuit, convert the A.C to D.C voltage using Bridge
rectifier. Then we can get the 12volt of DC supply. Using LM7805 regulator, we can get
46

the required 5v of supply to the micro controller. Connect the power supply unit of 5v to
the Vcc pin or 40th pin of the controller. Crystal oscillator is connected to the 18 th and 19th
pin of the micro controller.
Mainly the project is used to move the cursor and operation of windows
media player wirelessly using TV remote. IR receiver is connected to the micro controller
though the port 3. IR receiver is connected to the P3.0. IR transmitter is fixed in the
remote. So press the key2 in the remote, cursor move in upper direction, press the key4 in
the remote, cursor move in left direction, press the key6 in the remote, cursor move in
right direction, press the key8 in the remote, cursor move in lower direction. The system
is connected to the PC using MAX232.

7.2 CONCLUSION:
Using this project, there need not be any wire interface between the PC and
mouse. Here we can control the PC using TV remote. The project is mainly based on the
RC-5 protocol using IR sensors.

7.3 FUTURE SCOPE OF THE PROJECT:

Using this project, we can control many electric appliances using tv remote with
the help of PC. The PC can also be controlled by mobile phones by doing slight
modifications to the kit.

REFERENCES:
[1]. Mr. Mazidi, The 8052 Microcontroller and Embedded Systems, PHI, 2000
[2]. Mr. A.V. Deshmuk, Microcontrollers (Theory & Applications), WTMH, 2005
[3]. Mr. Daniel W Lewis, Fundamentals of Embedded Software.
47

APPENDIX
SOURCE CODE:

48