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MP3 Player developed on FPGA(DIGILENT NEXYS 4 DDR)

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mp3-player

a mp3 player developed on fpga(nexys 4 ddr)

  
develop information:  
  OS          : Win10  
  language    : Verilog HDL  
  software    : Vivado 2016  
  developer   : Mion-ger Park
  update time : 2019-2-10
  version     : v 0.1.2
  
UPDATE 2019-2-10 v 0.1.2
  Add User Manual Part II
  
UPDATE 2019-2-3 v 0.1.1
  Add User Manual Part I
  
UPDATE 2019-1-23 v 0.1.0
  1.Finish the implement of MP3 Player
  2.Add README.md

User Manual

I.Config the midi file

1.Tool Software : BmpToMif.exe
BmpToMif.exe Download URL
2.Generate the Mif file

3.Click the "生成Mif文件"
4.Generate the Mif file successfully

II.Config the binary file

1.Tool Software : Microsoft Excel
2.Open the Mif file by Excel

3.Select the Column B

4.Separate the Column by ':'



5.Take place all the ';' with ','

6.Save the file

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MP3 Player developed on FPGA(DIGILENT NEXYS 4 DDR)

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  • Verilog 100.0%