交叉编译 U-Boot & OpenSBI for RISC-V
这篇文章创建于 2023-04-03 日,距今已有 639 天,请注意甄别内容是否已经过时!
0. 背景信息 ~ background.
OpenSBI,全称 Open Source Supervisor Binary Interface,是由 Western Digital Corporation / 西数公司开发的一种 RISC-V SBI C 语言参考实现,在其 GitHub 仓库中已经提供了对应的构建指南。1. 安装工具链/依赖包 ~ dependicies.
under Arch Linux WSL 2:sudo pacman -S bc riscv64-linux-gnu-gcc qemu-full
2. 编译 U-Boot for RISC-V ~ Das U-Boot first.
编译 OpenSBI 之前首先需要编译 u-boot:git clone https://github.com/u-boot/u-boot && cd u-boot
make CROSS_COMPILE=riscv64-linux-gnu- qemu-riscv64_smode_defconfig
make -j$(nproc)
3. 编译 OpenSBI for RISC-V ~ Compilation & Explosions!
git clone https://github.com/riscv-software-src/opensbi
CROSS_COMPILE=riscv64-linux-gnu- make -j$(nproc) PLATFORM=generic FW_PAYLOAD_PATH=../u-boot/u-boot.bin
4. 测试是否能够启动 ~ final tests.
qemu-system-riscv64 -M virt -m 1G -nographic -bios build/platform/generic/firmware/fw_payload.elf
OpenSBI v1.2-94-gc6a092c
____ _____ ____ _____
/ __ \ / ____| _ \_ _|
| | | |_ __ ___ _ __ | (___ | |_) || |
| | | | '_ \ / _ \ '_ \ \___ \| _ < | |
| |__| | |_) | __/ | | |____) | |_) || |_
\____/| .__/ \___|_| |_|_____/|___/_____|
| |
|_|
Platform Name : riscv-virtio,qemu
Platform Features : medeleg
Platform HART Count : 1
Platform IPI Device : aclint-mswi
Platform Timer Device : aclint-mtimer @ 10000000Hz
Platform Console Device : uart8250
Platform HSM Device : ---
Platform PMU Device : ---
Platform Reboot Device : sifive_test
Platform Shutdown Device : sifive_test
Platform Suspend Device : ---
Firmware Base : 0x80000000
Firmware Size : 232 KB
Firmware RW Offset : 0x20000
Runtime SBI Version : 1.0
Domain0 Name : root
Domain0 Boot HART : 0
Domain0 HARTs : 0*
Domain0 Region00 : 0x0000000002000000-0x000000000200ffff M: (I,R,W) S/U: ()
Domain0 Region01 : 0x0000000080000000-0x000000008001ffff M: (R,X) S/U: ()
Domain0 Region02 : 0x0000000080020000-0x000000008003ffff M: (R,W) S/U: ()
Domain0 Region03 : 0x0000000000000000-0xffffffffffffffff M: (R,W,X) S/U: (R,W,X)
Domain0 Next Address : 0x0000000080200000
Domain0 Next Arg1 : 0x0000000082200000
Domain0 Next Mode : S-mode
Domain0 SysReset : yes
Domain0 SysSuspend : yes
Boot HART ID : 0
Boot HART Domain : root
Boot HART Priv Version : v1.12
Boot HART Base ISA : rv64imafdch
Boot HART ISA Extensions : time,sstc
Boot HART PMP Count : 16
Boot HART PMP Granularity : 4
Boot HART PMP Address Bits: 54
Boot HART MHPM Count : 16
Boot HART MIDELEG : 0x0000000000001666
Boot HART MEDELEG : 0x0000000000f0b509
U-Boot 2023.04-rc5-00012-g6c617e082d (Apr 02 2023 - 23:50:15 +0800)
CPU: rv64imafdch_zicsr_zifencei_zihintpause_zba_zbb_zbc_zbs_sstc
Model: riscv-virtio,qemu
DRAM: 1 GiB
Core: 25 devices, 12 uclasses, devicetree: board
Flash: 32 MiB
Loading Environment from nowhere... OK
In: serial@10000000
Out: serial@10000000
Err: serial@10000000
Net: No ethernet found.
Working FDT set to bf730950
Hit any key to stop autoboot: 0
Device 0: unknown device
scanning bus for devices...
Device 0: unknown device
No ethernet found.
No ethernet found.
=>
完事,收工。Credits: