#
axi
Here are 6 public repositories matching this topic...
XDMA PCIe to DDR4 and GPIO and BRAM for the Innova-2 Flex XCKU15P FPGA
fpga
vivado
pcie
axi
ddr4
xdma
innova2
xcku15p
mnv303212a
innova-2-flex
mnv303212a-adlt
4xc7a16683
01pg974
pcie-xdma
-
Updated
Mar 7, 2024 - Tcl
SEM (Soft Error Mitigation) IP adapted for PYNQ-Z2
python
zynq
jupyter-notebook
xilinx
uart
pynq
pynq-hardware-overlay
xilinx-fpga
icap
xilinx-vivado
axi
pynq-z1
pynq-z2
soft-error
sem-ip
-
Updated
May 1, 2020 - Tcl
PYNQ-Z1/Z2 Compatible Python helper functions for AXI UARTLITE IP Core of Xilinx
python
jupyter-notebook
xilinx
uart
pynq
pynq-hardware-overlay
xilinx-vivado
axi
pynq-z1
xilinx-zynq
pynq-z2
-
Updated
May 1, 2020 - Tcl
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