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  • California
  • 22:13 (UTC -08:00)

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oops408/README.md

hi


🛠   Working With:


🔥   My Stats :

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    C++ 2

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    Verilog

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    Forked from SpinalHDL/VexRiscv

    A FPGA friendly 32 bit RISC-V CPU implementation

    Assembly

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    An open source AutoML toolkit for automate machine learning lifecycle, including feature engineering, neural architecture search, model compression and hyper-parameter tuning.

    Python

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    Forked from einstein07/Yoda

    (Your Own Digital Accelerator) A Smoothing filter by using a Finite Impulse Response (FIR) and a Low Pass Filter (LPF) algorithm. The hardware used is a NEXYS A7 Field Programmable Gate Array (FPGA…

    VHDL

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    Forked from sld-columbia/esp

    Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy

    C