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CHIPS Alliance

Common Hardware for Interfaces, Processors and Systems
README.md

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🔗 chipsalliance.org | 📫 [email protected]

The CHIPS Alliance develops high-quality, open source hardware designs and tools relevant to ASICs and FPGAs. By creating an open and collaborative environment, CHIPS Alliance shares resources to lower the cost of development. Companies and individuals can work together to develop open source CPUs, various peripherals, and complex IP blocks, as well as open source hardware or software tools to accelerate the creation of more efficient and innovative chip designs.

The CHIPS Alliance hosts multiple open source Projects, which are Workgroups.

Popular repositories Loading

  1. chisel chisel Public

    Chisel: A Modern Hardware Design Language

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  5. Cores-VeeR-EH1 Cores-VeeR-EH1 Public

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Repositories

Showing 10 of 110 repositories
  • caliptra-mcu-sw Public

    Caliptra MCU Software

    chipsalliance/caliptra-mcu-sw’s past year of commit activity
    Rust 3 Apache-2.0 0 0 4 Updated Nov 26, 2024
  • chisel Public

    Chisel: A Modern Hardware Design Language

    chipsalliance/chisel’s past year of commit activity
    Scala 4,007 Apache-2.0 602 315 (1 issue needs help) 159 Updated Nov 26, 2024
  • Cores-VeeR-EL2 Public

    VeeR EL2 Core

    chipsalliance/Cores-VeeR-EL2’s past year of commit activity
    SystemVerilog 250 Apache-2.0 75 21 12 Updated Nov 26, 2024
  • t1 Public
    chipsalliance/t1’s past year of commit activity
    Scala 118 Apache-2.0 22 16 28 Updated Nov 26, 2024
  • caliptra-sw Public

    Caliptra software (ROM, FMC, runtime firmware), and libraries/tools needed to build and test

    chipsalliance/caliptra-sw’s past year of commit activity
    Rust 96 Apache-2.0 44 104 59 Updated Nov 26, 2024
  • synlig Public

    SystemVerilog synthesis tool

    chipsalliance/synlig’s past year of commit activity
    Verilog 169 Apache-2.0 22 68 9 Updated Nov 26, 2024
  • synlig-logs Public
    chipsalliance/synlig-logs’s past year of commit activity
    SystemVerilog 0 0 0 0 Updated Nov 26, 2024
  • sv-tests-results Public

    Output of the sv-tests runs.

    chipsalliance/sv-tests-results’s past year of commit activity
    HTML 5 1 0 0 Updated Nov 26, 2024
  • adams-bridge Public

    Post-Quantum Cryptography IP Core (Crystals-Dilithium)

    chipsalliance/adams-bridge’s past year of commit activity
    SystemVerilog 9 Apache-2.0 1 3 0 Updated Nov 26, 2024
  • caliptra-rtl Public

    HW Design Collateral for Caliptra RoT IP

    chipsalliance/caliptra-rtl’s past year of commit activity
    SystemVerilog 76 Apache-2.0 38 68 8 Updated Nov 26, 2024
View all repositories