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Release v1.4.21 (#528)
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* Enable Xilinx 2021.1 tools
* Update DCV instructions to 2021.1
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deeppat authored Jul 21, 2021
1 parent f29834c commit 087fb29
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3 changes: 3 additions & 0 deletions .gitmodules
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Expand Up @@ -11,3 +11,6 @@
[submodule "Vitis/examples/xilinx_2020.2"]
path = Vitis/examples/xilinx_2020.2
url = https://github.com/Xilinx/Vitis_Accel_Examples
[submodule "Vitis/examples/xilinx_2021.1"]
path = Vitis/examples/xilinx_2021.1
url = https://github.com/Xilinx/Vitis_Accel_Examples
329 changes: 18 additions & 311 deletions Jenkinsfile

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18 changes: 15 additions & 3 deletions Jenkinsfile_int_sims
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Expand Up @@ -36,12 +36,18 @@ task_label = [
]

// Put the latest version last
def xilinx_versions = [ '2020.2' ]
def xilinx_versions = [ '2021.1' ]

// We want the default to be the latest.
def default_xilinx_version = xilinx_versions.last()

def simulator_tool_default_map = [
'2019.1' : [
'vivado': 'xilinx/SDx/2019.1.op2552052',
'vcs': 'synopsys/vcs-mx/N-2017.12-SP2',
'questa': 'questa/10.6c_1',
'ies': 'incisive/15.20.063'
],
'2019.2' : [
'vivado': 'xilinx/Vivado/2019.2',
'vcs': 'synopsys/vcs-mx/O-2018.09-SP2-1',
Expand All @@ -56,8 +62,14 @@ def simulator_tool_default_map = [
],
'2020.2' : [
'vivado': 'xilinx/Vivado/2020.2',
'vcs': 'synopsys/vcs/Q-2020.03',
'questa': 'questa/2019.4_3',
'vcs': 'synopsys/vcs-mx/Q-2020.03',
'questa': 'questa/2020.2',
'ies': 'incisive/15.20.083'
],
'2021.1' : [
'vivado': 'xilinx/Vivado/2021.1',
'vcs': 'synopsys/vcs/R-2020.12',
'questa': 'questa/2020.4',
'ies': 'incisive/15.20.083'
]
]
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11 changes: 6 additions & 5 deletions README.md
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Expand Up @@ -50,17 +50,18 @@ AWS marketplace offers multiple versions of the FPGA Developer AMI. The followin

| Developer Kit Version | Tool Version Supported | Compatible FPGA Developer AMI Version |
|-----------|-----------|------|
| 1.4.21+ | 2021.1 | v1.11.X (Xilinx Vivado/Vitis 2021.1) |
| 1.4.18+ | 2020.2 | v1.10.X (Xilinx Vivado/Vitis 2020.2) |
| 1.4.16+ | 2020.1 | v1.9.0-v1.9.X (Xilinx Vivado/Vitis 2020.1) |
| 1.4.13+ | 2019.2 | v1.8.0-v1.8.X (Xilinx Vivado/Vitis 2019.2) |
| 1.4.11+ | 2019.1 | v1.7.0-v1.7.X (Xilinx Vivado/SDx 2019.1) |
| 1.4.8 - 1.4.15a | 2018.3 | v1.6.0-v1.6.X (Xilinx Vivado/SDx 2018.3) |
| 1.4.3 - 1.4.15a | 2018.2 | v1.5.0-v1.5.X (Xilinx Vivado/SDx 2018.2) |
| 1.3.7 - 1.4.15a | 2017.4 | v1.4.0-v1.4.X (Xilinx Vivado/SDx 2017.4) |
| 1.4.8 - 1.4.15b | 2018.3 | v1.6.0-v1.6.X (Xilinx Vivado/SDx 2018.3) |
| 1.4.3 - 1.4.15b | 2018.2 | v1.5.0-v1.5.X (Xilinx Vivado/SDx 2018.2) |
| 1.3.7 - 1.4.15b | 2017.4 | v1.4.0-v1.4.X (Xilinx Vivado/SDx 2017.4) |

⚠️ Developer kit release v1.4.16 will remove support for Xilinx 2017.4, 2018.2, 2018.3 toolsets.
While developer kit release v1.4.16 onwards will not support older Xilinx tools, you can still use them using HDK releases v1.4.15a or earlier.
Please checkout [the latest v1.4.15a release tag from Github](https://github.com/aws/aws-fpga/releases/tag/v1.4.15a) to use Xilinx 2017.4, 2018.2, 2018.3 toolsets.
While developer kit release v1.4.16 onwards will not support older Xilinx tools, you can still use them using HDK releases v1.4.15b or earlier.
Please checkout [the latest v1.4.15b release tag from Github](https://github.com/aws/aws-fpga/releases/tag/v1.4.15b) to use Xilinx 2017.4, 2018.2, 2018.3 toolsets.

⚠️ Developer kit versions prior to v1.3.7 and Developer AMI prior to v1.4 (2017.1) reached end-of-life. See [AWS forum announcement](https://forums.aws.amazon.com/ann.jspa?annID=6068) for additional details.

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67 changes: 36 additions & 31 deletions RELEASE_NOTES.md

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1 change: 0 additions & 1 deletion SDAccel/docs/SDAccel_Guide_AWS_F1.md
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Expand Up @@ -168,7 +168,6 @@ Conversely, code which is simply a few lines of basic operations, and has no tas
* Xilinx web portal for [Xilinx SDAccel documentation](https://www.xilinx.com/products/design-tools/software-zone/sdaccel.html?resultsTablePreSelect=xlnxdocumenttypes:SeeAll#documentation)
* [Xilinx SDAccel GitHub repository](https://github.com/Xilinx/SDAccel_Examples)
* [Xilinx SDAccel landing page](https://www.xilinx.com/products/design-tools/software-zone/sdaccel.html)
* [Vivado HLS landing page](https://www.xilinx.com/products/design-tools/vivado/integration/esl-design.html)
* [Vivado landing page](https://www.xilinx.com/products/design-tools/vivado.html)
* [SDAccel Environment User Guide](https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_4/ug1023-sdaccel-user-guide.pdf)
* [SDAccel Intro Tutorial](https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_4/ug1021-sdaccel-intro-tutorial.pdf)
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4 changes: 2 additions & 2 deletions Vitis/README.md
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Expand Up @@ -87,7 +87,7 @@ The instructions below describe how to run the Vitis SW Emulation flow using the
```
$ cd $VITIS_DIR/examples/xilinx/hello_world
$ make clean
$ make check TARGET=sw_emu DEVICE=$AWS_PLATFORM all
$ make run TARGET=sw_emu DEVICE=$AWS_PLATFORM all
```

For more information on how to debug your application in a SW Emulation environment.
Expand All @@ -102,7 +102,7 @@ The instructions below describe how to run the HW Emulation flow using the Makef
```
$ cd $VITIS_DIR/examples/xilinx/hello_world
$ make clean
$ make check TARGET=hw_emu DEVICE=$AWS_PLATFORM all
$ make run TARGET=hw_emu DEVICE=$AWS_PLATFORM all
```
For more information on how to debug your application in a HW Emulation environment.

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24 changes: 14 additions & 10 deletions Vitis/Runtime/xrt_common_functions.sh
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Expand Up @@ -100,18 +100,22 @@ function setup_runtime {
export PATH=$PATH:/opt/xilinx/xrt/bin

export LD_LIBRARY_PATH=$XILINX_XRT/lib:$LD_LIBRARY_PATH
# copy libstdc++ from $XILINX_VITIS/lib
if [[ $(lsb_release -si) == "Ubuntu" ]]; then
sudo cp $XILINX_VITIS/lib/lnx64.o/Ubuntu/libstdc++.so* /opt/xilinx/xrt/lib/
elif [[ $(lsb_release -si) == "CentOS" ]]; then
sudo cp $XILINX_VITIS/lib/lnx64.o/Default/libstdc++.so* /opt/xilinx/xrt/lib/
else
info_msg "Unsupported OS."
return 1

if [[ $RELEASE_VER =~ .*2019\.2.* ]]; then

# copy libstdc++ from $XILINX_VITIS/lib
if [[ $(lsb_release -si) == "Ubuntu" ]]; then
sudo cp $XILINX_VITIS/lib/lnx64.o/Ubuntu/libstdc++.so* /opt/xilinx/xrt/lib/
elif [[ $(lsb_release -si) == "CentOS" ]]; then
sudo cp $XILINX_VITIS/lib/lnx64.o/Default/libstdc++.so* /opt/xilinx/xrt/lib/
elif [[ $(lsb_release -si) == "Amazon" ]]; then
sudo cp /lib64/libstdc++.so* /opt/xilinx/xrt/lib/
else
info_msg "Unsupported OS."
return 1
fi
fi
else # No XRT available
err_msg "Xilinx XRT runtime not installed - This is required if you are running on an F1 instance."
# Placeholder for code to download pre-compiled RPM/DEB package and remove above message
# install_xrt_package <Path to RPM/DEB>
fi
}
1 change: 1 addition & 0 deletions Vitis/docs/Create_Runtime_AMI.md
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Expand Up @@ -4,6 +4,7 @@

| Vitis Version used for AFI Development | Compatible Xilinx Runtime |
|--------------------------------------|-----------------------------|
| 2021.1 | AWS FPGA Developer AMI 1.10.x (XRT is pre-installed) or [XRT](https://xilinx.github.io/XRT/2021.1/html/build.html) |
| 2020.2 | AWS FPGA Developer AMI 1.10.x (XRT is pre-installed) or [XRT](https://xilinx.github.io/XRT/2020.2/html/build.html) |
| 2020.1 | AWS FPGA Developer AMI 1.9.x (XRT is pre-installed) or [XRT](https://xilinx.github.io/XRT/2020.1/html/build.html) |
| 2019.2 | AWS FPGA Developer AMI 1.8.x (XRT is pre-installed) or [XRT](https://xilinx.github.io/XRT/2019.2/html/build.html) |
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1 change: 1 addition & 0 deletions Vitis/docs/XRT_installation_instructions.md
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Expand Up @@ -6,6 +6,7 @@

| Xilinx Vitis Tool Version | XRT Release Tag | SHA | `xrt` or `xrt-aws` RPM's (Centos/RHEL) |`xrt` or`xrt-aws` RPM's (AL2) |
|---|---|---|---|---|
|2021.1| [202110.2.11.634](https://github.com/Xilinx/XRT/releases/tag/202110.2.11.634) | 5ad5998d67080f00bca5bf15b3838cf35e0a7b26 | [xrt_202110.2.11.0_7.9.2009-x86_64-xrt.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.11.0/Patches/XRT_2021_1/xrt_202110.2.11.0_7.9.2009-x86_64-xrt.rpm) [xrt_202110.2.11.0_7.9.2009-x86_64-aws.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.11.0/Patches/XRT_2021_1/xrt_202110.2.11.0_7.9.2009-x86_64-aws.rpm) | [xrt_202110.2.11.0_2-x86_64-xrt.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.11.0/Patches/XRT_2021_1/xrt_202110.2.11.0_2-x86_64-xrt.rpm) [xrt_202110.2.11.0_2-x86_64-aws.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.11.0/Patches/XRT_2021_1/xrt_202110.2.11.0_2-x86_64-aws.rpm)|
|2020.2| [202020.2.8.743](https://github.com/Xilinx/XRT/releases/tag/202020.2.8.743) | 77d5484b5c4daa691a7f78235053fb036829b1e9 | [xrt_202020.2.8.0_7.9.2009-x86_64-xrt.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.10.0/Patches/XRT_2020_2/xrt_202020.2.8.0_7.9.2009-x86_64-xrt.rpm) [xrt_202020.2.8.0_7.9.2009-x86_64-aws.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.10.0/Patches/XRT_2020_2/xrt_202020.2.8.0_7.9.2009-x86_64-aws.rpm) | [xrt_202020.2.8.0_2-x86_64-xrt.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.10.0/Patches/XRT_2020_2/xrt_202020.2.8.0_2-x86_64-xrt.rpm) [xrt_202020.2.8.0_2-x86_64-aws.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.10.0/Patches/XRT_2020_2/xrt_202020.2.8.0_2-x86_64-aws.rpm)|
|2020.1| [202010.2.6.AWS](https://github.com/Xilinx/XRT/releases/tag/202010.2.6.AWS) | d09c4a458c16e8d843b3165dcf929c38f7a32b6f | [xrt_202010.2.6.0_7.7.1908-x86_64-xrt.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.9.0/Patches/XRT_2020_1/xrt_202010.2.6.0_7.7.1908-x86_64-xrt.rpm) [xrt_202010.2.6.0_7.7.1908-x86_64-aws.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.9.0/Patches/XRT_2020_1/xrt_202010.2.6.0_7.7.1908-x86_64-aws.rpm) | [xrt_202010.2.6.0_2-x86_64-xrt.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.9.0/Patches/XRT_2020_1/xrt_202010.2.6.0_2-x86_64-xrt.rpm) [xrt_202010.2.6.0_2-x86_64-aws.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.9.0/Patches/XRT_2020_1/xrt_202010.2.6.0_2-x86_64-aws.rpm)|
|2019.2| [2019.2.0.3](https://github.com/Xilinx/XRT/releases/tag/2019.2.0.3) | 9e13d57c4563e2c19bf5f518993f6e5a8dadc18a | [xrt_201920.2.3.0_7.7.1908-xrt.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.8.0/Patches/XRT_2019_2/xrt_201920.2.3.0_7.7.1908-xrt.rpm) [xrt_201920.2.3.0_7.7.1908-aws.rpm](https://aws-fpga-developer-ami.s3.amazonaws.com/1.8.0/Patches/XRT_2019_2/xrt_201920.2.3.0_7.7.1908-aws.rpm) | N/A |
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1 change: 1 addition & 0 deletions Vitis/examples/xilinx_2021.1
Submodule xilinx_2021.1 added at f640bc
1 change: 1 addition & 0 deletions Vitis/kernel_version.txt
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Expand Up @@ -6,4 +6,5 @@
3.10.0-1062.4.1.el7.x86_64
3.10.0-1062.9.1.el7.x86_64
3.10.0-1127.10.1.el7.x86_64
3.10.0-1160.31.1.el7.x86_64
4.14.209-160.339.amzn2.x86_64
2 changes: 2 additions & 0 deletions Vitis/tests/test_build_vitis_example.py
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Expand Up @@ -102,6 +102,8 @@ def base_test(self, examplePath, target, rteName, xilinxVersion, clean=True, che
check_string = ""
if check:
check_string = "check"
if xilinxVersion >= 2019.2:
check_string = "run"

(rc, stdout_lines, stderr_lines) = self.run_cmd("make {0} TARGET={1} DEVICE={2} all PROFILE=yes".format(check_string, target, os.environ['AWS_PLATFORM']))
assert rc == 0, "Vitis build failed with rc={}".format(rc)
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6 changes: 6 additions & 0 deletions Vitis/tests/test_find_vitis_examples.py
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Expand Up @@ -83,6 +83,12 @@ def test_find_example_makefiles(self, xilinxVersion):
ignore = True
logger.info("Ignoring {} as F1 device found in ndevice.".format(root))
continue

if "platform_blacklist" in description:
if "aws" in description["platform_blacklist"]:
ignore = True
logger.info("Ignoring {} as F1 device found in ndevice.".format(root))
continue
else:
ignore = True
logger.warn("Ignoring: {} as no Makefile/description.json exist".format(root))
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5 changes: 3 additions & 2 deletions Vitis/tools/create_vitis_afi.sh
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Expand Up @@ -280,8 +280,9 @@ echo ${timestamp}_agfi_id.txt
#STEP 6
#Create .awsxclbin

if [ "$RELEASE_VER" == "2020.2" ]
then

if [[ "$RELEASE_VER" == "2020.2" || "$RELEASE_VER" == "2021.1" ]]
then
/opt/xilinx/xrt/bin/xclbinutil -i $xclbin --remove-section PARTITION_METADATA --replace-section BITSTREAM:RAW:${timestamp}_agfi_id.txt -o ${awsxclbin}.awsxclbin
else
/opt/xilinx/xrt/bin/xclbinutil -i $xclbin --remove-section PARTITION_METADATA --remove-section SYSTEM_METADATA --replace-section BITSTREAM:RAW:${timestamp}_agfi_id.txt -o ${awsxclbin}.awsxclbin
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1 change: 1 addition & 0 deletions Vitis/vitis_xrt_version.txt
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Expand Up @@ -2,3 +2,4 @@
2020.1:12115fd4054cb46a5ade62fafa74c523f59116e6
2020.1:d09c4a458c16e8d843b3165dcf929c38f7a32b6f
2020.2:77d5484b5c4daa691a7f78235053fb036829b1e9
2021.1:5ad5998d67080f00bca5bf15b3838cf35e0a7b26
11 changes: 5 additions & 6 deletions developer_resources/DCV.md
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Expand Up @@ -60,12 +60,11 @@ If you experience issues please refer to the [Official DCV documentation](https:
1. [Install NICE DCV Server](https://docs.aws.amazon.com/dcv/latest/adminguide/setting-up-installing-linux-server.html)
```
sudo rpm --import https://s3-eu-west-1.amazonaws.com/nice-dcv-publish/NICE-GPG-KEY
wget https://d1uj6qtbmh3dt5.cloudfront.net/2019.0/Servers/nice-dcv-2019.0-7318-el7.tgz
tar xvf nice-dcv-2019.0-7318-el7.tgz
cd nice-dcv-2019.0-7318-el7
sudo yum -y install nice-dcv-server-2019.0.7318-1.el7.x86_64.rpm
sudo yum -y install nice-xdcv-2019.0.224-1.el7.x86_64.rpm
sudo rpm --import https://d1uj6qtbmh3dt5.cloudfront.net/NICE-GPG-KEY
wget https://d1uj6qtbmh3dt5.cloudfront.net/2021.1/Servers/nice-dcv-2021.1-10598-el7-x86_64.tgz
tar -xvzf nice-dcv-2021.1-10598-el7-x86_64.tgz && cd nice-dcv-2021.1-10598-el7-x86_64
sudo yum install nice-dcv-server-2021.1.10598-1.el7.x86_64.rpm
sudo yum install nice-xdcv-2021.1.392-1.el7.x86_64.rpm

sudo systemctl enable dcvserver
sudo systemctl start dcvserver
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18 changes: 11 additions & 7 deletions hdk/cl/developer_designs/Starting_Your_Own_CL.md
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Expand Up @@ -46,14 +46,18 @@ In both cases, double-check that the `$CL_DIR` is set correctly by calling and c
<a name="modifyBuildScripts"></a>
## 3. Modify the build scripts

The following scripts should be modified before starting the build:
- `/build/constraints/*` to set all the timing, clock and placement constraints.
- `/build/scripts/encrypt.tcl` CL Encryption is required, AFI creation will fail if your CL source files are not encrypted. To enable include the source file names.
- `/build/scripts/create_dcp_from_cl.tcl` to update the final build scripts with right source files and IP.

Once your design is ready and you would like to start the build process, please refer to this [checklist](../CHECKLIST_BEFORE_BUILDING_CL.md).

Once you verified the checklist, the detailed walkthrough on how to build and submit the CL to AWS is avaiable [here](../../common/shell_v04261818/new_cl_template/build/README.md)
The following scripts should be modified before starting the build:
* `/build/constraints/*`
* This is to set all the timing, clock and placement constraints.
* `/build/scripts/encrypt.tcl`
* CL Encryption is **NOT** required, but encouraged. To enable encryption, include the source file names.
* `/build/scripts/create_dcp_from_cl.tcl`
* This is to update the final build scripts with right source files and IP.

Once your design is ready, please refer to this [checklist](../CHECKLIST_BEFORE_BUILDING_CL.md) before starting the build process.

Once you verified the checklist, the detailed walk through on how to build and submit the CL to AWS is available [here](../../common/shell_v04261818/new_cl_template/build/README.md)



4 changes: 2 additions & 2 deletions hdk/cl/examples/cl_dram_dma/verif/scripts/Makefile.vivado
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Expand Up @@ -19,9 +19,9 @@

compile:
mkdir -p $(SIM_DIR)
cd $(SIM_DIR) && xsc $(C_FILES) --additional_option "-I$(C_SDK_USR_INC_DIR)" --additional_option "-I$(C_SDK_USR_UTILS_DIR)" --additional_option "-I$(C_COMMON_DIR)/include" --additional_option "-I$(C_COMMON_DIR)/src" --additional_option "-I$(C_INC_DIR)" --additional_option "-DVIVADO_SIM" --additional_option "-DSV_TEST" --additional_option "-DDMA_TEST"
cd $(SIM_DIR) && xsc $(C_FILES) --gcc_compile_options "-I$(C_SDK_USR_INC_DIR)" --gcc_compile_options "-I$(C_SDK_USR_UTILS_DIR)" --gcc_compile_options "-I$(C_COMMON_DIR)/include" --gcc_compile_options "-I$(C_COMMON_DIR)/src" --gcc_compile_options "-I$(C_INC_DIR)" --gcc_compile_options "-DVIVADO_SIM" --gcc_compile_options "-DSV_TEST" --gcc_compile_options "-DDMA_TEST"
cd $(SIM_DIR) && xvlog --sv -m64 --define DMA_TEST $(DEFAULT_DEFINES) --initfile $(XILINX_VIVADO)/data/xsim/ip/xsim_ip.ini --work xil_defaultlib --relax -f $(SCRIPTS_DIR)/top.vivado.f
cd $(SIM_DIR) && xelab -m64 --initfile $(XILINX_VIVADO)/data/xsim/ip/xsim_ip.ini --timescale 1ps/1ps --debug typical --relax --mt 8 -L axi_clock_converter_v2_1_14 -L generic_baseblocks_v2_1_0 -L axi_infrastructure_v1_1_0 -L axi_register_slice_v2_1_15 -L axi_register_slice_v2_1_12 -L fifo_generator_v13_2_1 -L fifo_generator_v13_1_4 -L axi_data_fifo_v2_1_11 -L axi_crossbar_v2_1_13 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm -sv_lib dpi --snapshot tb xil_defaultlib.tb xil_defaultlib.glbl xil_defaultlib.$(TEST)
cd $(SIM_DIR) && xelab -m64 --initfile $(XILINX_VIVADO)/data/xsim/ip/xsim_ip.ini --timescale 1ps/1ps --debug typical --relax --mt 8 -L axi_clock_converter_v2_1_14 -L generic_baseblocks_v2_1_0 -L axi_infrastructure_v1_1_0 -L axi_register_slice_v2_1_15 -L axi_register_slice_v2_1_12 -L fifo_generator_v13_2_1 -L fifo_generator_v13_1_4 -L axi_data_fifo_v2_1_11 -L axi_crossbar_v2_1_13 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip -L xpm -sv_lib dpi --snapshot tb xil_defaultlib.tb xil_defaultlib.glbl xil_defaultlib.$(TEST)


run:
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