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  1. FPGA-ACC-MAC FPGA-ACC-MAC Public

    4×4 7-bit matrix multiplication hardware accelerator using a systolic array, with a Python driver for the Basys 3 FPGA and a systolic array UVC using UVM.

    SystemVerilog 1

  2. Uart-Protocol-RTL Uart-Protocol-RTL Public

    8bit - UART protocol

    SystemVerilog

  3. Enhanced-S-DES-as-RNG-for-stream-cipher-VLSI-implementation-using-Opensource-tools Enhanced-S-DES-as-RNG-for-stream-cipher-VLSI-implementation-using-Opensource-tools Public

    Enhanced version of S-DES algorithm modified to be used as a random number generator to make a stream cipher the project completed the VLSI flow with only Opensource software's.

    Python

  4. Sky130_PDK_INV_VTC Sky130_PDK_INV_VTC Public

    Creating vtc for an inverter in xschem utilizing sky 130 pdk pfets and nfets with variable W factor to observe how it affects the inverter's switching point.

  5. esp8266-UDP-to-FM-PWM-pin- esp8266-UDP-to-FM-PWM-pin- Public

    Experimental approach to send audio data to ESP using UDP protocol and using PWM pin for FM modulation for transmission.

    C++