asm-11 finalized; mcodes documented

- asm-11 finalized, .if,.rept,.mcall added; many updates and fixes
- macro library added (tools/asm-11/mlib) and used via .mcall throughout
- documentation for tools/mcode added
- other documentation updates
- Doxygen support now for V1.9.6
- tst_serloop designs added for Basys3

w11 CPU xxdp clean

- all known w11a CPU core issues and fixable deficiencies resolved
- tcodes significantly expanded
- tbench expanded, covers all cases that need control port interaction
- [w11a differences](w11a_known_differences.md) re-organized and completed
- [SimH differences](simh_diff_summary.md) re-organized and completed
- tmu and tmuconv improvements
- gwstart added, improves working GHDL plus gtkwave
- xxdp run scripts added for w11a and SimH
- Doxygen support now for V1.9.5

consolidate test bench; drop Atlys; many cleanups; viv 2022.1

- retire ancient and unmaintainable tb_pdp11core_stim.dat verification code
- add fast mac-only verification codes under tool/tcode, integrated with tbrun
- cleanup tbrun setup, drop nexys4 and add nexys4d
- add ostest support for rsx11m-31_rk, rsx11m-40_rk and rsx11mp-30_rp oskits
- build flow Vivado 2022.1 ready; handle synth 8-3331 -> 8-7129 transition
- remove Atlys support (only test designs, a w11 design was never done)
- cleanup code base, use page,mmr\*,pdr,par instead of segment,ssr\*,sdr,sar
- sysid encodes now system type, allows to distinguish w11,SimH,e11
- CPU bug fixes in pdp11_mmu and pdp11_sequencer
- cleanup SimH setup files (\*.scmd), use autoconfig, set disk types
- asm-11 has now limited macro support
- added dasm-11, a PDP-11 disassembler
- all actively used commands have now a man page
- Doxygen support now for V1.9.4; remove discontinued Tcl support

GitHub actions; viv 2020.1; ostest; Nexys A7

- drop Travis; add GitHub Actions support
- use Vivado 2020.1 and GHDL 2.0.0 as default
- use std=c++17 (requires gcc 7.3 or later)
- automate oskit download and container file setup
- automate testing of oskits
- get Nexys A7 board working and fully integrated

SPDX license tags; viv 2019.1; coverity defect free

- use vivado 2019.1 as default
- finalize coverity fixups, now defect free
- use SPDX license tags, remove boilerplate license disclaimers
- TM11: support odd record length

add M9312; add DZ11; update oskits

- add m9312 boot prom emulation
- add dz11 8 line serial port multiplexer
- update 211bsd system images (oskits)
  - apply fpsim+tcsh patch
  - support dz11 lines
  - update network setup

add support for buffered character interfaces

- LP11: ibdr_lp11_buf
- PC11: ibdr_pc11_buf
- DL11: ibdr_dl11_buf

Add support for DDR memory via Vivado MIG

- migui_core_gsim: highly simplified MIG UI simulation model
- sramif2migui_core: w11a SRAM to MIG UI interface core
- DDR enable w11a systems for Digilent Arty, Arty S7, Nexys4 DDR
- low level MIG interface test design `sys_tst_mig_*`

Add Travis, KW11-P,ram:,dmpcnt; backend code review

- add continuous integration support via Travis CI
- add KW11-P (programmable clock)
- add CPU performance counters (32 counters of 32 bit width)
- add new disk scheme ram: (with Rw11VirtDiskRam)
- comprehensive review of C++ backend code

Add Arty S7 support; vivado 2017.2

- Add Digilent Arty S7 (50 die size, board rev E) support
- get vivado 2017.2 ready (needed for Spartan-7 support)