Spicing up the first and only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples. https://www.chili-chips.xyz/open-cologne
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Nov 1, 2024 - Verilog
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gatemate
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RISCV CPU implementation tutorial steps for Cologne Chip Gatemate E1, adopted from https://github.com/BrunoLevy/learn-fpga
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Oct 6, 2024 - Verilog
prototyping board for the GateMate FPGA evaluation board E1
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Feb 18, 2024 - Verilog
EE education board for the GateMate FPGA evaluation board E1
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Mar 26, 2023
EE education board for the GateMate FPGA evaluation board E1
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Apr 30, 2023 - Verilog
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