Spatial: "Specify Parameterized Accelerators Through Inordinately Abstract Language"

HLS-based Graph Processing Framework on FPGAs

A flexible framework for analyzing and transforming FPGA netlists. Official repository.

Provides Spatial with front-end support from popular machine learning frameworks

A simple Verilog SPI master / slave implementation featuring all 4 modes.

[FPGA'21] CoDeNet is an efficient object detection model on PyTorch, with SOTA performance on VOC and COCO based on CenterNet and Co-Designed deformable convolution.

FFTFPGA is an OpenCL based library for Fast Fourier Transformations for FPGAs. This repository provides OpenCL host code in the form of FFTW like APIs as well as OpenCL kernel designs that can be synthesized to bitstreams.

Blocks for managing FPGA IO-pins

TMR utilities for the SpyDrNet project

Code Examples explained in QCon-London 2020 about TornadoVM

Autotuning High-Level Synthesis for FPGAs, published @ ReConFig '17

Placa de extensión de entradas y salidas digitales para prácticas de tecnología FPGA con la iCE40HX-8K Breakout Board de Lattice

Jornada de Hardware Libre, 25-04-2017. Facultad de Ciencias de Granada.

One could spend a lifetime studying only FPGAs. LabVIEW FPGA users need some FPGA background but not too much and not too little. Chapter 3 provides that information and resources for further reading. One of the largest public FPGA applications is Microsoft’s use of FPGAs in their data centers. Microsoft has published many YouTube videos on thei…

Codes for DSP in MUCs and FPGAs

Generation of logic designs for efficiently solving ordinary differential equations on FPGAs

Division Algorithms in FPGAs

Icestudio collection for capturing digital signals and show them on the LEDs

Searching for Hardware Aware Neural Networks on ImageNet for FPGA in MobilenetV3 Search Space