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@iLauncherDev iLauncherDev commented Nov 26, 2024

Purpose

This PR has the same purpose as #7501 but it changes the base address instead of "that relocation haxxory".

JIRA issue: CORE-19882

Warning

This PR is paused because of #7530

TODO

  • Prepare amd64 to base address change
  • Resolve the unaligned base address that happens only with MSVC <= I'm currently stuck here
  • Adapt bootsectors

@github-actions github-actions bot added the freeldr Freeloader changes label Nov 26, 2024
@iLauncherDev iLauncherDev force-pushed the freeldr-ntldr-base branch 2 times, most recently from 84eaa06 to 92edf3a Compare November 26, 2024 19:22
@binarymaster binarymaster added the enhancement For PRs with an enhancement/new feature. label Nov 26, 2024
@iLauncherDev iLauncherDev force-pushed the freeldr-ntldr-base branch 5 times, most recently from adf4ded to d932b39 Compare November 27, 2024 02:36
#define FREELDR_PE_BASE HEX(21000)
#define TEMPCODE_BASE HEX(200000)
#define TEMPCODE16_BASE HEX(7000)
#define MEMORY_MARGIN HEX(9FC00) /* We need this much memory */
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This will have to be changed back before the merge.

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@iLauncherDev iLauncherDev Nov 27, 2024

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Changing it back to HEX(88000) will limit freeldr to have 408KBs but i can change it to HEX(99000) because HEX(9FC00) is too big.

@iLauncherDev iLauncherDev force-pushed the freeldr-ntldr-base branch 2 times, most recently from d613c38 to e64cbbe Compare November 27, 2024 16:17
@iLauncherDev iLauncherDev reopened this Nov 27, 2024
@iLauncherDev iLauncherDev deleted the freeldr-ntldr-base branch December 11, 2024 20:55
@iLauncherDev iLauncherDev restored the freeldr-ntldr-base branch December 11, 2024 20:55
@iLauncherDev iLauncherDev reopened this Dec 11, 2024
call ReadSectors

mov dl, byte ptr [BootDrive] // Load boot drive into DL
mov dl, byte ptr fs:[BootDrive] // Load boot drive into DL
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Why this change?

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not intended change

AddressOfRealModeEntryPoint:
.long 0 // receives address of RealModeEntryPoint
.word HEX(20)//RMODE_CS
.word L_RMODE_CS
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What does that L_ prefix mean?

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Long mode

Comment on lines -101 to -104
/* Output status */
mov si, offset Msg_SwitchToLongMode
call writestr

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Why is this removed?

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code space


/* Get flags CF, ZF and SF from the REGS structure */
mov ax, word ptr cs:[BSS_RegisterSet + REGS_EFLAGS]
mov ax, word ptr ss:[BSS_RegisterSet + REGS_EFLAGS]
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I'd prefer using es instead of ss (which looks weird).

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i will if possible

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Naive question: why would ES be preferrable ?

Comment on lines -182 to +201
.word HEX(9E00)
.word HEX(0000)
.word HEX(9B00)
.word HEX(008F)
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What is this change?

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The 16 bits flat CS is necessary because we need 21 bits instruction pointer on > 0xffff base address

Comment on lines +17 to +18
#define FREELDR_BASE HEX(20000)
#define FREELDR_PE_BASE HEX(30000)
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64k padding? Why not 0x21000? Or does the base have to be 64k aligned?

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Using 64k unaligned base address make freeldr_pe.exe fail to generate on MSVC

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enhancement For PRs with an enhancement/new feature. freeldr Freeloader changes

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4 participants