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compositor.py error ignored in final target

Status: Open.

#564 In efabless/caravel;

· d-m-bailey opened on Feb 14, 2025

Some io_out and io_oeb signals are buffered in caravel_core and caravan_core

errorSomething isn't workingSomething isn't working

Status: Open.

#561 In efabless/caravel;

· d-m-bailey opened on Jan 23, 2025

Review routing of gpio analog I/O through caravel_core and caravan_core

Status: Open.

#560 In efabless/caravel;

· d-mitch-bailey opened on Jan 16, 2025

document power domains for caravel for sky130

Status: Open.

#559 In efabless/caravel;

· marwaneltoukhy opened on Dec 8, 2024

Solve poly density issues

Status: Open.

#558 In efabless/caravel;

· DavidRLindley opened on Dec 5, 2024

Changed decap_12/fill8/fill4 cell references break downstream full-chip STA (make caravel-sta)

Status: Open.

#555 In efabless/caravel;

· amm-efabless opened on Oct 26, 2024

Housekeeping SPI should force hkspi_disable to zero on a digital reset.

Status: Open.

#550 In efabless/caravel;

· RTimothyEdwards opened on Aug 22, 2024

Remove "Google" from copyright notice in Caravel, Caravan, and Openframe. Update version and date.

Status: Open.

#549 In efabless/caravel;

· DavidRLindley opened on Jul 10, 2024

Register definition TRM unclear

documentationImprovements or additions to documentationImprovements or additions to documentation

Status: Open.

#546 In efabless/caravel;

· marwaneltoukhy opened on Jun 23, 2024

DRC of metal fill after fill generation

Status: Open.

#544 In efabless/caravel;

· jeffdi opened on May 22, 2024

make gpio_defaults incorrectly handles some Verilog constant patterns

Status: Open.

#540 In efabless/caravel;

· amm-efabless opened on May 1, 2024

make gpio_defaults can incorrectly parse user_defines.v Verilog block comments

Status: Open.

#539 In efabless/caravel;

· amm-efabless opened on May 1, 2024