Skip to content

Pull requests: chipsalliance/python-fpga-interchange

Author
Filter by author
Loading
Label
Filter by label
Loading
Use alt + click/return to exclude labels
or + click/return for logical OR
Projects
Filter by project
Loading
Milestones
Filter by milestone
Loading
Reviews
Assignee
Filter by who’s assigned
Sort

Pull requests list

[WIP] Importing cell timings from prjxray-db
#147 opened Mar 10, 2022 by mkurc-ant Loading…
xcup: Fix BUFG cell type
#112 opened Jul 20, 2021 by gatecat Loading…
Adding nextpnr routing timing support
#111 opened Jul 15, 2021 by gatecat Loading…
1 of 2 tasks
Fix for property unquoting
#6 opened Dec 15, 2020 by mkurc-ant Loading…
ProTip! no:milestone will show everything without a milestone.