Chapter 3: Addressing Modes

Definition - Addressing modes

Addressing mode indicates the way in
which an operand or data for an
instruction is accessed and the way in
which microprocessor calculates the
branch address for JUMP, CALL and
RETURN instruction
Types
Data addressing modes
Program Memory addressing modes
Stack Memory addressing modes

1. Data Addressing Mode

The various data addressing modes are:

1.
2.
3.
4.

Register addressing mode

Immediate addressing mode
Direct addressing mode
Register Indirect or Base addressing
mode
5. Base Plus Index addressing mode
6. Register Relative or base relative
addressing mode
7. Base relative plus index addressing
mode

Data Addressing Mode

1. Register Addressing mode

MOV instruction is a common and flexible

instruction.
provides a basis for explanation of data-addressing
modes

Figure 31 illustrates the MOV instruction and

defines the direction of data flow.
Source is to the right and destination the left,
next to the opcode MOV.
an opcode, or operation code, tells the
microprocessor which operation to perform

Figure 31The MOV instruction showing the source, destination, and

direction of data flow.

MOV AX,BX instruction transfers the

word contents of the source
register( BX) to destination register
(AX).
Source content never changes, but
the destination changes
A MOV instruction always copies the
source data into the destination

Figure 328086Core2 data-addressing modes.

Register Addressing

The most common form of data

addressing.
once register names learned, easiest to
apply.

The microprocessor contains these 8-bit

register names used with register
addressing: AH, AL, BH, BL, CH, CL, DH,
and DL.
16-bit register names: AX, BX, CX, DX,
SP, BP, SI, and DI.

In 80386 & above, extended 32-bit

register names are: EAX, EBX, ECX,
EDX, ESP, EBP, EDI, and ESI.
64-bit mode register names are: RAX,
RBX, RCX, RDX, RSP, RBP, RDI, RSI, and
R8 through R15.
Important for instructions to use
registers that are the same size.
never mix an 8-bit \with a 16-bit register, an
8- or a 16-bit register with a 32-bit register
this is not allowed by the microprocessor
and results in an error when assembled

Figure 33The effect of executing the MOV BX, CX instruction at the point
just before the BX register changes. Note that only the rightmost 16 bits of
register EBX change.

Figure 33 shows the operation of the

MOV BX, CX instruction.
The source registers contents do not
change.
the destination registers contents do
change

The contents of the destination register

or destination memory location change
for all instructions except the CMP and
TEST instructions.
The MOV BX, CX instruction does not
affect the leftmost 16 bits of register
EBX.

Some MOV instructions use 16-bit

segment registers (CS, DS, ES, SS).
A segment to segment register MOV
instruction is not allowed.
Changing the CS register with a MOV
instruction is not allowed.
MOV instructions does not affect the
flag bits.

MOV AL,BL - 8 bits

MOV CH,CL 8 bits
MOV AX,CX - 16 bits
MOV SP,BP 16 bits
MOV DS,AX 16 bits
MOV SI,DI 16 bits
MOV BX,ES 16 bits
MOV ECX,EBX 32 bits
MOV ESP,EDX 32 bits
MOV ES,DS segment to segment, not allowed
MOV BL,DX mixed sizes, not allowed
MOV CS,AX CS register may not be the
destination register, not allowed

Immediate Addressing

Term immediate implies that data

immediately follow the hexadecimal
opcode in the memory.
immediate data are constant data
data transferred from a register or memory
location are variable data

Immediate addressing operates upon a

byte or word of data.
Figure 34 shows the operation of a MOV
EAX,13456H instruction.

Figure 34The operation of the MOV EAX,13456H

instruction. This instruction copies the immediate data
(13456H) into EAX.

As with the MOV instruction illustrated

in Figure 33, the source data
overwrites the destination data.

In symbolic assembly language, the

symbol # precedes immediate data in
some assemblers.
MOV AX,#3456H instruction is an example

Most assemblers do not use the #

symbol,
but represent immediate data as in the
MOV AX,3456H instruction.
in this text, the # is not used for immediate
data

The symbolic assembler portrays

immediate data in many ways.
The letter H appends hexadecimal data.
If hexadecimal data begin with a letter,
the assembler requires the data start
with a 0.
to represent a hexadecimal F2, 0F2H is
used
in assembly language

Decimal data are represented as is and

require no special codes or adjustments.
an example is the 100 decimal in the
MOV AL,100 instruction

An ASCII-coded character or characters

may be depicted in the immediate form
if the ASCII data are enclosed in
apostrophes.
be careful to use the apostrophe () for
ASCII
data and not the single quotation mark ()

Binary data are represented if the

binary number is followed by the letter
B.
in some assemblers, the letter Y

MOV BL,44 copies a 44 decimal(2CH)to BL(8

bits)
MOV AX,44H 0044H into AX (16 bits)
MOV SI,0 0000H into SI(16 bits)
MOV CH,100 100 decimal(64H) into CH(8
bits)
MOV AL,A ASCII A into AL(8 bits)
MOV AX,AB ASCII AB into AX(16 bits)
MOV CL,11001110B 11001110 binary to
CL(8)
MOV EBX,12340000H H data to EBX(32)
MOV ESI,12 12 decimal into ESI(32)
MOV EAX,100Y 100 binary into EAX(32)

Each statement in an assembly

language program consists of four parts
or fields.
The leftmost field is called the label.
used to store a symbolic name for the
memory location it represents

All labels must begin with a letter or one

of the following special characters: @, $,
-, or ?.
a label may any length from 1 to 35
characters

The label appears in a program to

identify the name of a memory location

The next field to the right is the opcode

field.
designed to hold the instruction, or opcode
the MOV part of the move data instruction
is an example of an opcode

Right of the opcode field is the operand

field.
contains information used by the opcode
the MOV AL,BL instruction has the opcode
MOV and operands AL and BL

The comment field, the final field,

contains a comment about the
instruction(s).

Direct Data Addressing

Applied to many instructions in a typical

program.
Two basic forms of direct data
addressing:
direct addressing, which applies to a MOV
between a memory location and AL, AX, or
EAX
displacement addressing, which applies to
almost any instruction in the instruction set

In either case Address is formed by

adding the displacement (offset) to the
default data segment address or an

Direct Addressing

Direct addressing with a MOV instruction

transfers data between a memory
location, located within the data
segment, and the AL (8-bit), AX (16-bit),
or EAX (32-bit) register.
usually a 3-byte long instruction

MOV AL,DATA loads AL from the data

segment memory location DATA
(1234H).
DATA is a symbolic memory location, while
1234H is the actual hexadecimal location

Figure 35The operation of the MOV AL,[1234H] instruction when

DS=1000H .

This instruction transfers a copy

contents of memory location 11234H
into AL.
the effective address is formed by adding
1234H (the offset address) and 10000H
(the data segment address)

MOV AL,NUMBER- copies the byte

contents of DS memory location NUMBER
into AL
MOV AX,COW- copies the word contents
of DS memory location COW into AX
MOV EAX,WATER- copies the doubleword
contents of DS memory location COW
into AX
MOV NEWS,AL- copies AL into DS memory
location NEWS
MOV THERE,AX- copies AX into DS
memory location THERE
MOV HOME,EAX- copies EAX into DS
memory location THERE
MOV ES:[2000H],AL- copies AL into ES
memory location 2000H

Displacement Addressing

Almost identical to direct addressing,

except the instruction is 4 bytes wide
instead of 3.
This type of direct data addressing is
much more flexible because most
instructions use it.
Eg: MOV CL,DS:[1234H] 4 bytes long,
Hexadecimal code: 8A 0E 1234
Egof direct addressing: MOV AL,DS:
[1234H] 3 bytes long, Hexadecimal
code: A0 1234

MOV CH,DOG Copies the byte

contents of DS memory location DOG
into CH
MOV CH,[1000H] Copies the byte
contents of DS offset address 1000H
into CH
MOV DATA7,BP Copies BP into DS
memory location DATA7
MOV NUMBER,SP Copies SP into DS
memory location NUMBER.

Register Indirect Addressing

Allows data to be addressed at any

memory location through an offset
address held in any of the following
registers: BP, BX, DI, and SI.
If register BX contains a 1000H & MOV
AX,[BX] instruction executes, the word
contents of DS offset address 1000H are
copied into register AX

Figure 36The operation of the MOV AX,[BX] instruction when BX =

1000H and DS = 0100H. Note that this instruction is shown after the
contents of memory are transferred to AX.

If DS=0100H, the instruction addresses

a word stored at memory bytes 2000H &
2001H & transfers it into register AX
Contents of 2000H are moved into AL &
contents of 2001H are moved into AH.
The [ ] symbols denote indirect
addressing in assembly language.

The data segment is used by default

with register indirect addressing or any
other mode that uses BX, DI, or SI to
address memory.
If the BP register addresses memory,
the stack segment is used by default.
these settings are considered the default
for
these four index and base registers

MOV CX,[BX] Copies the word contents of

the DS memory location address by BX into
CX.
MOV [DI],BH copies BH into DS memory
location addressed by DI
MOV AL,[EDX] copies the byte contents of
the DS memory location addressed by EDX
into AL.
MOV ECX,[EBX] - copies the doubleword
contents of the DS memory location
addressed by EBX into ECX.
MOV [BP],DL copies DL into SS memory
location addressed by BP
MOV [DI],[BX] Memory to memory moves
are not allowed except with string
instructions

Indirect addressing often allows a

program to refer to tabular data located
in memory.
Figure 37 shows the table and the BX
register used to sequentially address
each location in the table.
To accomplish this task, load the
starting location of the table into the BX
register
with a MOV immediate instruction.
After initializing the starting address of
the table, use register indirect
addressing to

Figure 37An array (TABLE) containing 50 bytes that are indirectly

addressed through register BX.

Base-Plus-Index Addressing
Similar to indirect addressing because it
indirectly addresses memory data.
This type of addressing uses one base
register (BP or BX) & one index register
(DI or SI) to indirectly address memory.
The base register often holds the
beginning location of a memory array.
the index register holds the relative
position
of an element in the array

whenever BP addresses memory data,

both the stack segment register and BP
generate the effective address
This type of addressing allows the
combination of any two 32-bit extended
registers except ESP.
For eg: MOV DL,[EAX+EBX] instruction
is an eg using EAX (as the base) plus
EBX (as the index).

Locating Data with Base-PlusIndex Addressing

Figure 38 shows how data are
addressed by the MOV DX,[BX + DI]
instruction
The Intel assembler requires this
addressing mode appear as [BX][DI]
instead of [BX + DI].
The MOV DX,[BX + DI] instruction is
MOV DX,[BX][DI] for a program written
for the Intel ASM assembler.

Figure 38An example showing how the base-plus-index addressing

mode functions for the MOV DX,[BX + DI] instruction. Notice that memory
address 02010H is accessed because DS=0100H, BX=1000H and
DI=0010H.

MOV CX,[BX+DI] : copies the word contents of

the DS memory location address by BX plus DI
into CX.
MOV CH,[BP+SI] : copies the byte contents of
the SS memory location addressed by BP plus
SI into CH.
MOV [BX+SI],SP : copies SP into the DS
memory location addresses by BX plus SI
MOV [BP+DI],AH : copies AH into the SS
memory location addressed by BP plus DI
MOV CL,[EDX+EDI] : copies the byte contents
of the DS memory location addressed by EDX
plus EDI into CL.
MOV [EAX+EBX],ECX : copies ECX into the DS
memory location addressed by EAX plus EBX.

Locating Array Data Using

Base-Plus-Index Addressing
A major use is to address elements in a
memory array.
To accomplish this, load the BX register
(base) with the beginning address of the
array and the DI register (index) with the
element number to be accessed.
Figure 39 shows the use of BX and DI to
access an element in an array of data.

Figure 39An example of the base-plus-index addressing mode. Here an

element (DI) of an ARRAY (BX) is addressed.

Register Relative Addressing

Similar to base-plus-index addressing
and displacement addressing.

data in a segment of memory are addressed

by adding the displacement to the contents
of a base or an index register (BP, BX, DI, or
SI)

Figure 310 shows the operation of the

MOV AX,[BX+1000H] instruction.
Displacement can be a number added to
the register within the [ ] as in the MOV
AL,[SI+2] instruction.

Figure 310The operation of the MOV AX, [BX+1000H] instruction, when

BX=0100H and DS=0200H .

MOV AX,[DI+100H] : copies the word contents of the

DS memory location addressed by DI plus 100H into
AX
MOV ARRAY[SI],BL : copies BL into the DS memory
location addressed by ARRAY plus SI
MOV LIST[SI+2],CL : copies CL into the DS memory
location addressed by sum of LIST, SI &2.
MOV DI,SET_IT[BX] : copies the word contents of the
DS memory location addressed by the sum of SET_IT
& BX into DI
MOV DI,[EAX+10H] : copies the word contents of the
DS memory location addressed by the sum of EAX &
10H into DI
MOV ARRAY[EBX],EAX : moves EAX into the DS
memory location addressed by the sum of ARRAY &
EBX.

Addressing Array Data with

Register Relative
It is possible to address array data with
register relative addressing.
such as with base-plus-index addressing

In Figure 311, register relative

addressing is illustrated with the same
example as for base-plus-index
addressing.
this shows how the displacement ARRAY
adds
to index register DI to generate a reference
to

Figure 311Register relative addressing used to address an element of

ARRAY. The displacement addresses the start of ARRAY, and DI accesses an
element.

Base Relative-Plus-Index
Addressing
Similar to base-plus-index addressing.
adds a displacement
uses a base register and an index register to
form the memory address

This type of addressing mode often

addresses a two-dimensional array of
memory data.

Addressing Data with Base

Relative-Plus-Index
Least-used addressing mode.
Figure 312 shows how data are
referenced if the instruction executed by
the microprocessor is MOV AX,[BX + SI
+ 100H].
displacement of 100H adds to BX and SI to
form the offset address within the data
segment

This addressing mode is too complex for

frequent use in programming.

Figure 312An example of base relative-plus-index addressing using a

MOV AX,[BX+SI+100H] instruction. Note: DS=1000H

MOV DH,[BX+DI+20H] : copies the byte

contents of the DS memory location addressed
by the sum of BX,DI &20H into DH
MOV AX,FILE[BX+DI] : copies the word
contents of the DS memory location addressed
by the sum of FILE,BX & DI into AX
MOV LIST[BP+DI],CL : copies CL into the SS
memory location addressed by the sum of
LIST,BP & DI
MOV LIST[BP+SI+4],DH : copies DH into the
SS memory location addressed by the sum of
LIST,BP,SI & 4
MOV EAX,FILE[EBX+ECX+2] : copies the
doubleword contents of the DS memory
location addressed by the sum of
FILE,EBX,ECX & 2 into EAX

Scaled-Index Addressing

uses two 32-bit registers (a base register

and
an index register) to access the memory
The second register (index) is multiplied
by a scaling factor.
the scaling factor can be 1x, 2x, 4x, 8x

A scaling factor of 1x is implied and

need not be included in the assembly
language instruction (MOV AL,[EBX +
ECX]).

A scaling factor of 2x is used to

address word-sized memory arrays.
A scaling factor of 4x is used to
address doubleword-sized memory
arrays
A scaling factor of 8x is used to
address quadword-sized memory
arrays

MOV EAX,[EBX+4*ECX] : copies the

doubleword contents of the DS memory
location addressed by the sum of 4 times ECX
plus EBX into EAX.
MOV [EAX+2*EDI+100H],CX : copies CX into
the DS memory location addressed by the sum
of EAX, 100H, & 2 times EDI
MOV AL,[EBP+2*EDI-2] : copies the byte
contents of the SS memory location addressed
by the sum of EBP, -2 & 2 times EDI into AL.
MOV EAX,ARRAY[4*ECX] : copies the
doubleword contents of the DS memory
location addressed by the sum of ARRAY plus 4
times ECX into EAX.

PROGRAM MEMORYADDRESSING MODES

Used with the JMP & CALL instructions
Consists of 3 forms
- Direct
- relative
- indirect

Direct Program Memory

Addressing
Used for all jumps and calls by early
microprocessor; also used in high-level
languages, such as BASIC.
The microprocessor uses this form, but
not as often as relative and indirect
program memory addressing.
The instructions for direct program
memory addressing store the address
with the opcode.

Eg: if a program jumps to memory

location 10000H for the next
instruction, the address (10000H) is
stored following the opcode in the
memory
Figure shows the direct intersegment
JMP instruction & the 4 bytes
required to store the address 10000H

Figure 314The 5-byte machine language version of a JMP [10000H]

instruction.

This JMP instruction loads CS with

1000H and IP with 0000H to jump to
memory location 10000H for the next
instruction.
an intersegment jump is a jump to any
memory location within the entire memory
system

Often called a far jump because it can

jump to any memory location for the
next instruction.
in real mode, any location within the first
1M byte
In protected mode operation, the far jump

The only other instruction using direct

program addressing is the intersegment
or far CALL instruction.
Usually, the name of a memory address,
called a label, refers to the location that
is called or jumped to instead of the
actual numeric address.

Relative Program Memory

Addressing
Not available in all early
microprocessors, but it is available to
this family of microprocessors.
The term relative means relative to the
instruction pointer (IP).
The JMP instruction is a 1-byte
instruction, with a 1-byte or a 2-byte
displacement that adds to the
instruction pointer.
An example is shown in Figure 315.

A one byte displacement is used in

short jumps & a two byte
displacement is used in long jumps &
calls
Both are intrasegment jumps
An intrasegment jump is a jump
anywhere within the current code
segment.

Figure 315A JMP [2] instruction. This instruction skips

over the 2 bytes of memory that follow the JMP
instruction.

Indirect Program Memory

Addressing
The microprocessor allows several forms
of program indirect memory addressing
for the JMP and CALL instructions.
Eg instructions
uses any 16-bit register (AX, BX, CX, DX, SP,
BP, DI or SI)
any relative register ([BP], [BX], [DI] or [SI])
Any relative register with a a displacement.

JMP AX : jump to the current CS location

addressed by the contents of AX
JMP CX : jump to the current CS location
addressed by the contents of CX
JMP NEAR PTR[BX] : jumps to the current CS
location addressed by the contents of the DS
memory location addressed by BX
JMP NEAR[DI+2] : jumps to the current CS
location addressed by the contents of the DS
memory location addressed by DI plus 2
JMP TABLE[BX] : jumps to the current CS
location addressed by the contents of the DS
memory location addressed by TABLE plus BX.
JMP ECX : jumps to the current CS location
addressed by the contents of ECX.

If a 16 bit register holds the address

of a JMP instruction, the jump is near
For eg: if the BX register contains a
1000H & a JMP BX instruction
executes, the microprocessor jumps to
offset address 1000H in the current
CS.

If a relative register holds the address, the

jump is also considered to be an indirect
jump
For example, JMP [BX] refers to the memory
location within the data segment at the
offset address contained in BX.
at this offset address is a 16-bit number
used as the offset address in the
intrasegment jump
this type of jump is sometimes called an
indirect-indirect or double-indirect jump

Figure 316 shows a jump table that is

stored, beginning at memory location
TABLE.

The jump table is referenced by the

short program
MOV BX,4
; address LOC2
JMP TABLE[BX] ; jump to LOC2
In this eg: the BX register is loaded with
a 4 so, when it combines in the JMP
TABLE[BX] instruction with TABLE, the
effective address is the contents of the
second entry in the jump table.

Figure 316A jump table that stores addresses of

various programs. The exact address chosen from the
TABLE is determined by an index stored with the jump
instruction.

STACK MEMORY-ADDRESSING
MODES
The stack plays an important role in all
microprocessors.
holds data temporarily and stores return
addresses used by procedures

Stack memory is LIFO (last-in, firstout) memory

describes the way data are stored and
removed from the stack

Data are placed on the stack with a PUSH

instruction; removed with a POP
instruction.
CALL instruction also uses the stack to hold
the return address for procedures & a RET
instruction to remove the return address from
the stack.
Stack memory is maintained by two registers:
the stack pointer (SP or ESP)
the stack segment register (SS)

Whenever a word of data is pushed onto the

stack, the high-order 8 bits are placed in the
location addressed by SP 1.
low-order 8 bits are placed in the location
addressed by SP 2

The SP is decremented by 2 so the next

word is stored in the next available stack
location.
the SP/ESP register always points to an area
of memory located within the stack
segment.

When data are popped from the stack,

the low-order 8 bits are removed from
the location addressed by SP.
high-order 8 bits are removed; the SP
register is incremented by 2

Figure 317The PUSH and POP instructions: (a) PUSH BX places the
contents of BX onto the stack; (b) POP CX removes data from the stack and
places them into CX. Both instructions are shown after execution.

Note that PUSH and POP store or

retrieve words of datanever bytesin
8086 - 80286.
80386 and above allow words or
doublewords to be transferred to and
from the stack.
Data may be pushed onto the stack
from any 16-bit register or segment
register.
in 80386 and above, from any 32-bit
extended register

Data may be popped off the stack into

any register or any segment register

PUSHA and POPA instructions push or

pop all except segment registers, on the
stack.
Not available on early 8086/8088
processors.
80386 and above allow extended
registers to be pushed or popped.
64-bit mode for Pentium and Core2 does
not contain a PUSHA or POPA instruction

SUMMARY
The MOV instruction copies the
contents of the source operand into
the destination operand.
The source never changes for any
instruction.
Register addressing specifies any 8-bit
register (AH, AL, BH, BL, CH, CL, DH,
or DL) or any 16-bit register (AX, BX,
CX, DX, SP, BP, SI, or DI).

SUMMARY

(cont.
)

The segment registers (CS, DS, ES, or

SS) are also addressable for moving
data between a segment register and
a 16-bit register/memory location or
for PUSH and POP.
In the 80386 through the Core2
microprocessors, the extended
registers also are used for register
addressing; they consist of EAX, EBX,
ECX, EDX, ESP, EBP, EDI, and ESI.

SUMMARY

(cont.
)

In the 64-bit mode, the registers are

RAX, RBX, RCX, RDX, RSP, RBP, RDI,
RSI, and R8 through R15.
The MOV immediate instruction
transfers the byte or word that
immediately follows the opcode into a
register or a memory location.
Immediate addressing manipulates
constant data in a program.

SUMMARY

(cont.
)

In the 80386 and above, doubleword

immediate data may also be loaded
into
a 32-bit register or memory location.
The .MODEL statement is used with
assembly language to identify the
start of a file and the type of memory
model used with the file.
If the size is TINY, the program exists
in
the code segment, and assembled as

SUMMARY

(cont.
)

If the SMALL model is used, the

program uses a code and data
segment and assembles as an
execute (.EXE) program.
Direct addressing occurs in two forms
in the microprocessor: direct
addressing and displacement
addressing.

SUMMARY

(cont.
)

Both forms of addressing are identical

except that direct addressing is used
to transfer data between EAX, AX, or
AL and memory; displacement
addressing is used with any registermemory transfer.
Direct addressing requires 3 bytes of
memory, whereas displacement
addressing requires 4 bytes.

SUMMARY

(cont.
)

Register indirect addressing allows

data to be addressed at the memory
location pointed to by either a base
(BP and BX) or index register (DI and
SI).
In the 80386 and above, extended
registers EAX, EBX, ECX, EDX, EBP,
EDI, and ESI are used to address
memory data.

SUMMARY

(cont.
)

Base-plus-index addressing often

addresses data in an array.
The memory address for this mode is
formed by adding a base register,
index register, and the contents of a
segment register times 10H.
In the 80386 and above, the base and
index registers may be any 32-bit
register except EIP and ESP.

SUMMARY

(cont.
)

Register relative addressing uses a

base or index register, plus a
displacement to access memory data.
Base relative-plus-index addressing is
useful for addressing a twodimensional memory array.
The address is formed by adding a
base register, an index register,
displacement, and the contents of a
segment register times 10H.

SUMMARY

(cont.
)

Scaled-index addressing is unique to

the 80386 through the Core2.
The second of two registers (index) is
scaled by a factor of to access words,
doublewords, or quadwords in
memory arrays.
The MOV AX, [ EBX + 2*ECX] and the
MOV [4 * ECX ], EDX are examples of
scaled-index instructions.

SUMMARY

(cont.
)

Data structures are templates for

storing arrays of data and are
addressed by array name and field.
Direct program memory addressing is
allowed with the JMP and CALL
instructions to any location in the
memory system.
With this addressing mode, the offset
address and segment address are
stored with the instruction.

SUMMARY

(cont.
)

Relative program addressing allows a

JMP or CALL instruction to branch forward or backward in the current code
segment by bytes.
In the 80386 and above, the 32-bit
displacement allows a branch to any
location in the cur-rent code segment
by using a displacement value of
bytes.
The 32-bit displacement can be used
only in protected mode.

SUMMARY

(cont.
)

Indirect program addressing allows

the JMP or CALL instructions to
address another portion of the
program or subroutine indirectly
through a register or memory
location.
The PUSH and POP instructions
transfer a word between the stack and
a register or memory location.
A PUSH immediate instruction is
available to place immediate data on

SUMMARY
The PUSHA and POPA instructions
transfer AX, CX, DX, BX, BP, SP, SI,
and DI between the stack and these
registers.
In 80386 and above, the extended
register and extended flags can also
be transferred between registers and
the stack.
A PUSHFD stores the EFLAGS, whereas
a PUSHF stores the FLAGS. POPA and
PUSHA are not available in 64-bit