International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT) - 2016

VLSI Implementation of Boolean Algebra based

Cryptographic Algorithm

Ammu S Remya Ajai A S

Student-Department of Electronics and Communication Assistant professor- Department of Electronics and
Amrita School of Engineering, Kollam Communication
Kerala, India Amrita School of Engineering, Kollam
[email protected] Kerala, India
[email protected]

Abstract—FPGA is an integrated circuit, which can be implement any digital design. FPGA chip adoption across all
reconfigured by designers themselves. FPGA are reprogrammable industries is driven by the fact that FPGA combine the best
silicon chips. Field Programmable Gate Arrays (FPGA) are used parts of ASICs and processor based system. Hardware-timed
for hardware implementations of cryptographic algorithm. This speed and reliability are the advantages of FPGA, but they do
paper presents an FPGA based Hardware implementation of not require high volumes of justify the large upfront expense
Boolean algebra based cryptographic algorithm for secure of custom ASIC design. Reprogrammable silicon also has the
transmission. Using this algorithm, we can hide the meaning of a same flexibility of software running on a processor-based
message in unreadable characters. ASCII values of characters, system, but the number of processing cores available does not
numbers and symbols are used for encryption and decryption.
limit it.
ASCII values converted into binary number and it takes 32 bits in
implementation. Boolean operations such as 1's and 2's FPGA designs are well suited for real time applications,
complement and xor operation are used for encryption and which require a response of 1ms or less. FPGAs are more
decryption. Xilinx – sparton3E FPGA kit is used for the flexible the functionalities can be added or removed easily [3].
synthesizing and implementation of cryptographic algorithm. The random attack of alpha rays cannot destroy/corrupt
memory areas and the device functionality because FPGAs are
Keywords—Cryptography; Encryption; Decryption; BAC hard wired. This makes it favorite in military applications. In
Algorithm (Boolean algebra Cryptography); Complement; XOR
addition, lifetime of FPGA based development is longer.
operation, Unicode

II. RELATED WORK

I. INTRODUCTION
In this section, we give some idea about existing
In network communication there are many security and
cryptographic algorithm and how keys are generated in the
safety approaches being used. In order to keep the data safe
algorithm.
from unauthorized person, security is necessary. However, the
hackers can attack the confidential data or information. There Boolean algebra based cryptographic algorithm has been
are many aspects for security and many applications, such as developed for data encryption and decryption [4]. Here both
secure commerce and payments to private communications public key and private key are used in encryption and
and protecting passwords, here cryptography and decryption. The public key and private key cryptosystem is a
steganography comes in to play. combination of modular calculation of some Boolean
operations. Boolean operations such as 1’s and 2’scomplement
Cryptography is a process of converting the secured
and XOR operation are used for encryption and decryption.
original message into unreadable format during the
ASCII values of characters, numbers and symbols are used for
transmission of data. Cryptography is used to protect
this implementation.
information (message) in computer systems and networks.
When we send a message from source to destination, then Here ASCII values of the plaintext are converted into
there is a chance of data theft and access by third persons in binary values and then apply boolean operations on it and
network. Cryptography is required in computer networking to takes 32 bit in implementation. Therefore, it requires less
secure information from third person. [1], [2] space in data transfer than existing algorithm, which takes 128
bit in implementation. After implementing this algorithm on
Field Programmable Gate Arrays known as FPGAs is an
various characters, numbers and symbols, it is found that the
alternative for implementation of digital logic in systems. The
cipher text getting after encryption is totally secured and
prefabricated silicon chips can be programmed electrically to
unreadable.

978-1-4673-9939-5/16/$31.00 ©2016 IEEE

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In addition, this algorithm is secure as well as practical and
difficult to decrypt. It can be used for encryption, entity
authentication and key exchange. This algorithm describe the
public-key cryptosystem algorithm, its software
implementation, security and properties.
Pseudo random generator function can be used to generate
the public key and private key. This pseudo random number
generator function can be used on both encryption and
decryption side, which will further help the cryptographic
process in key exchange by reducing the effort of sending the
bulky key and security of the key itself [5].
FPGA implementation provides an intermediate solution
between general-purpose processors (GPPs) and application
specific integrated circuits (ASICs). FPGA configuring
software makes use of the broad range of functionality
supported by the reconfigurable device. So it has wider
applicability than ASIC. FPGA provides a faster hardware
solution than a GPP [3].
Verilog is a hardware description language, which
describes the behavior of any hardware. The syntax and
structures of verilog code is similar to C programming. The
process of conversion of Verilog codes into gate level design
such as AND, OR, XOR and flip-flops is called synthesis. The
synthesis reports provide information about how good the
design in terms of performance and speed. It also gives some
idea on how big the design area would be when it has been
realized into an ASIC/FPGA chip. [6]

III. ALGORITHM USED

Cryptography consists of encryption and decryption. The
process of converting plaintext to unreadable form is called Fig. 1. Flow chart for encryption algorithm
encryption. The unreadable form is known as cipher text. This
algorithm first takes ASCII values of characters, numbers and The Decryption is the reverse process of encryption. The
massages [4]. Then add a private key to the ASCII value of the process of conversion of cipher text into plain text is known as
text. Then take mod of the result and convert it into binary decryption. In this decryption algorithm, first we have to do
numbers. Then perform boolean operations such as xor operation with the cipher text and public key. Then
1’compliment, 2’s compliment and xor operations. The xor perform 1’s complement and 2’s compliment operation. After
operation is performed with a public key. The public key and that, the result is in binary form. Then we have to convert it
private key is generated using pseudo random number into ASCII format and add a private key with the result. Then
generator. The flow chart for encryption algorithm is shown in take mod operation with 256. The resultant ASCII values
Fig. 1 converted into the plain text. Here also, the private key and
public key is generated using pseudo random number
A. Algorithm for encryption generator. The flow chart for decryption algorithm is shown in
Fig . 2
• Take ASCII value of all characters, numbers and
symbols in the plaintext
B. Algorithm for decryption
• Add a private number to ASCII value as a privatekey • Initialize array to store 32 bits binary number and all
into the ASCII valued text. cipher text.
• X mod 256=Y. • Perform XOR operation of binary valued text with
• Convert result into its binary number. public key.

• Take 2’s complement of binary valued text. • Takes 1’s complement of binary valued text.

• Take 1’s complement of 2’s complemented binary • Takes 2’s complement of 1’s complement binary
valued text. valued text.

• Apply XOR operation of binary valued text with public • Convert binary valued to its resultant ASCII values.
key , then we got cipher text

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• Add with private number into resultant ASCII valued
that is Y.
• Y mod 256= X.
• Convert into its resultant characters, numbers and
symbols.
• Then we got the plaintext.
Fig. 3. FPGA design flow
IV. IMPLEMENTATION
The standard FPGA design flow is shown in Fig. 3 A. Steps for programming FPGA
.Software like Xilinx or Altera is used to program FPGA
• Design the circuit that which has to map to the Xilinx
through devices like Spartan and Vertex. Here we use Xilinx
part on the FPGA.
Spartan 3E FPGA kit for implementation. In the design step
[7] we create the digital circuit that is implemented inside the • Synthesize the design for the FPGA using the XST
FPGA, that is done through hardware description language. synthesis tool.
Here we use verilog HDL. The flow then goes through
compilation, simulation, programming, and verification in the • Generate a UCF file to hold constraints such as pin
FPGA hardware. assignments.
• Assign the I/O pins in our design to the pins on the
FPGA
• Map the design to the specific FPGA on the Spartan-
3E board.
• Generate the programming .bit file that has the bit
stream that configures the FPGA.
• Connect Spartan3 board to the computer and use the
Digilent software to program the FPGA using the bit
stream.

V. SIMULATION RESULTS
The Boolean algebra based cryptographic algorithm is
implemented in Verilog and result has been verified using
Matlab. Then synthesize the code in Xilinx Sparten3E FPGA
kit. Outputs of both encryption and decryption in ModelSim
are shown in the Fig. 4 and Fig. 5 respectively.
Number of LUT slices utilized by the proposed algorithm
is78 out of 1920 available slices. Fig. 6 and Fig. 7 Shows the
device utilization summary after synthesis of encryption and
decryption algorithm .

Fig. 2. Flow chart for decryption algorithm Fig. 4. Simulation output for encryption

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presented. So the public key length should be maximum of
(256*8 bit) i.e. 2048 bit. So there is 2^2048 possible
combinations of keys are present. To decrypt a massage
attackers has to check 2^2048 combinations of keys. For an
attackers to check all the possible combinations requires 5.87
X 10^62 yrs. So this algorithm is more secure than existing
algorithms.

VII. CONCLUSION
The FPGA implementation of Boolean algebra based
cryptographic algorithm has been presented in this paper. A new
32-bit encryption and decryption algorithm is developed for
secured data transfer. This algorithm uses 1’s and 2’s
complement and XOR operation on plain text and cipher text.
Fig. 5. Simulation output for decryption Boolean algebra based cryptographic algorithm has been
implemented in verilog and synthesizes the code in Xilinx
Sparten3E FPGA kit. Future work will be to implement this
algorithm on hardware and perform cryptanalysis attack to find
the key. Also this work can be further extended for other data
types.

Acknowledgment
We wish to thank Almighty God who gave us the
opportunity to successfully complete this work. The authors
wish to thank Amrita Vishwa Vidyapeetham University,
Kollam Campus, Kerala for providing us support and funding
to carry out this project.

References
Fig. 6. Device utilization summary after synthesis of
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[3] Tessier, R., and Burleson, W., “Reconfigurable computing for digital
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[4] NorAm Kumar , Pankaj Gupta , Monika Sahu ,Dr. M A Rizvi, "Boolean
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[5] Dripto chatterjee, Joyshree Nath, suvadeep Dasgupta, Ashok nath," A
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Fig. 7. Device utilization summary after synthesis of Volume: 03 Special Issue: 03 | May-2014 | NCRIET-2014.
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Cryptographic Algorithm on FPGA ", International Journal of Computer
VI. ANALYSIS Science and Mobile Computing , IJCSMC, Vol. 2, Issue. 4, April 2013
In this algorithm, public key and private key are used.
Public key is 32 bit long .But the length of private key is
depends on the plain text.. There are 0 -255 characters are

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