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VISVESVARAYA TECHNOLOGICAL UNIVERSITY

BELAGAVI
3rd to 8th Semester BE- Electronics & Communication Scheme of

Teaching and Examinations
(15-04-19)
Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2018 – 19)
2
VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

Scheme of Teaching and Examination 2018 – 19
Outcome Based Education(OBE) and Choice Based Credit System (CBCS)
III SEMESTER
Teaching Hours
Examination
/Week
Department
Teaching
Practical/
Credits
Drawing
Total Marks
Tutorial
CIE Marks
Lecture
SEE Marks
Duration in
Theory
Sl. Course and
Course Title
hours
No Course Code
L T P
Mathematics
1 BSC 18MAT31 (Title as per the decision of Mathematics 2 2 -- 03 40 60 100 3
BoS in Sciences)
2 PCC 18EC32 Electronic Devices 3 2 -- 03 40 60 100 4
3 PCC 18EC33 Digital System Design 3 0 -- 03 40 60 100 3
4 PCC 18EC34 Network Theory 3 0 -- 03 40 60 100 3
5 PCC Engineering Statistics & Linear -- 40 60 100 3
18EC35 3 0 03
Algebra
6 PCC 18EC36 Power Electronics & 3 0 -- 03 40 60 100 3
Instrumentation
7 PCC Electronic Devices & -- 2 2 40 60 100 2
18ECL37 03
Instrumentation Laboratory
8 PCC 18ECL38 Digital System Design Laboratory -- 2 2 03 40 60 100 2
Vyavaharika Kannada (Kannada for
18KVK39/49
communication)/
-- 2 -- -- 100 --
Aadalitha Kannada (Kannada for
18KAK39/49
9 Administration) HSMC 100 1
HSMC
OR
Constitution of India, Professional 1 -- -- 03 40 60
18CPH39
Ethics and Cyber Law Examination is by objective type questions
17 10 24 420 480
TOTAL OR OR 04 OR OR OR 900 24
18 08 27 360 540
Note: BSC: Basic Science, PCC: Professional Core, HSMC: Humanity and Social Science, NCMC: Non-credit mandatory course.
18KVK39 Vyavaharika Kannada (Kannada for communication) is for non-kannada speaking, reading and writing students and 18KAK39 Aadalitha
Kannada (Kannada for Administration) is for students who speak, read and write kannada.
Course prescribed to lateral entry Diploma holders admitted to III semester of Engineering programs
NC
10 18MATDIP31 Additional Mathematics - I Mathematics 02 01 -- 03 40 60 100 0
MC
(a)The mandatory non – credit courses Additional Mathematics I and II prescribed for III and IV semesters respectively, to the lateral entry Diploma
holders admitted to III semester of BE/B.Tech programs, shall attend the classes during the respective semesters to complete all the formalities of the
course and appear for the University examination. In case, any student fails to register for the said course/ fails to secure the minimum 40 % of the
prescribed CIE marks, he/she shall be deemed to have secured F grade. In such a case, the student have to fulfil the requirements during subsequent
semester/s to appear for SEE.
(b) These Courses shall not be considered for vertical progression, but completion of the courses shall be mandatory for the award of degree.
Courses prescribed to lateral entry B. Sc degree holders admitted to III semester of Engineering programs
Lateral entrant students from B.Sc. Stream, shall clear the non-credit courses Engineering Graphics and Elements of Civil Engineering and
Mechanics of the First Year Engineering Programme. These Courses shall not be considered for vertical progression, but completion of the courses
shall be mandatory for the award of degree.
AICTE Activity Points to be earned by students admitted to BE/B.Tech/B. Plan day college programme (For more details refer to Chapter
6,AICTE Activity Point Programme, Model Internship Guidelines):
Over and above the academic grades, every Day College regular student admitted to the 4 years Degree programme and every student entering 4 years
Degree programme through lateral entry, shall earn 100 and 75 Activity Points respectively for the award of degree through AICTE Activity Point
Programme. Students transferred from other Universities to fifth semester are required to earn 50 Activity Points from the year of entry to VTU. The
Activity Points earned shall be reflected on the student’s eighth semester Grade Card.
The activities can be can be spread over the years, anytime during the semester weekends and holidays, as per the liking and convenience of the student
from the year of entry to the programme. However, minimum hours’ requirement should be fulfilled. Activity Points (non-credit) have no effect on
SGPA/CGPA and shall not be considered for vertical progression.
In case students fail to earn the prescribed activity Points, Eighth semester Grade Card shall be issued only after earning the required activity Points.
Students shall be admitted for the award of degree only after the release of the Eighth semester Grade Card.
3

IV SEMESTER
Teaching Hours /Week Examination
Department
Practical/
Drawing
Total Marks
Tutorial
Teaching
CIE Marks
Lecture
SEE Marks
Duration in
Theory
Credits
Course and
Sl.
hours
Course code Course Title
No
L T P
Mathematics
1 BSC 18MAT41 (Title as per the decision of Mathematics 2 2 -- 03 40 60 100 3
BoS in Sciences)
2 PCC 18EC42 Analog Circuits 3 2 -- 03 40 60 100 4
3 PCC 18EC43 Principles of Communication -- 40 60 100 3
3 0 03
Systems
4 PCC 18EC44 Verilog HDL 3 0 -- 03 40 60 100 3
5 PCC 18EC45 Signals & Systems 3 0 -- 03 40 60 100 3
6 PCC 18EC46 Computer Organization & 40 60 100 3
3 0 -- 03
Architecture
7 PCC Analog Circuits and Communication -- 2 2 40 60 100 2
18ECL47 03
Laboratory
8 PCC 18ECL48 HDL Lab -- 2 2 03 40 60 100 2
Vyavaharika Kannada (Kannada for
18KVK39/49
communication)
-- 2 -- -- 100 --
Aadalitha Kannada (Kannada for
HSMC
18KAK39/49
9 Administration) HSMC 100 1
OR
Constitution of India, Professional 1 -- -- 03 40 60
18CPH49
Ethics and Cyber Law Examination is by objective type questions
TOTAL 17 10 24 420 480
OR OR 04 OR OR OR 900 24
18 08 27 360 540
Note: BSC: Basic Science, PCC: Professional Core, HSMC: Humanity and Social Science, NCMC: Non-credit mandatory course.
18KVK39/49 Vyavaharika Kannada (Kannada for communication) is for non-kannada speaking, reading and writing students and 18KAK39/49
Aadalitha Kannada (Kannada for Administration) is for students who speak, read and write kannada.
Course prescribed to lateral entry Diploma holders admitted to III semester of Engineering programs
10 NCMC 18MATDIP41 Additional Mathematics - II Mathematics 02 01 -- 03 40 60 100 0
((a)The mandatory non – credit courses Additional Mathematics I and II prescribed for III and IV semesters respectively, to the lateral entry Diploma
holders admitted to III semester of BE/B.Tech programs, shall attend the classes during the respective semesters to complete all the formalities of the
course and appear for the University examination. In case, any student fails to register for the said course/ fails to secure the minimum 40 % of the
prescribed CIE marks, he/she shall be deemed to have secured F grade. In such a case, the student have to fulfil the requirements during subsequent
semester/s to appear for SEE.
(b) These Courses shall not be considered for vertical progression, but completion of the courses shall be mandatory for the award of degree.
Courses prescribed to lateral entry B. Sc degree holders admitted to III semester of Engineering programs
Lateral entrant students from B.Sc. Stream, shall clear the non-credit courses Engineering Graphics and Elements of Civil Engineering and
Mechanics of the First Year Engineering Programme. These Courses shall not be considered for vertical progression, but completion of the courses
shall be mandatory for the award of degree.
AICTE activity Points: In case students fail to earn the prescribed activity Points, Eighth semester Grade Card shall be issued only after earning the
required activity Points. Students shall be admitted for the award of degree only after the release of the Eighth semester Grade Card.
4

V SEMESTER
Teaching Hours
Examination
/Week
Department
Teaching
Practical/
Credits
Drawing
Total Marks
Tutorial
CIE Marks
Lecture
SEE Marks
Duration in
Theory
Sl. Course and
Course Title
hours
No Course code
L T P
1 HSMC 18ES51 Technological Innovation
Management And 3 0 -- 03 40 60 100 3
Entrepreneurship
2 PCC 18EC52 Electromagnetic Waves 3 2 -- 03 40 60 100 4
3 PCC 18EC53 Digital Signal Processing 3 2 -- 03 40 60 100 4
4 PCC 18EC54 Information Theory & Coding 3 -- -- 03 40 60 100 3
5 PCC 18EC55 Control Systems 3 -- -- 03 40 60 100 3
6 PCC 18EC56 Microcontroller 3 -- -- 03 40 60 100 3
7 PCC 18ECL57 Microcontroller Laboratory -- 2 2 03 40 60 100 2
8 PCC Digital Signal Processing -- 2 2 40 60 100 2
18ECL58 03
Laboratory
Civil/
Environmental
9 HSMC 18CIV59 Environmental Studies [Paper setting: 1 -- -- 02 40 60 100 1
Civil Engineering
Board]
TOTAL 18 10 4 26 360 540 900 25
Note: PCC: Professional Core, HSMC: Humanity and Social Science.
5

VI SEMESTER
Department
Practical/
Drawing
Total Marks
Tutorial
Teaching
CIE Marks
Lecture
SEE Marks
Duration in
Theory
Credits
Sl. Course and
hours
Course Title
No Course code
L T P
1 PCC 18EC61 Digital Communication 3 2 -- 03 40 60 100 4
2 PCC 18EC62 Embedded Systems 3 2 -- 03 40 60 100 4
3 PCC 18EC63 Computer Networks 3 2 -- 03 40 60 100 4
4 PEC 18XX64X Professional Elective -1 3 -- -- 03 40 60 100 3
5 OEC 18XX65X Open Elective -A 3 -- -- 03 40 60 100 3
6 PCC 18ECL66 Embedded Systems Laboratory -- 2 2 03 40 60 100 2
7 PCC 18ECL67 Computer Networks Laboratory -- 2 2 03 40 60 100 2
8 MP 18ECMP68 Mini-project -- -- 2 03 40 60 100 2
To be carried out during the vacation/s of VI and VII semesters and /or VII
9 Internship -- Internship
and VIII semesters.
TOTAL 15 10 6 24 320 480 800 24
Note: PCC: Professional core, PEC: Professional Elective, OE: Open Elective, MP: Mini-project.
Professional Elective -1
Course code under Course Title
18XX64X
18EC641 Operating System
18EC642 Artificial Neural Networks
18EC643 Digital System Design using Verilog
18EC644 Nanoelectronics
Open Elective –A
(i) Signal Processing (ii) Automotive Electronics (iii) Sensors & Signal Conditioning
Students can select any one of the open electives offered by other Departments except those that are offered by the parent Department (Please refer to
the list of open electives under 18XX65X).
Selection of an open elective shall not be allowed if,
 The candidate has studied the same course during the previous semesters of the programme.
 The syllabus content of open elective is similar to that of the Departmental core courses or professional electives.
 A similar course, under any category, is prescribed in the higher semesters of the programme.
Registration to electives shall be documented under the guidance of Programme Coordinator/ Advisor/Mentor.
Mini-project work:
Based on the ability/abilities of the student/s and recommendations of the mentor, a single discipline or a multidisciplinary Mini- project can be
assigned to an individual student or to a group having not more than 4 students.
CIE procedure for Mini-project:
(i) Single discipline: The CIE marks shall be awarded by a committee consisting of the Head of the concerned Department and two senior faculty
members of the Department, one of whom shall be the Guide.
The CIE marks awarded for the Mini-project work, shall be based on the evaluation of project report, project presentation skill and question and answer
session in the ratio 50:25:25.The marks awarded for the project report shall be the same for all the batch mates.
(ii) Interdisciplinary: Continuous Internal Evaluation shall be group wise at the college level with the participation of all the guides of the college.
The CIE marks awarded for the Mini-project, shall be based on the evaluation of project report, project presentation skill and question and answer
session in the ratio 50:25:25.The marks awarded for the project report shall be the same for all the batch mates.
SEE for Mini-project:
(i) Single discipline: Contribution to the Mini-project and the performance of each group member shall be assessed individually in the semester end
examination (SEE) conducted at the department.
(ii) Interdisciplinary: Contribution to the Mini-project and the performance of each group member shall be assessed individually in semester end
examination (SEE) conducted separately at the departments to which the student/s belong to.
Internship: All the students admitted to III year of BE/B.Tech shall have to undergo mandatory internship of 4 weeks during the vacation of VI and
VII semesters and /or VII and VIII semesters. A University examination shall be conducted during VIII semester and the prescribed credit shall be
included in VIII semester. Internship shall be considered as a head of passing and shall be considered for the award of degree. Those, who do not take-
up/complete the internship shall be declared fail and shall have to complete during subsequent University examination after satisfying the internship
requirements.
6

VII SEMESTER
Department
Practical/
Drawing
Total Marks
Tutorial
Teaching
CIE Marks
Lecture
SEE Marks
Duration in
Theory
Credits
Sl. Course and
hours
Course Title
No Course code
L T P
1 PCC 18EC71 Microwave & Antenna 3 -- -- 03 40 60 100 3
2 PCC 18EC72 VLSI Design 3 -- -- 03 40 60 100 3
3 PEC 18XX73X Professional Elective - 2 3 -- -- 03 40 60 100 3
5 OEC 18XX75X Open Elective -B 3 -- -- 03 40 60 100 3
6 PCC Advanced Communication
18ECL76 -- -- 2 03 40 60 100 2
Laboratory
7 PCC 18ECL77 VLSI Laboratory -- -- 2 03 40 60 100 2
7 Project 18ECP78 Project Work Phase - 1 -- -- 2 -- 100 -- 100 1
(If not completed during the vacation of VI and VII semesters, it shall be
8 Internship -- Internship
carried out during the vacation of VII and VIII semesters )
TOTAL 17 -- 4 18 340 360 700 20
Note: PCC: Professional core, PEC: Professional Elective.
Professional Elective - 2
18XX73X
18EC731 Real Time System
18EC732 Object Oriented Programming using C++
18EC733 Digital Image Processing
18EC734 Low Power Microcontroller
Professional Electives - 3
18XX74X
18EC741 IOT & Wireless Sensor Networks
18EC742 Satellite Communication
18EC743 Multimedia Communication
18EC744 Network Security
Open Elective –B
(i) Communication Theory (iii) MEMS (iii) Mobile Operating Systems
Students can select any one of the open electives offered by other Departments except those that are offered by the parent Department (Please refer to
the list of open electives under 18XX75X).
Selection of an open elective shall not be allowed if,
 The candidate has studied the same course during the previous semesters of the programme.
 The syllabus content of open elective is similar to that of the Departmental core courses or professional electives.
 A similar course, under any category, is prescribed in the higher semesters of the programme.
Registration to electives shall be documented under the guidance of Programme Coordinator/ Advisor/Mentor.
Project work:
Based on the ability/abilities of the student/s and recommendations of the mentor, a single discipline or a multidisciplinary project can be assigned to an
individual student or to a group having not more than 4 students. In extraordinary cases, like the funded projects requiring students from different
disciplines, the project student strength can be 5 or 6.
CIE procedure for Project Work Phase - 1:
The CIE marks awarded for the project work phase -1, shall be based on the evaluation of the project work phase -1 Report (covering Literature Survey,
Problem identification, Objectives and Methodology), project presentation skill and question and answer session in the ratio 50:25:25.The marks
awarded for the Project report shall be the same for all the batch mates.
(ii) Interdisciplinary: Continuous Internal Evaluation shall be group wise at the college level with the participation of all guides of the college.
Participation of external guide/s, if any, is desirable.
The CIE marks awarded for the project work phase -1, shall be based on the evaluation of project work phase -1 Report, project presentation skill and
question and answer session in the ratio 50:25:25.The marks awarded for the project report shall be the same for all the batch mates.
Internship: All the students admitted to III year of BE/B.Tech shall have to undergo mandatory internship of 4 weeks during the vacation of VI and
VII semesters and /or VII and VIII semesters. A University examination shall be conducted during VIII semester and the prescribed credit shall be
included in VIII semester. Internship shall be considered as a head of passing and shall be considered for the award of degree. Those, who do not take-
up/complete the internship shall be declared fail and shall have to complete during subsequent University examination after satisfying the internship
requirements.
7
VIII SEMESTER
Department
Total Marks
Practical/
Teaching
CIE Marks
SEE Marks
Duration in
Drawing
Tutorial
Lecture
Credits
Theory
Course and
Sl.
hours
No
L T P
1 PCC 18EC81 Wireless Communication 3 -- -- 03 40 60 100 3
3 Project 18ECP83 Project Work Phase - 2 -- -- 2 03 40 60 100 8
4 Seminar 18ECS84 Technical Seminar -- -- 2 03 100 -- 100 1
Completed during the vacation/s of
5 Internship 18ECI85 Internship VI and VII semesters and /or VII 03 40 60 100 3
and VIII semesters.)
TOTAL 06 -- 4 15 260 240 500 18
Note: PCC: Professional Core, PEC: Professional Elective.
Professional Electives - 4
under 18XX82X
18EC821 Cryptography
18EC822 Optical Communication Networks
18EC823 Advanced Cellular Communication
Project Work
CIE procedure for Project Work Phase - 2:
(ii) Interdisciplinary: Continuous Internal Evaluation shall be group wise at the college level with the participation of all guides of the college.
Participation of external guide/s, if any, is desirable.
SEE for Project Work Phase - 2:
(i) Single discipline: Contribution to the project and the performance of each group member shall be assessed individually in semester end examination
(SEE) conducted at the department.
(ii) Interdisciplinary: Contribution to the project and the performance of each group member shall be assessed individually in semester end
examination (SEE) conducted separately at the departments to which the student/s belong to.
Internship: Those, who have not pursued /completed the internship shall be declared as fail and have to complete during subsequent University
examination after satisfying the internship requirements.
Activity points of the students who have earned the prescribed AICTE activity Points shall be sent the University along with the CIE marks of 8th
semester. In case of students who have not satisfied the AICTE activity Points at the end of eighth semester, the column under activity Points shall be
marked NSAP (Not Satisfied Activity Points).
Third Semester Syllabus
B.E., III Semester, Electronics & Communication Engineering /

Telecommunication Engineering
ELECTRONIC DEVICES
SEMESTER – III (EC/TC)
[As per Choice Based Credit System (CBCS) Scheme]

Subject Code 18EC32 CIE Marks 40
Number of Lecture 3 + 2 (Tutorial) SEE Marks 60

Hours/Week
Total Number of 40 (8 Hours / Exam Hours 03
Lecture Hours Module)
CREDITS – 04
Course Objectives: This course will enable students to:
1. Understand the basics of semiconductor physics and electronic devices.

2. Describe the mathematical models BJTs and FETs along with the
constructional details.
3. Understand the construction and working principles of optoelectronic and
high power devices and circuits
4. Understand the fabrication process of semiconductor devices and CMOS
process integration.
RBT
Module-1
Level
Semiconductor and p-n Junctions L1,L2
Bonding forces in solids, Energy bands, Metals, Semiconductors and

Insulators, Direct and Indirect semiconductors, Electrons and Holes,
Intrinsic and Extrinsic materials, Conductivity and Mobility, Drift and
Resistance, Effects of temperature and doping on mobility, Hall Effect.
Forward and Reverse biased junctions- Qualitative description of Current
flow at a junction, reverse bias, Reverse bias breakdown- Zener
breakdown, avalanche breakdown, Rectifiers, Breakdown diode, Varactor
diode.(Text 1)
Module-2
Bipolar Junction Transistor L1,L2
Fundamentals of BJT operation, Amplification with BJTS, BJT Fabrication,

The coupled Diode model (Ebers-Moll Model), Switching operation of a
transistor, Cutoff, saturation, switching cycle, specifications, Drift in the
base region, Base narrowing, Avalanche breakdown, Base Resistance and
Emitter crowding, Capacitance and Charging times(hybrid-pi model),
Heterojunction Bipolar Transistor. (Text 1).
Module – 3
Field Effect Transistors L1,L2
Basic pn JFET Operation, MESFET operation, MOSFET, Two terminal

MOS structure- Energy band diagram, Depletion layer thickness, Work
Function Difference, Flat band Voltage, Threshold Voltage. Ideal
Capacitance – Voltage Characteristics and Frequency Effects, Basic
MOSFET Operation- MOSFET structure, Current-Voltage Characteristics,
Small Signal Equivalent Circuit and frequency limitation. (Text 2).
Module-4
Optoelectronic Devices L1,L2
Photodiodes: Current and Voltage in an Illuminated Junction, Solar Cells,

Photodetectors. Light Emitting Diode: Light Emitting materials.
High Power devices: The P-N-P-N Diode, Insulated Gate Bipolar

Transistor.
Nanoelectronic Devices: Zero Dimensional Quantum Dots, One

Dimensional Quantum Wires, Two Dimensional Layered crystals,
Spintronic memory, Nanoelectronic Resistive memory.(Text 1)
Module-5
Fabrication of p-n junctions-Thermal Oxidation, Diffusion, Rapid L1,L2

Thermal Processing, Ion implantation, chemical vapour deposition,
photolithography, Etching, Metallization.
Integrated Circuits: Background, Evolution of ICs: CMOS Process

Integration, Integration of Other Circuit Elements. (Text 1).
Course outcomes: After studying this course, students will be able to:
1. Understand the principles of semiconductor Physics.
2. Understand the principles and characteristics of different types of
semiconductor devices
3. Understand the fabrication process of semiconductor devices
4. Understand and utilize the mathematical models of semiconductor
junctions and MOS transistors for circuits and systems.
5. Differentiate the semiconductor devices based on its usage and
applications
Question paper pattern:
 Examination will be conducted for 100 marks with question paper containing
10 full questions, each of 20 marks.
 Each full question can have a maximum of 4 sub questions.
 There will be 2 full questions from each module covering all the topics of the
module.
 Students will have to answer 5 full questions, selecting one full question from
each module.
 The total marks will be proportionally reduced to 60 marks as SEE marks is
60.
Text Books:
1. Ben.G.Streetman, Sanjay Kumar Banergee, “Solid State Electronic Devices”,
7th Edition, Pearson Education, 2016, ISBN 978-93-325-5508-2.
2. Donald A Neamen, Dhrubes Biswas, “Semiconductor Physics and Devices”,
4th Edition,MC Graw Hill Education, 2012, ISBN 978-0-07-107010-2.
Reference Book:
1. S.M.Sze, Kwok K. Ng, “Physics of Semiconductor Devices”, 3rd Edition, Wiley,
2018.
2. 2. A.Bar-Lev, “Semiconductor and Electronic Devices”, 3rd Edition, PHI,
1993.
DIGITAL SYSTEM DESIGN

Course Code 18EC33 CIE Marks 40
Number of Lecture 03 SIE Marks 60
Hours/Week
Total Number of 40 (08 Hours/ Module) Exam Hour 03
Lecture Hours
CREDITS – 03
1. Illustrate simplification of Algebraic equations using Karnaugh Maps and

Quine-McClusky Techniques.
2. Design Decoders, Encoders, Digital Multiplexer, Adders, Subtractors and
Binary Comparators.
3. Describe Latches and Flip-flops, Registers and Counters. Analyze Mealy and
Moore Models.
4. Develop state diagrams Synchronous Sequential Circuits.
5. To provide the basic knowledge about VHDL and its use.
RBT
Module-1
Level
Principles of combination logic: Definition of combinational logic, L1,L2,L3

canonical forms, Generation of switching equations from truth tables,
Karnaugh maps-3,4,5 variables, Incompletely specified functions (Don‘t
care terms) Simplifying Max term equations. (Text 1, Chapter 3).
Module-2
Analysis and design of combinational logic: Decoders, Encoders, Digital L1,L2,L3

multiplexers, Adders and subtractors, Look ahead carry, Binary
comparators.(Text 1, Chapter 4).
Module – 3
Flip-Flops and its Applications: Basic Bistable elements, Latches, The L1,L2,L3
master-slave flip-flops (pulse-triggered flip-flops): SR flip-flops, JK flip-
flops, Characteristic equations, Registers, binary ripple counters,
synchronous binary counters. Text 2, Chapter 6)
Module-4
Sequential Circuit Design: Design of a synchronous counter, Design of a L1,L2,L3

synchronous mod-n counter using clocked JK, D, T and SR flip-flops.
Mealy and Moore models, State machine notation, Construction of state
diagrams. (Text 2,1 Chapter 6)
Module-5
HDL: A brief history of HDL, Structure of HDL Module, Operators, Data L1,L2,L3
types, Types of Descriptions (only VHDL), Simulation and Synthesis, brief
comparison of VHDL and Verilog.
Data-Flow Descriptions: Structure of data flow description (only VHDL).
(Text 3 Chapter 1,2)
1. Develop simplified switching equation using Karnaugh Maps and
Quine- McClusky techniques.
2. Explain the operation of decoders, encoders, multiplexers,
demultiplexers, adders, subtractors and comparators.
3. Explain the working of Latches and Flip Flops (SR,D,T and JK).
4. Design Synchronous/Asynchronous Counters and Shift registers
using FlipFlops.
5. Develop Mealy/Moore Models and state diagrams for the given
clocked sequential circuits.
6. Describe the structure of HDL module and data-flow description.

module.
each module.
60.
Text Books:
1. Digital Logic Applications and Design, John M Yarbrough, Thomson Learning,
2001. ISBN 981-240-062-1.
2. Donald D. Givone, ―Digital Principles and Design‖, McGraw Hill, 2002. ISBN
978-0-07-052906-9.
3. HDL Programming (VHDL and Verilog)-Nazeih M.Botros-John Weily India Pvt.
Ltd. 2008.
Reference Book:
1. D. P. Kothari and J. S Dhillon, ―Digital Circuits and Design‖, Pearson, 2016,
ISBN:9789332543539.
2. Morris Mano, ―Digital Design‖, Prentice Hall of India, Third Edition.
3. Charles H Roth, Jr., ―Fundamentals of Logic Design, Cengage Learning.
4. 4. K. A. Navas, ―Electronics Lab Manual‖, Volume I, PHI, 5th Edition, 2015,
ISBN:9788120351424.
NETWORK ANALYSIS

Number of Lecture 03 SEE Marks 60
Hours/Week
Total Number of 40 (8 Hours/Module) Exam 03
Lecture Hours Hours
CREDITS – 03
1. Describe basic network concepts emphasizing source transformation,

source shifting, mesh and nodal techniques to solve for
resistance/impedance, voltage, current and power.
2. Explain Superposition, Reciprocity, Thevinin‘s and Norton’s theorems,
Maximum Power transfer theorems and apply them in solving the
problems related to Electrical Circuits.
3. Explain the behaviour of networks subjected to transient conditions.
4. Use of Laplace transforms to network problems.
5. Describe Series and Parallel Combination of Passive Components as
resonating circuits, related parameters and to analyze frequency
response.
6. Study two port network parameters like Z, Y, T and h.
Module-1 RBT Level
Basic Concepts: Practical sources, Source transformations, Network L1,L2,L3

reduction using Star – Delta transformation, Loop and node analysis
with linearly dependent and independent sources for DC networks,
Concepts of super node and super mesh.
Module-2
Network Theorems: Superposition, Reciprocity, Thevinin‘s and L1,L2,L3

Norton’s theorems, Maximum Power transfer theorem.
Module – 3
Transient behaviour and initial conditions: Behaviour of circuit L1,L2,L3

elements under switching condition and their Representation,
evaluation of initial and final conditions in RL, RC and RLC circuits
for AC and DC excitations.
Laplace Transformation: Solution of networks, step, ramp and
impulse responses.
Module-4
Resonant Circuits: Series and parallel resonance, frequency- L1,L2,L3

response of series and Parallel circuits, Q–Factor, Bandwidth.
Module-5
Two port network parameters: Definition of Z, Y, h and L1,L2,L3

Transmission Parameters, modelling with these parameters.
Course outcomes: After studying this course, students will be able
to:
 Determine currents and voltages using source transformation/
source shifting/mesh/ nodal analysis and reduce given
network using star-delta transformation/source
transformation/ source shifting.
 Solve network problems by applying Superposition, Reciprocity,
Thevinin‘s and Norton’s theorems, Maximum Power transfer
theorems to reduce circuit complexities and to arrive at feasible
solutions.
 Calculate current and voltages for the given circuit under
transient conditions.
 Apply Laplace transform to solve the given network.
 Evaluate for RLC elements/ frequency response related
parameters like resonant frequency, quality factor, half power
frequencies, voltage across inductor and capacitor, current
through the RLC elements, in resonant circuits
 Solve the given network using specified two port network
parameter like Z or Y or T or h.

module.
each module.
60.
Text Books:
1. M.E. Van Valkenberg (2000), ―Network analysis‖, Prentice Hall of India, 3rd
edition, 2000, ISBN: 9780136110958.
2. Roy Choudhury, ―Networks and systems‖, 2nd edition, New Age International
Publications, 2006, ISBN: 9788122427677.
Reference Book:
1. Hayt, Kemmerly and Durbin ―Engineering Circuit Analysis‖, TMH 7th
Edition, 2010.
2. J. David Irwin /R. Mark Nelms, ―Basic Engineering Circuit Analysis‖, John
Wiley, 8thed, 2006.
3. Charles K Alexander and Mathew N O Sadiku, ― Fundamentals of Electric
Circuits, Tata McGraw-Hill, 3rd Ed, 2009.
ENGINEERING STATISTICS AND LINEAR ALGEBRA

Course Code 18EC35 CIE Marks Marks 40
Number of Lecture 03 SEE Marks Marks 60

Hours/Week
Total Number of 40 (8 Hours/Module) Exam Hours 03

Lecture Hours
CREDITS – 03
1. Understand the meaning of Single and Multiple Random Variables, and

extension to Random Processes. Familiarization with the concept of Vector
spaces and orthogonality with a qualitative insight into applications in
communications.
2. Analyse mathematically the quantitative parameters of Single and Multiple
Random Variables as well as Random Processes.
3. Compute the quantitative parameters for functions of single and Multiple
Random Variables and Processes. Compute the quantitative parameters for
Matrices and Linear Transformations
4. Associate the concepts of Random Processes to examples that involve
transmission through Filters.
Module-1 RBT Level
Single Random Variables: Definition of random variables, L1,L2,L3

cumulative distribution function continuous and discrete random
variables; probability mass function, probability density functions
and properties; Expectations, Characteristic functions, Functions of
single Random Variables, Conditioned Random variables.
Application exercises to Some special distributions: Uniform,
Exponential, Laplace, Gaussian; Binomial, and Poisson distribution.
(chapter 4 Text 1)
Module-2
Multiple Random variables: Concept, Two variable CDF and PDF, L1,L2,L3
Two Variable expectations (Correlation, orthogonality, Independent),
Two variable transformation, Two Gaussian Random variables, Sum
of two independent Random Variables, Sum of IID Random
Variables – Central limit Theorem and law of large numbers,
Conditional joint Probabilities, Application exercises to Chi-square
RV, Student-T RV, Cauchy and Rayleigh RVs. (chapter 5 Text 1)
Module – 3
Random Processes: Ensemble, PDF, Independence, Expectations, L1,L2,L3

Stationarity, Correlation Functions (ACF, CCF, Addition, and
Multiplication), Ergodic Random Processes, Power Spectral Densities
(Wiener Khinchin, Addition and Multiplication of RPs, Cross spectral
densities), Linear Systems (output Mean, Cross correlation and Auto
correlation of Input and output), Exercises with Noise. (chapter 6
Text 1)
Module-4
Vector Spaces: Vector spaces and Null subspaces, Rank and Row L1,L2,L3
reduced form, Independence, Basis and dimension, Dimensions of
the four subspaces, Rank-Nullity Theorem, Linear Transformations
Orthogonality: Orthogonal Vectors and Subspaces, Projections and
Least squares, Orthogonal Bases and Gram- Schmidt
Orthogonalization procedure.
(Refer chapters 2 and 3 Text 2)
Module-5
Determinants: Properties of Determinants, Permutations and Co- L1,L2,L3

Factors. (Refer Chapter 4, Text 2)
Eigenvalues and Eigen vectors: Review of Eigenvalues and

Diagonalization of a Matrix, Special Matrices (Positive Definite,
Symmetric) and their properties, Singular Value Decomposition.
(Refer Chapter 5, Text 2)

to:
1. Associate the concepts of statistics to Communication events
and identify corresponding Random Variables and Random
Processes in these events.
2. Analyse and model the Random events in typical
communication events to extract quantitative statistical
parameters.
3. Analyse and model typical signal sets in terms of a basis
function set of Amplitude, phase and frequency.
4. Demonstrate by way of simulation or emulation the ease of
analysis employing basis functions and statistical
representation.
module.
each module.
60.
Text Books:
1. Richard H Williams, “Probability, Statistics and Random Processes for
Engineers” Cengage Learning, 1st Edition, 2003, ISBN 13: 978-0-534-
36888-3, ISBN 10: 0-534-36888-3.
2. Gilbert Strang, “Linear Algebra and its Applications”, Cengage Learning,
4th Edition, 2006, ISBN 97809802327
Reference Book:
1. Hwei P. Hsu, “Theory and Problems of Probability, Random Variables, and
Random Processes” Schaums Outline Series, McGraw Hill. ISBN 10: 0-07-
030644-3.
2. K. N. Hari Bhat, K Anitha Sheela, Jayant Ganguly, “Probability Theory
and Stochastic Processes for Engineers”, Cengage Learning India, 2019,
ISBN: Not in book
POWER ELECTRONICS AND INSTRUMENTATION

Hours/Week
Total Number of 40 (8 Hours / Module) Exam Hours 03
Lecture Hours
CREDITS – 03
Course
[As per Choice Based Credit System (CBCS) students
Objectives: This course will enable Scheme] to:
 Study and analysis of thyristor circuits with different triggering conditions.
 Learn the applications of power devices in controlled rectifiers, converters and
inverters.
 Understand types of instrument errors.
 Develop circuits for multirange Ammeters and Voltmeters. Multimeters and
 Describe principle of operation of digital measuring instruments and Bridges.
 Understand the operation of Transducers, Instrumentation amplifiers and PLCs.
Module-1 RBT Level

Introduction: History, Power Electronic Systems, Power Electronic L1, L2
Converters and Applications.
Thyristors: Static Anode-Cathode characteristics and Gate characteristics
of SCR, Turn-ON methods, Turn-OFF mechanisms, Turn-OFF Methods:
Natural and Forced Commutation – Class A and Class B types, Gate
Trigger Circuit: Resistance Firing Circuit, Resistance capacitance firing
circuit, Unijunction Transistor: Basic operation and UJT Firing Circuit.
(Text 1)
Module-2
Phase Controlled Converter: Control techniques, Single phase half wave L1, L2, L3
and full wave controlled rectifier with resistive and inductive loads, effect of
freewheeling diode.
Choppers: Chopper Classification, Basic Chopper operation: step-down,
step-up and step-up/down choppers.(Text 1)
Module-3
Inverters: Classification, Single phase Half bridge and full bridge inverters L1, L2, L3
with RL load, Pulse width modulated Half bridge and full bridge inverters.
(Text 1)
Principles of Measurement: Static Characteristics, Error in Measurement,
Types of Static Error. (Text 2: 1.2-1.6)
Multirange Ammeters, Multirange voltmeter. (Text 2: 3.2, 4.4 )
Module-4
Digital Voltmeter: Ramp Technique, Dual slope integrating Type DVM, L1, L2
Direct Compensation type and Successive Approximations type DVM
(Text 2: 5.1-5.3, 5.5, 5.6)
Digital Multimeter. Digital Frequency Meter and Digital Measurement of

Time, Function Generator.
Bridges: Measurement of resistance: Wheatstone’s Bridge, AC Bridges-
Capacitance and Inductance Comparison bridge, Wien’s bridge.
(Text 2: refer 6.2, 6.3 upto 6.3.2, 6.4 upto 6.4.2, 8.8, 11.2, 11.8-11.10,
11.14).
Module-5
Transducers: Introduction, Electrical Transducer, Resistive Transducer, L1, L2,L3
Resistive position Transducer, Resistance Wire Strain Gauges, Resistance
Thermometer, Thermistor, LVDT.
(Text 2: 13.1-13.3, 13.5, 13.6 upto 13.6.1, 13.7, 13.8, 13.11).
Instrumentation Amplifier using Transducer Bridge, Temperature

indicators using Thermometer, Analog Weight Scale (Text 2: 14.3.3, 14.4.1,
14.4.3).
Programmable Logic Controller, PLC: Structure, Operation, Relays and

Registers (Text 2: 21.15, 21.15.2, 21.15.3, 21.15.5, 21.15.6).
Course Outcomes: At the end of the course students should be able to:
 Build and test circuits using power devices such as SCR
 Analyze and design controlled rectifier, DC to DC converters, DC to AC
inverters.
 Define instrument errors.
 Develop circuits for multirange Ammeters, Voltmeters and Bridges to
measure passive component values and frequency.
 Describe the principle of operation of Digital instruments and PLCs.
 Use Instrumentation amplifier for measuring physical parameters.

 Examination will be conducted for 100 marks with question paper containing 10 full
questions, each of 20 marks.
module.
 Students will have to answer 5 full questions, selecting one full question from each
module.
 The total marks will be proportionally reduced to 60 marks as SEE marks is 60.
Text Books:
1. M.D Singh and K B Khanchandani, Power Electronics, 2nd Edition, Tata Mc-Graw
Hill, 2009, ISBN: 0070583897
2. H. S. Kalsi, “Electronic Instrumentation”, McGraw Hill, 3rd Edition, 2012,
ISBN:9780070702066.
Reference Books:
1. Mohammad H Rashid, Power Electronics, Circuits, Devices and Applications,
3rd/4th Edition, Pearson Education Inc, 2014, ISBN: 978-93-325-1844-5.
2. L. Umanand, Power Electronics, Essentials and Applications, John Wiley India
Pvt. Ltd, 2009.
3. David A. Bell, “Electronic Instrumentation & Measurements”, Oxford University
Press PHI 2nd Edition, 2006, ISBN 81-203-2360-2.
4. A. D. Helfrick and W.D. Cooper, “Modern Electronic Instrumentation and
Measuring Techniques”, Pearson, 1st Edition, 2015, ISBN: 9789332556065.
ELECTRONIC DEVICES AND INSTRUMENTATION LABORATORY
[As per Choice Based Credit System (CBCS) scheme]
Laboratory 18ECL37 CIE 40

Code
Number of 02Hr Tutorial (Instructions) SEEMarks
Marks 60
Lecture
+ 02 Hours Laboratory
Hours/Week
RBT Level L1, L2, L3 Exam Hours 03
CREDITS – 02
Course objectives: This laboratory course enables students to
 Understand the circuit schematic and its working

 Study the characteristics of different electronic devices
 Design and simple electronic circuits as per the specifications using discrete
electronic components.
 Familiarize with EDA software which can be used for electronic circuit
simulation.
Laboratory Experiments
PART A : Experiments using Discrete components
1. Conduct experiment to test diode clipping (single/double ended) and clamping

circuits (positive/negative)
2. Conduct experiment on Half wave rectifier and Full wave rectifier with and without
filter and measure the ripple factor.
3. Determine characteristics of Zener diode and design a Simple Zener voltage
regulator to determine line and load regulation.
4. Conduct an experiment to find characteristics of LDR and Photo diode and to turn
on an LED using LDR.
5. Conduct an experiment on SCR Controlled HWR and FWR using RC triggering
circuit.
6. Conduct an experiment to measure temperature using a temperature sensor bridge
connected to an instrumentation amplifier.
PART-B : Simulation using EDA software
(EDWinXP, PSpice, MultiSim, Proteus or CircuitLab)

1. Input, Output and Transfer characteristics of BJT Common emitter configuration
and evaluation of parameters.
2. Transfer and drain characteristics of a JFET and MOSFET.
3. Static characteristics of SCR and IGBT.
4. RC Phase Shift Oscillator using BJT and FET.
5. UJT triggering circuit for Controller Rectifiers.
6. Verification of Network Theorems: Thevenins, Nortons and Maximum power

Transfer.
7. Design and simulation of Regulated power supply.
8. Design and Simulation of Function generator to generate sine wave, square wave
and ramp signal.
Course Outcomes: On the completion of this laboratory course, the students will be
able to:
 Understand the characteristics of various electronic devices and measurement of

parameters.
 Design and test simple electronic circuits
 Use of circuit simulation software for the implementation and characterization of
electronic circuits and devices.
Conduct of Practical Examination:
 All laboratory experiments are to be considered for practical examination.
 For examination one question from PART-A and one question from PART-B or
only one question from PART-A experiments based on the complexity, to be set.
 Students are allowed to pick one experiment from the lot.
 Strictly follow the instructions as printed on the cover page of answer script for
breakup of marks.
 Change of experiment is allowed only once and Marks allotted to the procedure
part to be made zero.
Reference Books:
1. David A Bell, “Fundamentals of Electronic Devices and Circuits Lab Manual, 5th
Edition, 2009, Oxford University Press.
2. Muhammed H Rashid, “Introduction to PSpice using OrCAD for circuits and
electronics”, 3rd Edition, Prentice Hall, 2003.
DIGITAL SYSTEM DESIGN LABORATORY
Laboratory 18ECL38 IA 40
Code Marks
Number of 01Hr Tutorial (Instructions) Exam 60
Lecture + 02 Hours Laboratory Mark
Hours/Week
RBT Level L1,L2,L3,L4 Exam 03
Hour
CREDITS – 02
Course objectives: This laboratory course enables students to get
practical experience in design, realisation and verification of
 Demorgan’s Theorem, SOP, POS forms
 Full/Parallel Adders, Subtractors and Magnitude Comparator
 Multiplexer using logic gates
 Demultiplexers and Decoders
 Flip-Flops, Shift registers and Counters
 Full adder/Subtractor, Counters using VHDL
Laboratory Experiments: (RBT)

NOTE: Use discrete components to test and verify the
Level
logic gates. The IC numbers given are suggestive; any
equivalent ICs can be used.
1. Verify L1, L2, L3
(a) Demorgan’s Theorem for 2 variables.
(b) The sum-of product and product-of-sum
expressions using universal gates.
2. Design and implement L3, L4
(a) Half Adder & Full Adder using i) basic gates. ii) NAND
gates
(b) Half subtractor & Full subtractor using i) basic gates.
ii) NAND gates
3. Design and implement L3, L4
(i) 4-bit Parallel Adder/ subtractor using IC 7483.
(ii) BCD to Excess-3 code conversion and vice-
versa.
3. Design and Implementation of (i) 1-bit Comparator L3, L4
(ii) 5-bit Magnitude Comparator using IC 7485.
5. Realize L2, L3, L4
(a) Adder & Subtactors using IC 74153.
(b) 4-variable function using IC 74151(8:1MUX).
6. Realize (i) Adder & Subtractors using IC74139. L2, L3, L4
(ii) Binary to Gray code conversion & vice-versa
(74139)
7. Realize the following flip-flops using NAND Gates. L2, L3
Master-Slave JK, D & T Flip-Flop.
8. Realize the following shift registers using IC7474/7495 L2, L3
(a) SISO (b) SIPO (c) PISO (d)PIPO (e)Ring (f) Johnson counter
9. Realize (i) Mod-N Counter using IC7490/7476. L2, L3
(ii) Synchronous counter using IC74192/7476.
10. Design Pseudo Random Sequence generator using 7495. L2, L3
11. Write a VHDL code for Full Adder/Full Subtractor and L2, L3, L4
Simulate using Simulation tool.
12. Write a VHDL code for 4-bit binary, BCD counters and L2, L3, L4
Simulate using Simulation tool.
Course outcomes: On the completion of this laboratory course, the
students will be able to:
 Demonstrate the truth table of various expressions and
combinational circuits using logic gates.
 Design, test and evaluate various combinational circuits such
as adders, subtractors, comparators, multiplexers and
demultiplexers.
 Construct flips-flops, counters and shift registers.
 Simulate Full adder/Subtractor and Counters using VHDL.
 All laboratory experiments are to be included for practical
examination.
 Strictly follow the instructions as printed on the cover page of
answer script for breakup of marks.
 Change of experiment is allowed only once and 15% Marks
allotted to the procedure part to be made zero.
NOTE:
For experiment 11 and 12 any open source or licensed simulation tool
may be used.
Fourth Semester Syllabus
B.E., IV Semester, Electronics & Communication/
ANALOG CIRCUITS
SEMESTER – IV (EC/TC)

Number of Lecture
3+2 (Tutorial) SEE Marks 60
Hours/Week
Total Number of
50 (10 Hours/Module) Exam Hours 03
Lecture Hours
CREDITS – 04
Course objectives: This course will enable students to:
• Explain various BJT parameters, connections and configurations.

• Design and demonstrate the diode circuits and transistor amplifiers.
• Explain various types of FET biasing, and demonstrate the use of FET amplifiers.
• Construct frequency response of FET amplifiers at various frequencies.
• Analyze Power amplifier circuits in different modes of operation.
• Construct Feedback and Oscillator circuits using FET.
Module -1 RBT Level
BJT Biasing: Biasing in BJT amplifier circuits: The Classical Discrete L1, L2,L3
circuit bias, Collector to base feedback resistor, constant current source,
Small signal operation and Modeling: Collector current and
transconductance, Base current and input resistance, Emitter current
and input resistance, voltage gain, DC quantities, The hybrid Π model.
MOSFETs: Biasing in MOS amplifier circuits: Fixing VGS, Fixing VG,

Drain to Gate feedback resistor, Constant current source.
Small signal operation and modeling: The DC bias point, signal

current in drain, voltage gain, small signal equivalent circuit models,
transconductance, Hybrid Π model.[Text 1]
Module -2
MOSFET Amplifier configuration: Basic configurations, characterizing L1, L2, L3

amplifiers, CS amplifier with and without source resistance RS, CG
amplifier, Source follower and comparisons.
MOSFET internal capacitances and High frequency model: The gate

capacitive effect, Junction capacitances, High frequency model, Unity
gain frequency
Frequency response of the CS amplifier: The three frequency bands,

high frequency response, Low frequency response. [Text 1]
Module -3
Feedback Amplifier: General feedback structure, Properties of negative L1, L2, L3

feedback, Basic feedback topologies, The series-shunt, series-series,
shunt-shunt and shunt-series amplifiers (Qualitative analysis).
Power Amplifiers: Introduction, Classification, Class A operation,

Transfer Characteristics, Signal Waveforms, Power Dissipation, Power
Conversion efficiency, Transformer Coupled Power Amplifiers, Class B
transformer coupled amplifier, Class B output stage, Transfer
Characteristics, Power Dissipation, Power Conversion efficiency, Class AB
– Operation, Output Resistance, Class C tuned Amplifier.
Oscillators: FET based Phase shift oscillator, LC and Crystal Oscillators
[Text 1]
Module -4
Op-Amp with Negative Feedback and general applications L1,L2, L3

Inverting and Non inverting Amplifiers – Closed Loop voltage gain, Input
impedance, Output impedance, Bandwidth, Total output offset voltage
with feedback. DC and AC Amplifiers, Summing, Scaling and Averaging
Amplifiers, Instrumentation amplifier, Comparators, Zero Crossing
Detector, Schmitt trigger. [Text 2]
Module -5
Op-Amp Circuits: DAC - Weighted resistor and R-2R ladder, ADC- L1, L2, L3
Successive approximation type, Peak detector, Sample and hold circuit,
Precision rectifiers-half and full wave. First and second order low-pass
and high-pass Butterworth filters, Band-pass filters, Band reject filters
and All-pass filters. Square and Triangular Wave Generators. Voltage
Controlled Oscillator.
555 Timer applications: Monostable and Astable Multivibrators. [Text 2]
Course Outcomes:
 At the end of this course students will demonstrate the ability to
 Understand the characteristics of BJTs and FETs.
 Design and analyze BJT and FET amplifier circuits.
 Design sinusoidal and non-sinusoidal oscillators.
 Understand the functioning of linear ICs and design of Linear IC based
circuits
 Examination will be conducted for 100 marks with question paper containing 10
full questions, each of 20 marks.
module.
module.
Text Book:
1. Microelectronic Circuits, Theory and Applications, Adel S Sedra, Kenneth C

Smith, 6th Edition, Oxford, 2015.ISBN:978-0-19-808913-1
2. Op-Amps and Linear Integrated Circuits, Ramakant A Gayakwad, 4th Edition.
Pearson Education, 2000. ISBN: 8120320581.
Reference Books:
1. Electronic Devices and Circuit Theory, Robert L Boylestad and Louis Nashelsky,
11th Edition, Pearson Education, 2013, ISBN: 978-93-325-4260-0.
2. Fundamentals of Microelectronics, Behzad Razavi, 2nd Edition, John Weily, 2015,
ISBN 978-81-265-7135-2
3. J.Millman & C.C.Halkias―Integrated Electronics, 2nd edition, 2010, TMH. ISBN 0-
07-462245-5.
Principles of Communication Systems

Hours/Week
Lecture Hours
Credits: 03
 Understand the concepts of AM, FM, Low pass sampling and Quantization as a
random process.
 Analyse and mathematically model AM, FM, white noise and the process of
sampling, quantization, and encoding.
 Compute the crucial performance parameter SNR in the presence of AWGN.
 Associate the concepts of AM, FM in thematic examples. Associate sampling and
quantization to thematic examples such as Vocoders.
MODULE-1 RBL
Amplitude Modulation: Introduction, Amplitude Modulation: Time & L1, L2, L3
Frequency Domain description, Switching modulator, Envelop detector.
Double Side Band-Suppressed Carrier Modulation: Time and
Frequency Domain description, Ring modulator, Coherent detection,
Costas Receiver, Quadrature Carrier Multiplexing.
Single Side–Band And Vestigial Sideband Methods Of Modulation:
SSB Modulation, VSB Modulation, Frequency Translation, Frequency-
Division Multiplexing,
Theme Example: VSB Transmission of Analog and Digital Television.
(Chapter 3 of Text).
MODULE-2
Angle Modulation: Basic definitions, Frequency Modulation: Narrow L1, L2, L3
Band FM, Wide Band FM, Transmission bandwidth of FM Signals,
Generation of FM Signals, Demodulation of FM Signals, FM Stereo
Multiplexing,
Phase–Locked Loop: Nonlinear model of PLL, Linear model of PLL,
Nonlinear Effects in FM Systems. The Superheterodyne Receiver (refer
Chapter 4 of Text).
MODULE-3
Noise: Review of Random Processes, Mean, Correlation and L1, L2, L3
Covariance function, Properties of autocorrelation and, Cross–
correlation functions. Shot Noise, Thermal noise, White Noise, Noise
Equivalent Bandwidth (refer Chapter 5 of Text), Noise Figure (refer
Section 6.7 of Text).
Noise In Analog Modulation: Introduction, Receiver Model, Noise in
DSB-SC receivers.
MODULE-4
Noise In Analog Modulation (Contd): Noise in AM receivers, L1, L2, L3
Threshold effect, Noise in FM receivers, Capture effect, FM threshold
effect, FM threshold reduction, Pre-emphasis and De-emphasis in FM
(refer Chapter 6 of Text).
Sampling And Quantization: Introduction, Why Digitize Analog
Sources?, The Low pass Sampling process Pulse Amplitude
Modulation.
MODULE-5
Sampling And Quantization: Time Division Multiplexing, Pulse- L1, L2, L3
Position Modulation, Generation of PPM Waves, Detection of PPM
Waves. The Quantization Random Process, Quantization Noise,
Pulse–Code Modulation: Sampling, Quantization, Encoding,
Regeneration, Decoding, Filtering, Multiplexing (refer Chapter 7 of
Text), Application to Vocoder (refer Section 6.8 of Reference Book 1).
Course Outcomes: After completing the course, the students will be able to
 Associate and apply the concepts of Lowpass sampling, reconstruction to Digital
transmitters and receivers used in cellular and other communication devices
 Analyze and compute performance of FM modulation and digital formatting.
 Test and validate digital formatting schemes with quantization noise under noisy
channel conditions to estimate the performance in practical communication
systems.
 Design/Demonstrate by way of simulation or emulation the functional blocks of
digital formatting.
module.
module.
Text Book
“Communication Systems”, Simon Haykins & Moher, 5th Edition, John Willey,
India Pvt. Ltd, 2010, ISBN 978 – 81 – 265 – 2151 – 7.
Reference Books
1. Modern Digital and Analog Communication Systems, B. P. Lathi, Oxford
University Press., 4th edition.
2. An Introduction to Analog and Digital Communication, Simon Haykins, John
Wiley India Pvt. Ltd., 2008, ISBN 978–81–265–3653–5.
3. Principles of Communication Systems, H.Taub & D.L.Schilling, TMH, 2011.
4. Communication Systems, Harold P.E, Stern Samy and A.Mahmond, Pearson
Edition, 2004.
Verilog HDL
[As per Choice Based credit System (CBCS) Scheme]

Subject Code 18EC44 CIE 40
Marks
Number of Lecture Exam
Hours/Week 03 60
Marks
Total Number of Exam
Lecture Hours 40 (08 Hours per Module) 03
Hours
CREDITS – 03
 Learn different Verilog HDL constructs.

 Familiarize the different levels of abstraction in Verilog.
 Understand Verilog Tasks, Functions and Directives.
 Understand timing and delay Simulation.
Module 1
Overview of Digital Design with Verilog HDL: Evolution of CAD, emergence of
HDLs, typical HDL-flow, why Verilog HDL?, trends in HDLs.
Hierarchical Modeling Concepts: Top-down and bottom-up design methodology,

differences between modules and module instances, parts of a simulation, design
block, stimulus block.
Module 2
Basic Concepts: Lexical conventions, data types, system tasks, compiler directives.
Modules and Ports: Module definition, port declaration, connecting ports,

hierarchical name referencing.
Module 3
Gate-Level Modeling: Modeling using basic Verilog gate primitives, description of
and/or and buf/not type gates, rise, fall and turn-off delays, min, max, and typical
delays.
Dataflow Modeling: Continuous assignments, delay specification, expressions,

operators, operands, operator types.
Module 4
Behavioral Modeling: Structured procedures, initial and always, blocking and non-
blocking statements, delay control, generate statement, event control, conditional
statements, Multiway branching, loops, sequential and parallel blocks.
Module 5
Tasks and Functions: Differences between tasks and functions, declaration,
invocation, automatic tasks and functions.
Useful Modeling Techniques: Procedural continuous assignments, overriding
parameters, conditional compilation and execution, useful system tasks.
Course Outcomes: At the end of this course, students should be able to
 Write Verilog programs in gate, dataflow (RTL), behavioral and switch modeling
levels of Abstraction.
 Design and verify the functionality of digital circuit/system using test benches.
 Identify the suitable Abstraction level for a particular digital design.
 Write the programs more effectively using Verilog tasks, functions and directives.
 Perform timing and delay Simulation.
module.
each module.
Text Book:
1. Samir Palnitkar, “Verilog HDL: A Guide to Digital Design and Synthesis”,

Pearson Education, Second Edition.
Reference Books:
1. Donald E. Thomas, Philip R. Moorby, “The Verilog Hardware Description

Language”, Springer Science+Business Media, LLC, Fifth edition.
2. Michael D. Ciletti, “Advanced Digital Design with the Verilog HDL” Pearson
(Prentice Hall), Second edition.
3. Padmanabhan, Tripura Sundari, “Design through Verilog HDL”, Wiley, 2016 or
earlier.
Reference Books:
1. Donald E. Thomas, Philip R. Moorby, ―The Verilog Hardware Description
Language‖, Springer Science+Business Media, LLC, Fifth edition.
2. Michael D. Ciletti, ―Advanced Digital Design with the Verilog HDL‖ Pearson
(Prentice Hall), Second edition.
3. Padmanabhan, Tripura Sundari, ―Design through Verilog HDL‖, Wiley, 2016 or
earlier.
SIGNALS AND SYSTEMS
[As per Choice Based Credit System (CBCS)

Subject Code scheme]
18EC45 CIE Marks 40
Hours/Week
Total Number of 40 (8 Hours per Module) Exam Hours 03
Lecture Hours
CREDITS – 03
 Understand the mathematical description of continuous and discrete time signals
and systems.
 Analyze the signals in time domain using convolution difference/differential
equations
 Classify signals into different categories based on their properties.
 Analyze Linear Time Invariant (LTI) systems in time and transform domains.
Modules-1 RBT Level
Introduction and Classification of signals: Definition of signal and

systems, communication and control systems as examples.
Classification of signals.
L1, L2, L3
Basic Operations on signals: Amplitude scaling, addition,
multiplication, differentiation, integration, time scaling, time shift and
time reversal.
Elementary signals/Functions: Exponential, sinusoidal, step,
impulse and ramp functions. Expression of triangular, rectangular
and other waveforms interms of elementary signals.
Module -2
System Classification and properties: Linear-nonlinear, Time L1, L2, L3
variant-invariant, causal-noncausal, static-dynamic, stable-unstable,
invertible.
Time domain representation of LTI System: Impulse response,
convolution sum, convolution integral. Computation of convolution
sum and convolution integral using graphical method for unit step and
unit step, unit step and exponential, exponential and exponential, unit
step and rectangular, and rectangular and rectangular.
LTI system Properties interms of impulse response: System
interconnection, Memoryless, Causal, Stable, Invertible and
Deconvolution, and step response.
Module-3
Module -3
L1, L2, L3
Differential & Difference Equation representation of LTI systems:
Solution for Differential & Difference equations.
Fourier Representation of Periodic Signals: Orthogonality of
complex sinusoids, CTFS properties and basic problems.
Module -4
L1, L2, L3
Fourier Representation of aperiodic Signals: Introduction to Fourier
Transform & DTFT, Definition and basic problems.
Properties of Fourier Transform: Periodicity, Linearity, Symmetry,
Time shift, Frequency shift, Scaling, Differentiation and Integration,
Convolution and Modulation, Parsevals relationships and Duality.
Module -5
The Z-Transforms : Z transforms, properties of the region of L1, L2, L3
convergence, properties of the Z-transform, Inverse Z-transform,
Causality and stability, Transform analysis of LTI systems,
Computational structures of discrete time systems, The unilateral Z-
transforms.
Course Outcomes: At the end of the course, students will be able to:
 Analyze the different types of signals and systems.
 Determine the linearity, causality, time-invariance and stability properties of
continuous and discrete time systems.
 Represent continuous and discrete systems in time and frequency domain using
different transforms
 Test whether the system is stable.
module.
module.
Text Book:
1. Simon Haykins and Barry Van Veen, “Signals and Systems”, 2nd
Edition, 2008, WileyIndia. ISBN 9971-51-239-4.
Reference Books:
1. Michael Roberts, “Fundamentals of Signals & Systems”, 2nd edition,

Tata McGraw-Hill, 2010, ISBN 978-0-07-070221-9.
2. Alan V Oppenheim, Alan S, Willsky and A Hamid Nawab, “Signals and
Systems” Pearson Education Asia / PHI, 2nd edition, 1997. Indian
Reprint 2002.
3. H. P Hsu, R. Ranjan, “Signals and Systems”, Scham’s outlines, TMH,
2006.
4. B. P. Lathi, “Linear Systems and Signals”, Oxford University Press, 2005.
5. Ganesh Rao and Satish Tunga, “Signals and Systems”, Pearson/Sanguine
Technical Publishers, 2004.
Computer Organization and Architecture
SEMESTER-IV (EC/TC)

Number of Lecture 03 SEE 60
Hours/Week Marks
Total Number of 40 (08 Hours per Module) Exam 03

Lecture Hours Hours
CREDITS – 03
Module-1
Basic Structure of Computers: Computer Types, Functional Units, Basic
Operational Concepts, Bus Structures, Software, Performance – Processor Clock,
Basic Performance Equation (upto 1.6.2 of Chap 1 of Text).
Machine Instructions and Programs: Numbers, Arithmetic Operations and

Characters, IEEE standard for Floating point Numbers, Memory Location and
Addresses, Memory Operations, Instructions and Instruction Sequencing, (upto 2.4.6
of Chap 2 and 6.7.1 of Chap 6 of Text).
Module-2
Addressing Modes, Assembly Language, Basic Input and Output Operations, Stacks
and Queues, Subroutines, Additional Instructions (from 2.4.7 of Chap 2, except 2.9.3,
2.11 & 2.12 of text).
Module-3
Input/Output Organization: Accessing I/O Devices, Interrupts – Interrupt Hardware,
Enabling and Disabling Interrupts, Handling Multiple Devices, Controlling Device
Requests, Direct Memory Access, (upto 4.2.4 and 4.4 except 4.4.1 of Chap 4 of text).
Module-4
Memory System: Basic Concepts, Semiconductor RAM Memories-Internal
organization of memory chips, Static memories, Asynchronous DRAMS, Read Only
Memories, Cash Memories, Virtual Memories, Secondary Storage-Magnetic Hard Disks
(5.1, 5.2, 5.2.1, 5.2.2, 5.2.3, 5.3, 5.5 (except 5.5.1 to 5.5.4), 5.7 (except 5.7.1), 5.9,
5.9.1 of Chap 5 of Text).
Module-5
Basic Processing Unit: Some Fundamental Concepts, Execution of a Complete
Instruction, Multiple Bus Organization, Hardwired Control, Microprogrammed Control
(upto 7.5 except 7.5.1 to 7.5.6 of Chap 7 of Text).
 There will be 2 full questions from each module covering all the topics of the module.
module.
Text Book:
Carl Hamacher, Zvonko Vranesic, Safwat Zaky: Computer Organization, 5th

Edition, Tata McGraw Hill, 2002.
Reference Books:
1. David A. Patterson, John L. Hennessy: Computer Organization and Design – The

Hardware / Software Interface ARM Edition, 4th Edition, Elsevier, 2009.
2. William Stallings: Computer Organization & Architecture, 7th Edition, PHI, 2006.
3. Vincent P. Heuring & Harry F. Jordan: Computer Systems Design and
Architecture, 2nd Edition, Pearson Education, 2004.
ANALOG CIRCUITS AND COMMUNICATION LABORATORY

Laboratory 18ECL47 CIE 40
Code Marks
Number of 02Hr Tutorial (Instructions) SEE Marks 60
Lecture + 02 Hours Laboratory
Hours/Week
RBT Level L1, L2, L3 Exam Hours 03
CREDITS – 02
Course objectives: This laboratory course enables students to
Understand the circuit configurations and connectivity of BJT and FET

Amplifiers and Study of frequency response
 Design and test of analog circuits using OPAMPs
 Design and test the communication circuits for different analog modulation
schemes.
 Understand the sampling and reconstruction using simple circuits
NOTE: The experiments are to be carried using discrete components only.
Laboratory Experiments:
1. Design and setup the Common Source JFET/MOSFET amplifier and plot the
frequency response.
2. Design and set up the BJT common emitter amplifier using voltage divider bias with
and without feedback and determine the gain- bandwidth product from its
frequency response.
3. Design and set-up i) Colpits Oscillator ii)Hartley Oscillator and iii)Crystal Oscillator
4. Design active second order Butterworth low pass and high pass filters.
5. Design Adder, Integrator and Differentiator circuits using Op-Amp
6. Test a comparator circuit and design a Schmitt trigger for the given UTP and LTP
values and obtain the hysteresis.
7. Design 4 bit R – 2R Op-Amp Digital to Analog Converter (i) using 4 bit binary input
from toggle switches and (ii) by generating digital inputs using mod-16 counter.
8. Design a circuit using LM741 and LF398 to generate Amplitude modulation and
DSBSC signal.
9. Design of Monostable and Astable Multivibrator using 555 Timer.
10. Frequency modulation using IC 8038/2206 and demodulation
11. BJT/FET Mixer
12. Pulse sampling, flat top sampling and reconstruction
Course Outcomes: On the completion of this laboratory course, the students will be
able to:

Design of analog circuits using BJTs and FETs and evaluate their performance
characteristics.
 Design of analog circuits using OPAMPs for different applications
 Understand the use of transistor in the design of continuous or pulse
modulation schemes.
 Understand the use of ICs in circuit designs for AM and FM modulation and
demodulation
 All laboratory experiments are to be included for practical examination.

breakup of marks.
Reference Book:
1. K. A. Navas, “Electronics Lab Manual”, Volume I, PHI, 5th Edition, 2015,

ISBN:9788120351424.
HDL LAB

Course Code 18ECL48 CIE Marks 40
Number of Lecture 01 Hr Tutorial (Instructions) SEE Marks 60
Hours/Week + 02 Hours Laboratory = 03
RBT Levels L1, L2, L3 Exam Hours 03
CREDITS – 02
 Familiarize with the CAD tool to write HDL programs.
 Understand simulation and synthesis of digital design.
 Program FPGAs/CPLDs to synthesize the digital designs.
 Interface hardware to programmable ICs through I/O ports.
 Choose either Verilog or VHDL for a given Abstraction level.
Note: Programming can be done using any compiler. Download the programs on a
FPGA/CPLD boards such as Apex/Acex/Max/Spartan/Sinfi or equivalent and
performance testing may be done using 32 channel pattern generator and logic
analyzer apart from verification by simulation with tools such as Altera/Modelsim or
equivalent.
Part–A: PROGRAMMING
1. Write Verilog code to realize all the logic gates
2. Write a Verilog program for the following combinational designs
a. 2 to 4 decoder
b. 8 to 3 (encoder without priority & with priority)
c. 8 to 1 multiplexer.
d. 4 bit binary to gray converter
e. Multiplexer, de-multiplexer, comparator.
3. Write a VHDL and Verilog code to describe the functions of a Full Adder using
three modeling styles.
4. Write a Verilog code to model 32 bit ALU using the schematic diagram shown
below
 ALU should use combinational logic to calculate an output based on the four bit
op-code input.
 ALU should pass the result to the out bus when enable line in high, and tri-state
the out bus when the enable line is low.
 ALU should decode the 4 bit op-code according to the example given below.
OPCODE ALU Operation
1. A+B
2. A-B
3. A Complement
4. A*B
5. A AND B
6. A OR B
7. A NAND B
8. A XOR B
5. Develop the Verilog code for the following flip-flops, SR, D, JK and T.
6. Design a 4 bit binary, BCD counters (Synchronous reset and Asynchronous
reset) and “any sequence” counters, using Verilog code.
Part–B: INTERFACING (at least four of the following must be covered using
VHDL/Verilog)
1. Write HDL code to display messages on an alpha numeric LCD display.

2. Write HDL code to interface Hex key pad and display the key code on seven
segment display.
3. Write HDL code to control speed, direction of DC and Stepper motor.
4. Write HDL code to accept Analog signal, Temperature sensor and display the
data on LCD or Seven segment display.
5. Write HDL code to generate different waveforms (Sine, Square, Triangle, Ramp
etc.,) using DAC - change the frequency.
6. Write HDL code to simulate Elevator operation.
Course Outcomes: At the end of this course, students should be able to:
 Write the Verilog/VHDL programs to simulate Combinational circuits in
Dataflow, Behavioral and Gate level Abstractions.
 Describe sequential circuits like flip flops and counters in Behavioral description
and obtain simulation waveforms.
 Synthesize Combinational and Sequential circuits on programmable ICs and test
the hardware.
 Interface the hardware to the programmable chips and obtain the required
output.
1. All laboratory experiments are to be included for practical examination.
2. Strictly follow the instructions as printed on the cover page of answer script
for breakup of marks.
3. Change of experiment is allowed only once and Marks allotted to the
procedure part to be made zero.
BE 2018 Fifth Semester Syllabus
BE E&C/TCE Engineering
TECHNOLOGICAL INNOVATION MANAGEMENT AND ENTREPRENEURSHIP
B.E., V Semester, EC/TC/EI/BM/ML
Course Code 15ES51 CIE Marks 40
Hours/Week
CREDITS – 04
 Understand basic skills of Management
 Understand the need for Entrepreneurs and their skills
 Understand Project identification and Selection
 Identify the Management functions and Social responsibilities
 Distinguish between management and administration
Module-1
Management: Nature and Functions of Management – Importance, Definition, Management Functions,
Levels of Management, Roles of Manager, Managerial Skills, Management & Administration,
Management as a Science, Art & Profession (Selected topics of Chapter 1, Text 1).
Planning: Planning-Nature, Importance, Types, Steps and Limitations of Planning; Decision Making –
Meaning, Types and Steps in Decision Making(Selected topics from Chapters 4 & 5, Text 1). L1, L2
Module-2
Organizing and Staffing: Organization-Meaning, Characteristics, Process of Organizing, Principles of
Organizing, Span of Management (meaning and importance only), Departmentalisation, Committees–
Meaning, Types of Committees; Centralization Vs Decentralization of Authority and Responsibility;
Staffing-Need and Importance, Recruitment and Selection Process (Selected topics from Chapters 7, 8 &
11,Text 1).
Directing and Controlling: Meaning and Requirements of Effective Direction, Giving
Orders; Motivation-Nature of Motivation, Motivation Theories (Maslow’s Need-
Hierarchy Theory and Herzberg’s Two Factor Theory); Communication – Meaning,
Importance and Purposes of Communication; Leadership-Meaning, Characteristics,
Behavioural Approach of Leadership; Coordination-Meaning, Types, Techniques of
Coordination; Controlling – Meaning, Need for Control System, Benefits of Control,
Essentials of Effective Control System, Steps in Control Process (Selected topics from
Chapters 15 to 18 and 9, Text 1). L1, L2
Module-3
Social Responsibilities of Business: Meaning of Social Responsibility, Social
Responsibilities of Business towards Different Groups, Social Audit, Business Ethics
and Corporate Governance (Selected topics from Chapter 3, Text 1).
Entrepreneurship: Definition of Entrepreneur, Importance of Entrepreneurship,
concepts of Entrepreneurship, Characteristics of successful Entrepreneur,
Classification of Entrepreneurs, Myths of Entrepreneurship, Entrepreneurial
Development models, Entrepreneurial development cycle, Problems faced by
Entrepreneurs and capacity building for Entrepreneurship (Selected topics from
Chapter 2, Text 2). L1, L2
Module-4
Modern Small Business Enterprises: Role of Small Scale Industries, Impact of Globalization and WTO
on SSIs, Concepts and definitions of SSI Enterprises, Government policy and development of the Small
Scale sector in India, Policies & Schemes of Central Level Institutions, State Level Institutions (Selected
topics from Chapter 4, Text 2). L1, L2
Idea Generation and Feasibility Analysis- Idea Generation; Creativity and Innovation;
Identification of Business Opportunities; Market Entry Strategies; Marketing
Feasibility; Financial Feasibilities; Political Feasibilities; Economic Feasibility; Social
and Legal Feasibilities; Technical Feasibilities; Managerial Feasibility, Location and
Other Utilities Feasibilities. (Selected topics from Chapter 7, Text 2)
Module-5
Business model – Meaning, designing, analyzing and improvising; Business Plan – Meaning, Scope and
Need; Financial, Marketing, Human Resource and Production/Service Plan; Business plan Formats;
Project report preparation and presentation; Why some Business Plan fails? (Selected topics from Chapter
8, Text 2)
Financing and How to start a Business? Financial opportunity identification; Banking sources;
Nonbanking Institutions and Agencies; Venture Capital – Meaning and Role in Entrepreneurship;
Government Schemes for funding business; Pre launch, Launch and Post launch requirements; Procedure
for getting License and Registration; Challenges and Difficulties in Starting an Enterprise(Selected topics
from Chapter 7, Text 2)
Project Design and Network Analysis: Introduction, Importance of Network Analysis,

Origin of PERT and CPM, Network, Network Techniques, Need for Network Techniques,
Steps in PERT, CPM, Advantages, Limitations and Differences.
(Selected topics from Chapters 16 to 20 of Unit 3, Text 3). L1, L2, L3
Course Outcomes: After studying this course, students will be able to:
 Understand the fundamental concepts of Management and Entrepreneurship
 Select a best Entrepreneurship model for the required domain of establishment
 Describe the functions of Managers, Entrepreneurs and their social responsibilities
 Compare various types of Entrepreneurs
 Analyze the Institutional support by various state and central government agencies
Text Books:
1. Principles of Management – P.C Tripathi, P.N Reddy, McGraw Hill Education, 6th Edition, 2017.
ISBN-13:978-93-5260-535-4.
2. Entrepreneurship Development Small Business Enterprises- Poornima M
Charantimath, Pearson Education 2008, ISBN 978-81-7758-260-4.
3. Dynamics of Entrepreneurial Development and Management by Vasant Desai. HPH 2007, ISBN:
978-81-8488-801-2.
Reference Book:
1. Essentials of Management: An International, Innovation and Leadership perspective by Harold
Koontz, Heinz Weihrich McGraw Hill Education, 10th Edition 2016. ISBN- 978-93-392-2286-
2. Robert D. Hisrich, Mathew J. Manimala, Michael P Peters and Dean A. Shepherd,

“Entrepreneurship”, 8th Edition, Tata Mc-graw Hill Publishing Co.ltd.-new Delhi, 2012.
ELECTROMAGNETIC WAVES
V SEMESTER – (EC/TC)


Hours/Week
Total Number of 50 (10 Hours per Exam Hours 03
CREDITS – 03
 Study the different coordinate systems, Physical signifiance of Divergence,

Curl and Gradient.
 Understand the applications of Coulomb‘s law and Gauss law to different

charge distributions and the applications of Laplace‘s and Poisson‘s
Equations to solve real time problems on capacitance of different charge
distributions.
 Understand the physical significance of Biot-Savart‘s, Amperes‘s Law and

Stokes‘theorem for different current distributions.
 Infer the effects of magnetic forces, materials and inductance.
 Know the physical interpretation of Maxwell‘ equations and applications for

Plane waves fortheir behavior in different media
 Acquire knowledge of Poynting theorem and its application of power flow.
RBT
Module-1
Level
Revision of Vector Calculus – (Text 1: Chapter 1) L1,L2,L3
Coulomb’s Law, Electric Field Intensity and Flux density
Experimental law of Coulomb, Electric field intensity, Field due to continuous

volume charge distribution, Field of a line charge, Field due to Sheet of
charge, Electric flux density, Numerical Problems. (Text 1: Chapter 2.1 to
2.5, 3.1)
Module-2
Gauss’s law and Divergence L1,L2,L3
Gauss‘ law, Application of Gauss’ law to symmetric charge and differential

volume element, Divergence. Maxwell‘s First equation (Electrostatics), Vector
Operator ▼ and divergence theorem, Numerical Problems (Text 1: Chapter
3.2 to 3.7).
Energy, Potential and Conductors
Energy expended or work done in moving a point charge in an electric field,

The line integral, Definition of potential difference and potential, The potential
field of point charge, Potential gradient, Numerical Problems (Text 1:
Chapter 4.1 to 4.4 and 4.6).
Current and Current density, Continuity of current.(Text 1: Chapter 5.1,

5.2).
Module – 3
Poisson’s and Laplace’s Equations L1,L2,L3
Derivation of Poisson‘s and Laplace‘s Equations, Uniqueness theorem,

Examples of the solution of Laplace‘s equation, Numerical problems on
Laplace equation (Text 1: Chapter 7.1 to 7.3)
Steady Magnetic Field
Biot-Savart Law, Ampere‘s circuital law, Curl, Stokes‘ theorem, Magnetic flux
and magnetic flux density, Scalar and Vector Magnetic Potentials, Numerical
problems (Text 1: Chapter 8.1 to 8.6)
Module-4
Magnetic Forces L1,L2,L3

Force on a moving charge, differential current elements, Force between
differential current elements, Numerical problems (Text 1: Chapter 9.1 to
9.3).
Magnetic Materials
Magnetization and permeability, Magnetic boundary conditions, Magnetic
circuit, Potential Energy and forces on magnetic materials, Numerical
problems (Text 1: Chapter 9.6 to 9.3).
Faraday’ law of Electromagnetic Induction –Integral form and Point

form, Numerical problems (Text 1: Chapter 10.1)
Module-5
Maxwell’s equations L1,L2,L3

Continuity equation, Inconsistency of Amperes’s law with continuity
equation, displacement current, Conduction current, Derivation of
Maxwell‘s equations in point form, and integral form, Maxwell’s equations
for different media, Numerical problems (Text 1: Chapter 10.2 to 10.4)
Uniform Plane Wave
Plane wave, Uniform plane wave, Derivation of plane wave equations from
Maxwell’s equations, Solution of wave equation for perfect dielectric, Relation
between E and H, Wave propagation in free space, Solution of wave equation
for sinusoidal excitation, wave propagation any conducting media (γ, α, β,η)
and good conductors, Skin effect or Depth of penetration, Poynting‘s theorem
and wave power, Numerical problems.(Reference 1: Chapter 5.01 to 5.06
or Text 1: Chapter 12.1 to 12.4)
 Evaluate problems on electrostatic force, electric field due to point,
linear, volume charges by applying conventional methods and
charge in a volume.
 Apply Gauss law to evaluate Electric fields due to different charge
distributions and Volume Charge distribution by using Divergence
Theorem.
 Determine potential and energy with respect to point charge
and capacitance using Laplace equation and Apply Biot-Savart’s
and Ampere’s laws for evaluating Magnetic field for different
current configurations
 Calculate magnetic force, potential energy and Magnetization with
respect to magnetic materials and voltage induced in electric
circuits.
 Apply Maxwell’s equations for time varying fields, EM waves in free
space and conductors and Evaluate power associated with EM
waves using Poynting theorem
module.
module.
Text Books:
1. W.H. Hayt and J.A. Buck, ―Engineering Electromagnetics‖, 8th Edition,
Tata McGraw-Hill, 2014, ISBN-978-93-392-0327-6.
Reference Book:
1. Electromagnetic Waves and Radiating systems – E. C. Jordan and K.G. Balman,
PHI, 2ndEdn.
2. Electromagnetics- Joseph Edminister, Schaum Outline Series, McGraw Hill.
3. N. Narayana Rao, ―Fundamentals of Electromagnetics for Engineering‖, Pearson.
DIGITAL SIGNAL PROCESSING

Number of Lecture 3+2 (Tutorial) SEE Marks 60
Hours/Week
Lecture Hours
CREDITS – 04
Course objectives: This course will enable students to
 Understand the frequency domain sampling and reconstruction of discrete time
signals.
 Study the properties and the development of efficient algorithms for the computation
of DFT.
 Realization of FIR and IIR filters in different structural forms.
 Learn the procedures to design of IIR filters from the analog filters using impulse
invariance and bilinear transformation.
 Study the different windows used in the design of FIR filters and design appropriate
filters based on the specifications.
 Understand the architecture and working of DSP processor
Modules
Module-1 RBT Level
Discrete Fourier Transforms (DFT): Frequency domain sampling and L1, L2
reconstruction of discrete time signals. DFT as a linear transformation,
Properties of DFT, multiplication of two DFTs- the circular convolution,
Additional DFT properties. [Text 1]
Module-2 L1, L2, L3
Use of DFT in linear filtering: Overlap-save and Overlap-add method.
Fast-Fourier-Transform (FFT) algorithms: Radix-2 FFT algorithm for the
computation of DFT and IDFT–decimation-in-time and decimation-in-
frequency algorithms. [Text 1]
Module-3 L1, L2, L3
Design of FIR Filters: Characteristics of practical frequency –selective filters,
Symmetric and Antisymmetric FIR filters, Design of Linear-phase FIR filters
using windows - Rectangular, Hamming, Hanning, Bartlett and Kaiser
windows. Design of FIR filters using frequency sampling technique. Structure
for FIR Systems: Direct form, Cascade form and Lattice structures.
[Text1]
Module-4 L1, L2, L3
IIR Filter Design: Infinite Impulse response Filter Format, Bilinear
Transformation Design Method, Analog Filters using Low pass prototype
transformation, Normalized Butterworth Functions, Bilinear Transformation
and Frequency Warping, Bilinear Transformation Design Procedure, Digital
Butterworth Filter Design using BLT. Realization of IIR Filters in Direct form I
and II, Higher order IIR Filter Design using cascade method.[Text 2]
Module-5 L1, L2, L3
Digital Signal Processors: DSP Architecture, DSP Hardware Units, Fixed
point format, Floating point Format, IEEE Floating point formats, Fixed point
digital signal processors, Floating point processors, FIR and IIR filter
implementations in Fixed point systems.
[Text 2]
 Determine response of LTI systems using time domain and DFT techniques.
 Compute DFT of real and complex discrete time signals.
 Computation of DFT using FFT algorithms and linear filtering approach.
 Design and realize FIR and IIR digital filters
 Understand the DSP processor architecture.

module.
Text Book:
1. Proakis & Monalakis, “Digital signal processing – Principles Algorithms &
Applications”, 4th Edition, Pearson education, New Delhi, 2007. ISBN: 81-317-
1000-9
2. Li Tan “Digital Signal processing – Fundamentals and Applications”, Academic
Press, 2008, ISBN: 978-0-12-374090-8.
Reference Books:
1. Sanjit K Mitra, “Digital Signal Processing, A Computer Based Approach”, 4th Edition,
Mc Graw Hill Education, 2013,
2. Oppenheim & Schaffer, “Discrete Time Signal Processing”, PHI, 2003.
3. D.Ganesh Rao and Vineeth P Gejji, “Digital Signal Processing” Cengage India Private
Limited, 2017, ISBN: 9386858231
INFORMATION THEORY AND CODING

Hours/Week
Lecture Hours
CREDITS – 04
Modules
Module-1
Information Theory: Introduction, Measure of information, Information content of
message, Average Information content of symbols in Long Independent sequences,
Average Information content of symbols in Long dependent sequences, Markov
Statistical Model for Information Sources, Entropy and Information rate of Markoff
Sources (Section 4.1, 4.2 of Text 1)
Module-2
Source Coding: Encoding of the Source Output, Shannon’s Encoding
Algorithm(Sections 4.3, 4.3.1 of Text 1), Shannon Fano Encoding Algorithm (Section
2.15 of Reference book 4)
Source coding theorem, Prefix Codes, Kraft McMillan Inequality property – KMI,
Huffman codes (Section 2.2 of Text 2)
Module-3
Information Channels: Communication Channels, Discrete Communication channels
Channel Matrix, Joint probabilty Matrix, Binary Symmetric Channel, System
Entropies. (Section 4.4, 4.5, 4.51,4.5.2 of Text 1)
Mutual Information, Channel Capacity, Channel Capacity of Binary Symmetric
Channel, (Section 2.5, 2.6 of Text 2)
Binary Erasure Channel, Muroga,s Theorem (Section 2.27, 2.28 of Reference book 4)
Module-4
Error Control Coding:
Introduction, Examples of Error control coding, methods of Controlling Errors, Types
of Errors, types of Codes, Linear Block Codes: matrix description of Linear Block
Codes, Error detection & Correction capabilities of Linear Block Codes, Single error
correction Hamming code, Table lookup Decoding using Standard Array.
Binary Cyclic Codes: Algebraic Structure of Cyclic Codes, Encoding using an (n-k) Bit
Shift register, Syndrome Calculation, Error Detection and Correction
(Sections 9.1, 9.2,9.3,9.3.1,9.3.2,9.3.3 of Text 1)
Module-5
Convolution Codes: Convolution Encoder, Time domain approach, Transform domain
approach, Code Tree, Trellis and State Diagram, The Viterbi Algorithm) (Section 8.5 –
Articles 1,2 and 3, 8.6- Article 1 of Text 2)
module.
module.
Text Books:
1. Digital and analog communication systems, K. Sam Shanmugam, John Wiley
India Pvt. Ltd, 1996.
2. Digital communication, Simon Haykin, John Wiley India Pvt. Ltd, 2008.
Reference Books:
1. ITC and Cryptography, Ranjan Bose, TMH, II edition, 2007
2. Principles of digital communication, J. Das, S. K. Mullick, P. K. Chatterjee,
Wiley, 1986 - Technology & Engineering
3. Digital Communications – Fundamentals and Applications, Bernard Sklar,
Second Edition, Pearson Education, 2016, ISBN: 9780134724058.
4. Information Theory and Coding, Hari Bhat, Ganesh Rao, Cengage, 2017.
CONTROL SYSTEMS
SEMESTER – V (EC / TC)
[As per Choice Based Credit System (CBCS) S cheme]

Number of 03 SEE Marks 60
Lecture Hours /
Week
Lecture Hours
CREDITS – 03
 Understand the basic features, configurations and application of control
systems.
 Understand various terminologies and definitions for the control systems.
 Lear n how to find a mathematical model of electrical, mechanical and
electro- mechanical systems.
 Know how to fin d time response from the transfer function.
 Find the transfer function via Mason’s r ule.
 Analyze the s t ability of a system from the transfer function.
Module - 1 RBT Level
Introduction to Control System s: Types of Control System s, Effect of
Feedback System s, Differential equation of Physical Systems – L1 , L2 ,L3
Mechanical Systems, Electrical System s, Analogous Systems.
Module - 2
Block diagrams and sign al flow graphs: Transfer function s, Block
diagram algebra an d Sign al Flow graphs. L1, L2 , L3
Module - 3
Time Response of feedback control systems: Standard test L1 , L2 , L3
signals, Unit step response of First and Second Order Systems.
Time response specifications, Time response specification s of
second order systems. Introduction to PI, PD and PID Controllers
(excluding design).
Module - 4
Stability analysis: Concepts of stability, Necessary conditions for L1, L2, L3
Stability, Routh stability criterion, Relative stability analysis: more
on the Routh stability criterion, Introduction to Root-Locus
Techniques, The root locus concepts, Construction of root loci.
Module - 5
Frequency domain analysis and stability: L1, L2, L3
Correlation between time and frequency response, Bode
Plots, Experimental determination of transfer function.
Introduction to Polar Plots, (Inverse Polar Plots excluded)
Mathematical preliminaries, Nyquist Stability criterion.
Course Outcomes: At the end of the course, the students will be able to
 Develop the mathematical model of mechanical and electrical systems
 Develop transfer function for a given control system using block
diagram reduction techniques and sign al flow graph method
 Deter mine the time domain specification s for first and second order
systems
 Deter mine the stability of a system in the time domain using Routh-
Hurwitz criterion and Root-locus technique.
 Deter mine the stability of a system in the frequency domain u sing
Nyquist and bode plots

module.
module.
Text Book:
1. J. Nagarath an d M. Gopal, “Control System s Engineering”, New Age
International (P) Limited, Publishers, Fifth edition- 2005 , ISBN: 81 –
224- 2008-7.
Reference Books:
1. “Modern Control Engineering,” K. Ogata, Pearson Education Asia / PHI,
4 t h Edition, 2002. ISBN 978 - 81 - 203 - 4010 - 7.
2. “Automatic Control Systems”, Benjamin C. Kuo, John Wiley India Pvt,
Ltd.,8t h Edition, 2008.
3. “Feedback a n d Control System,” Joseph J Distefano III etal., Schaum’s
Outlines, TMH, 2 n d Edition 2007 .
8051 MICROCONTROLLER
B.E., V Semester EC/TC

Hours/Week
Total Number of Lecture 40 (08 Hrs/ Module) Exam Hours 03
Hours
CREDITS – 03
 Understand the difference between a Microprocessor and a Microcontroller and
embedded microcontrollers.
 Familiarize the basic architecture of 8051 microcontroller.
 Program 8051microprocessor using Assembly Level Language and C.
 Understand the interrupt system of 8051 and the use of interrupts.
 Understand the operation and use of inbuilt Timers/Counters and Serial port of
8051.
 Interface 8051 to external memory and I/O devices using its I/O ports.
Module -1
8051 Microcontroller:
Microprocessor Vs Microcontroller, Embedded Systems, Embedded Microcontrollers,
8051 Architecture- Registers, Pin diagram, I/O ports functions, Internal Memory
organization. External Memory (ROM & RAM) interfacing. L1, L2
Module -2
8051 Instruction Set: Addressing Modes, Data Transfer instructions, Arithmetic
instructions, Logical instructions, Branch instructions, Bit manipulation instructions.
Simple Assembly language program examples (without loops) to use these
instructions. L1, L2
Module -3
8051 Stack, I/O Port Interfacing and Programming: 8051 Stack, Stack and
Subroutine instructions. Assembly language program examples on subroutine and
involving loops - Delay subroutine, Factorial of an 8 bit number (result maximum 8
bit), Block move without overlap, Addition of N 8 bit numbers, Picking
smallest/largest of N 8 bit numbers.
Interfacing simple switch and LED to I/O ports to switch on/off LED with respect to
switch status. L1, L2, L3
Module -4
8051 Timers and Serial Port: 8051 Timers and Counters – Operation and Assembly
language programming to generate a pulse using Mode-1 and a square wave using
Mode-2 on a port pin.
8051 Serial Communication- Basics of Serial Data Communication, RS-232 standard,
9 pin RS232 signals, Simple Serial Port programming in Assembly and C to transmit
a message and to receive data serially. L1, L2, L3
Module -5
8051 Interrupts and Interfacing Applications: 8051 Interrupts. 8051 Assembly
language programming to generate an external interrupt using a switch, 8051 C
programming to generate a square waveform on a port pin using a Timer interrupt.
Interfacing 8051 to ADC-0804, DAC, LCD and Stepper motor and their 8051
Assembly language interfacing programming. L1, L2, L3
Course outcomes: At the end of the course, students will be able to:
 Explain the difference between Microprocessors & Microcontrollers, Architecture
of 8051 Microcontroller, Interfacing of 8051 to external memory and Instruction
set of 8051.
 Write 8051 Assembly level programs using 8051 instruction set.
 Explain the Interrupt system, operation of Timers/Counters and Serial port of
8051.
 Write 8051 Assembly language program to generate timings and waveforms using
8051 timers, to send & receive serial data using 8051 serial port and to generate
an external interrupt using a switch.
 Write 8051 Assembly language programs to generate square wave on 8051 I/O
port pin using interrupt and C Programme to send & receive serial data using
8051 serial port.
 Interface simple switches, simple LEDs, ADC 0804, LCD and Stepper Motor to
8051 using 8051 I/O ports.
TEXT BOOKS:
1. “The 8051 Microcontroller and Embedded Systems – using assembly and C
”, Muhammad Ali Mazidi and Janice Gillespie Mazidi and Rollin D. McKinlay;
PHI, 2006 / Pearson, 2006.
2. “The 8051 Microcontroller”, Kenneth J. Ayala, 3rd Edition, Thomson/Cengage

Learning.
REFERENCE BOOKS:
1. “The 8051 Microcontroller Based Embedded Systems”, Manish K Patel,
McGraw Hill, 2014, ISBN: 978-93-329-0125-4.
2. “Microcontrollers: Architecture, Programming, Interfacing and System
Design”, Raj Kamal, Pearson Education, 2005.
MICROCONTROLLER LABORATORY
B.E., V Semester, EC/TC
Subject Code 18ECL57 CIE Marks 40

Lecture + 02 Hours Laboratory=03
Hours/Week
CREDITS – 02
I. PROGRAMMING
1. Data Transfer: Block Move, Exchange, Sorting, Finding largest element in

an array.
2. Arithmetic Instructions - Addition/subtraction, multiplication and

division, square, Cube – (16 bits Arithmetic operations – bit addressable).
3. Counters.
4. Boolean & Logical Instructions (Bit manipulations).
5. Conditional CALL & RETURN.
6. Code conversion: BCD – ASCII; ASCII – Decimal; Decimal - ASCII; HEX -

Decimal and Decimal - HEX .
7. Programs to generate delay, Programs using serial port and on-Chip timer
/ counter.
II. INTERFACING
1. Interface a simple toggle switch to 8051 and write an ALP to generate an

interrupt which switches on an LED (i) continuously as long as switch is
on and (ii) only once for a small time when the switch is turned on.
2. Write a C program to (i) transmit and (ii) to receive a set of characters

serially by interfacing 8051 to a terminal.
3. Write ALPs to generate waveforms using ADC interface.
4. Write ALP to interface an LCD display and to display a message on it.
5. Write ALP to interface a Stepper Motor to 8051 to rotate the motor.
6. Write ALP to interface ADC-0804 and convert an analog input connected

to it.
DIGITAL SIGNAL PROCESSING LABORATORY
B.E., V Semester, EC/TC

Lecture + 02 Hours Laboratory=03
Hours/Week
CREDITS – 02
Course objectives: This course will enable students to
 Simulate discrete time signals and verification of sampling theorem.
 Compute the DFT for a discrete signal and verification of its properties using
MATLAB.
 Find solution to the difference equations and computation of convolution and
correlation along with the verification of properties.
 Compute and display the filtering operations and compare with the theoretical
values.
 Implement the DSP computations on DSP hardware and verify the result.
Following Experiments to be done using MATLAB / SCILAB / OCTAVE or
equivalent:
1. Verification of sampling theorem (use interpolation function).

2. Linear and circular convolution of two given sequences, Commutative,
distributive and associative property of convolution.
3. Auto and cross correlation of two sequences and verification of their properties
4. Solving a given difference equation.
5. Computation of N point DFT of a given sequence and to plot magnitude and
phase spectrum (using DFT equation and verify it by built-in routine).
6. (i) Verification of DFT properties (like Linearity and Parseval’s theorem, etc.)
(ii) DFT computation of square pulse and Sinc function etc.
7. Design and implementation of Low pass and High pass FIR filter to meet the
desired specifications (using different window techniques) and test the filter with
an audio file. Plot the spectrum of audio signal before and after filtering.
8. Design and implementation of a digital IIR filter (Low pass and High pass) to
meet given specifications and test with an audio file. Plot the spectrum of audio
signal before and after filtering.
Following Experiments to be done using DSP kit
9. Obtain the Linear convolution of two sequences
10. Compute Circular convolution of two sequences
11. Compute the N-point DFT of a given sequence
12. Determine the Impulse response of first order and second order system
13. Generation of Sine wave and standard test signals
Course outcomes: On the completion of this laboratory course, the students will be
able to:
 Understand the concepts of analog to digital conversion of signals and
frequency domain sampling of signals.
 Modeling of discrete time signals and systems and verification of its properties
and results.
 Implementation of discrete computations using DSP processor and verify the
results.
 Realize the digital filters using a simulation tool and analyze the response of
the filter for an audio signal.

1. All laboratory experiments are to be included for practical examination.
2. Strictly follow the instructions as printed on the cover page of answer script
for breakup of marks.
3. Change of experiment is allowed only once and Marks allotted to the procedure
Reference Books:
4. Vinay K Ingle, John G Proakis, Digital Signal Processing using MATLAB, Fourth
Edition, Cengage India Private Limited, 2017.
BE Sixth Semester Syllabus
B.E., VI Semester, Electronics & Communication Engineering/

DIGITAL COMMUNICATION
SEMESTER – VI (EC/TC)

Hours/Week
Total Number of 50 (10 Hours /Module) Exam Hours 03
Lecture Hours
CREDITS – 04
 Understand the mathematical representation of signal, symbol, noise and

channels.
 Apply the concept of signal conversion to symbols and signal processing to
symbols in transmitter and receiver functional blocks.
 Compute performance issues and parameters for symbol processing and
recovery in ideal and corrupted channel conditions.
 Compute performance parameters and mitigate for these parameters in
corrupted and distorted channel conditions.
RBT
Module-1 Level
Bandpass Signal to Equivalent Lowpass: Hilbert Transform, Pre- L1,L2,L3

envelopes, Complex envelopes, Canonical representation of bandpass
signals, Complex low pass representation of bandpass systems, Complex
representation of band pass signals and systems (Text 1: 2.8, 2.9, 2.10,
2.11, 2.12, 2.13).
Line codes: Unipolar, Polar, Bipolar (AMI) and Manchester code and their
power spectral densities (Text 1: Ch 6.10).
Overview of HDB3, B3ZS, B6ZS (Ref. 1: 7.2)
Module-2
Signaling over AWGN Channels- Introduction, Geometric representation L1,L2,L3

of signals, Gram-Schmidt Orthogonalization procedure, Conversion of the
continuous AWGN channel into a vector channel, Optimum receivers
using coherent detection: ML Decoding, Correlation receiver, matched filter
receiver (Text 1: 7.1, 7.2, 7.3, 7.4).
Module – 3
equation) (Text 1: 7.11, 7.12. 7.13). Digital Modulation Techniques: L1,L2,L3

Phase shift Keying techniques using coherent detection: generation,
detection and error probabilities of BPSK and QPSK, M–ary PSK, M–ary
QAM (Relevant topics in Text 1 of 7.6, 7.7).
Frequency shift keying techniques using Coherent detection: BFSK

generation, detection and error probability (Relevant topics in Text 1 of
7.8).
Non coherent orthogonal modulation techniques: BFSK, DPSK Symbol

representation, Block diagrams treatment of Transmitter and Receiver,
Probability of error (without derivation of probability of error
Module-4
Communication through Band Limited Channels: Digital Transmission L1,L2,L3

through Band limited channels: Digital PAM Transmission through Band
limited Channels, Signal design for Band limited Channels: Design of
band limited signals for zero ISI–The Nyquist Criterion (statement only),
Design of band limited signals with controlled ISI-Partial Response signals,
Probability of error for detection of Digital PAM: Probability of error for
detection of Digital PAM with Zero ISI, Symbol–by–Symbol detection of
data with controlled ISI (Text 2: 9.1, 9.2, 9.3.1, 9.3.2).
Channel Equalization: Linear Equalizers (ZFE, MMSE), Adaptive

Equalizers(Text 2: 9.4.2).
Module-5
Principles of Spread Spectrum: Spread Spectrum Communication L1,L2,L3

Systems: Model of a Spread Spectrum Digital Communication System,
Direct Sequence Spread Spectrum Systems, Effect of De-spreading on a
narrowband Interference, Probability of error (statement only), Some
applications of DS Spread Spectrum Signals, Generation of PN Sequences,
Frequency Hopped Spread Spectrum, CDMA based on IS-95 (Text 2: 11.3.1,
11.3.2, 11.3.3, 11.3.4, 11.3.5, 11.4.2).
Course Outcomes: At the end of the course, the students will be able to:
 Associate and apply the concepts of Bandpass sampling to well

specified signals and channels.
 Analyze and compute performance parameters and transfer rates for
low pas and bandpass symbol under ideal and corrupted non band
limited channels.
 Test and validate symbol processing and performance parameters at
the receiver under ideal and corrupted bandlimited channels.
 Demonstrate by simulation and emulation that bandpass signals

subjected to corrupted and distorted symbols in a bandlimited
channel, can be demodulated and estimated at receiver to meet
specified performance criteria
module.
each module.
Text Books:
1. Simon Haykin, “Digital Communication Systems”, John Wiley & sons, First
Edition, 2014, ISBN 978-0-471-64735-5.
2. John G Proakis and Masoud Salehi, “Fundamentals of Communication
Systems”, 2014 Edition, Pearson Education, ISBN 978-8-131-70573-5.
Reference Books:
1. B.P.Lathi and Zhi Ding, “Modern Digital and Analog communication Systems”,
Oxford University Press, 4th Edition, 2010, ISBN: 978-0-198-07380-2.
2. Ian A Glover and Peter M Grant, “Digital Communications”, Pearson Education,
Third Edition, 2010, ISBN 978-0-273-71830-7.
3. John G Proakis and Masoud Salehi, “Communication Systems Engineering”, 2nd
Edition, Pearson Education, ISBN 978-93-325-5513-6.
EMBEDDED SYSTEMS
SEMESTER – VI (EC)

Hours/Week
Total Number of 50 (10 Hours/Module) Exam 03
Lecture Hours Hours
CREDITS – 03

 Understand the architectural features and instruction set of 32 bit
microcontroller ARM Cortex M3.
 Program ARM Cortex M3 using the various instructions and C language for
different applications.
 Understand the basic hardware components and their selection method based
on the characteristics and attributes of an embedded system.
 Develop the hardware software co-design and firmware design approaches.
 Explain the need of real time operating system for embedded system
applications.
Module-1 RBT Level
ARM-32 bit Microcontroller: Thumb-2 technology and applications L1, L2

of ARM, Architecture of ARM Cortex M3, Various Units in the
architecture, Debugging support, General Purpose Registers, Special
Registers, exceptions, interrupts, stack operation, reset sequence
(Text 1: Ch 1, 2, 3)
Module-2
ARM Cortex M3 Instruction Sets and Programming: Assembly L1, L2, L3

basics, Instruction list and description, Useful instructions, Memory
mapping, Bit-band operations and CMSIS, Assembly and C language
Programming (Text 1: Ch-4, Ch-5, Ch-10 (10.1, 10.2, 10.3, 10.5 only)
Module – 3
Embedded System Components: Embedded Vs General computing L1, L2, L3

system, Classification of Embedded systems, Major applications and
purpose of ES. Core of an Embedded System including all types of
processor/controller, Memory, Sensors, Actuators, LED, 7 segment
LED display, Optocoupler, Relay, Piezo buzzer, Push button switch,
Communication Interface (onboard and external types), Embedded
firmware, Other system components.
(Text 2: All the Topics from Ch-1 and Ch-2, excluding 2.3.3.4 (stepper
motor), 2.3.3.8 (keyboard) and 2.3.3.9 (PPI) sections).
Module-4
Embedded System Design Concepts: Characteristics and Quality L1, L2, L3

Attributes of Embedded Systems, Operational and non-operational
quality attributes, Embedded Systems-Application and Domain
specific, Hardware Software Co-Design and Program Modelling
(excluding UML), Embedded firmware design and development
(excluding C language).
(Text 2: Ch-3, Ch-4, Ch-7 (Sections 7.1, 7.2 only), Ch-9 (Sections 9.1,
9.2, 9.3.1, 9.3.2 only)
Module-5
RTOS and IDE for Embedded System Design: Operating System L1, L2, L3
basics, Types of operating systems, Task, process and threads (Only
POSIX Threads with an example program), Thread preemption,
Preemptive Task scheduling techniques, Task Communication, Task
synchronization issues – Racing and Deadlock, Concept of Binary
and counting semaphores (Mutex example without any program),
How to choose an RTOS, Integration and testing of Embedded
hardware and firmware, Embedded system Development
Environment – Block diagram (excluding Keil),
Disassembler/decompiler, simulator, emulator and debugging
techniques
(Text 2: Ch-10 (Sections 10.1, 10.2, 10.3, 10.5.2 , 10.7, 10.8.1.1,
10.8.1.2, 10.8.2.2, 10.10 only), Ch 12, Ch-13 (a block diagram before
13.1, 13.3, 13.4, 13.5, 13.6 only)

to:
 Describe the architectural features and instructions of 32 bit
microcontroller ARM Cortex M3.
 Apply the knowledge gained for Programming ARM Cortex M3
for different applications.
 Understand the basic hardware components and their
selection method based on the characteristics and attributes
of an embedded system.
 Develop the hardware /software co-design and firmware
design approaches.
 Explain the need of real time operating system for embedded
system applications.
module.
each module.
60.
Text Books:
1. Joseph Yiu, “The Definitive Guide to the ARM Cortex-M3”, 2nd Edition,
Newnes, (Elsevier), 2010.
2. Shibu K V, “Introduction to Embedded Systems”, Tata McGraw Hill

Education Private Limited, 2nd Edition.
COMPUTER NETWORKS

Number of Lecture 3+2 (Tutorials) SEE Marks 60
Hours/Week
CREDITS – 04
 Understand the layering architecture of OSI reference model and TCP/IP protocol
suite.
 Understand the protocols associated with each layer.
 Learn the different networking architectures and their representations.
 Learn the functions and services associated with each layer.
Module-1 RBT
Level
Introduction: Data communication: Components, Data representation, Data L1, L2
flow, Networks: Network criteria, Physical Structures, Network types: LAN,
WAN, Switching, The Internet.
Network Models: Protocol Layering: Scenarios, Principles, Logical
Connections, TCP/IP Protocol Suite: Layered Architecture, Layers in TCP/IP
suite, Description of layers, Encapsulation and Decapsulation, Addressing,
Multiplexing and Demultiplexing, The OSI Model: OSI Versus TCP/IP.
Connecting Devices: Hubs, Switches.
Module-2
L1, L2
Data-Link Layer: Introduction: Nodes and Links, Services, Categories’ of
link, Sublayers, Link Layer addressing: Types of addresses, ARP. Data Link
Control (DLC) services: Framing, Flow and Error Control, Data Link Layer
Protocols: Simple Protocol, Stop and Wait protocol, Piggybacking.
Media Access Control: Random Access: ALOHA, CSMA, CSMA/CD,
CSMA/CA. Controlled Access: Reservation, Polling, Token Passing.
Wireless LANs: Introduction: Architectural Comparison, Characteristics,
IEEE 802.11: Architecture, MAC Sublayer, Addressing Mechanism, Physical
Layer, Bluetooth: Architecture, Layers.
Module-3
L1, L2
Network Layer: Introduction, Network Layer services: Packetizing, Routing
and Forwarding, Other services, Packet Switching: Datagram Approach,
Virtual Circuit Approach, IPV4 Addresses: Address Space, Classful
Addressing, Classless Addressing, DHCP, Network Address Resolution,
Forwarding of IP Packets: Based on destination Address and Label.
Network Layer Protocols: Internet Protocol (IP): Datagram Format,
Fragmentation, Options, Security of IPv4 Datagrams, ICMPv4: Messages,
Debugging Tools, Mobile IP: Addressing, Agents, Three Phases, Inefficiency in
Mobile IP.
Unicast Routing: Introduction, Routing Algorithms: Distance Vector
Routing, Link State Routing, Path vector routing.
Module-4
L1, L2,
Transport Layer: Introduction: Transport Layer Services, Connectionless L3
and Connection oriented Protocols, Transport Layer Protocols: Simple
protocol, Stop and wait protocol, Go-Back-N Protocol, Selective repeat
protocol,
Transport-Layer Protocols:
User Datagram Protocol: User Datagram, UDP Services, UDP Applications,
Transmission Control Protocol: TCP Services, TCP Features, Segment,
Connection, State Transition diagram, Windows in TCP, Flow control, Error
control, TCP congestion control.
Module-5
Quality of Service: Data flow characteristics: Definitions, Flow control to L1, L2
improve QoS: Scheduling, Traffic shaping.
Application Layer: introduction: providing services, Application- layer

paradigms, Standard Client –Server Protocols: World wide web, Hyper Text
Transfer Protocol, FTP: Two connections, Control Connection, Data
Connection, Electronic Mail: Architecture, Wed Based Mail, Telnet: Local
versus remote logging. Domain Name system: Name space, DNS in internet,
Resolution, DNS Messages, Registrars, DDNS.
 Understand the concepts of networking thoroughly
 Identify the protocols and services of different layers.
 Distinguish the basic network configurations and standards associated with
each network.
 Analyze the performance of the network

module.
module.
Text Book:
1. Forouzan, “Data Communications and Networking” , 5th Edition, McGraw Hill,
2013, ISBN: 1-25-906475-3
Reference Books:
1. James J Kurose, Keith W Ross ,Computer Networks, , Pearson Education.
2. Wayarles Tomasi , Introduction to Data Communication and Networking, ,
Pearson Education.
3. Andrew Tanenbaum, “Computer networks”, Prentice Hall.
4. William Stallings, “Data and computer communications”, Prentice Hall,
OPERATING SYSTEM

Hours/Week
Total Number of 40 (8 Hours /Module) Exam Hours 03
Lecture Hours
CREDITS – 03
 Understand the services provided by an operating system.

 Understand how processes are synchronized and scheduled.
 Understand different approaches of memory management and virtual memory
management.
 Understand the structure and organization of the file system
 Understand interprocess communication and deadlock situations.
RBT
Module-1 Level
Introduction to Operating Systems L1,L2
OS, Goals of an OS, Operation of an OS, Computational Structures,

Resource allocation techniques, Efficiency, System Performance and User
Convenience, Classes operating System, Batch processing, Multi
programming, Time Sharing Systems, Real Time and distributed Operating
Systems (Topics from Sections 1.2, 1.3, 2.2 to 2.8 of Text).
Module-2
Process Management: OS View of Processes, PCB, Fundamental State L1,L2

Transitions, Threads, Kernel and User level Threads, Non-preemptive
scheduling- FCFS and SRN, Preemptive Scheduling- RR and LCN, Long
term, medium term and short term scheduling in a time sharing system
(Topics from Sections 3.3, 3.3.1 to 3.3.4, 3.4, 3.4.1, 3.4.2 , 4.2, 4.3, 4.4.1
of Text).
Module – 3
Memory Management: Contiguous Memory allocation, Non-Contiguos L1,L2

Memory Allocation, Paging, Segmentation, Segmentation with paging,
Virtual Memory Management, Demand Paging, Paging Hardware, VM
handler, FIFO, LRU page replacement policies (Topics from Sections 5.5 to
5.9, 6.1 to 6.3, except Optimal policy and 6.3.1of Text).
Module-4
File Systems: File systems and IOCS, File Operations, File Organizations, L1,L2,L3
Directory structures, File Protection, Interface between File system and
IOCS, Allocation of disk space, Implementing file access (Topics from
Sections 7.1 to 7.8 of Text).
Module-5
Message Passing and Deadlocks: Overview of Message Passing, L1,L2,L3

Implementing message passing, Mailboxes, Deadlocks, Deadlocks in
resource allocation, Resource state modelling, Deadlock detection
algorithm, Deadlock Prevention (Topics from Sections 10.1 to 10.3, 11.1 to
11.5 of Text).
 Explain the goals, structure, operation and types of operating

systems.
 Apply scheduling techniques to find performance factors.
 Explain organization of file systems and IOCS.
 Apply suitable techniques for contiguous and non-contiguous
memory allocation.
 Describe message passing, deadlock detection and prevention
methods.
module.
each module.
Text Books:
Operating Systems – A concept based approach, by Dhamdare, TMH, 2nd edition.
Reference Books:
1. Operating systems concepts, Silberschatz and Galvin, John Wiley India Pvt. Ltd,
5th edition,2001.
2. Operating system–internals and design system, William Stalling, Pearson
Education, 4th ed, 2006.
Design of operating systems, Tannanbhaum, TMH, 2001.
ARITIFICAL NEURAL NETWORKS

Hours/Week
CREDITS – 03
Course Objectives: The objectives of this course are:
 Understand the basics of ANN and comparison with Human brain

 Provide knowledge on Generalization and function approximation and various
architectures of building an ANN
 Provide knowledge of reinforcement learning using neural networks
 Provide knowledge of unsupervised learning using neural networks.
Module-1
Introduction: Biological Neuron – Artificial Neural Model - Types of activation
functions – Architecture: Feedforward and Feedback, Convex Sets, Convex Hull and
Linear Separability, Non-Linear Separable Problem. XOR Problem, Multilayer
Networks.
Learning: Learning Algorithms, Error correction and Gradient Descent Rules,

Learning objective of TLNs, Perceptron Learning Algorithm, Perceptron Convergence
Theorem. L1, L2
Module-2
Supervised Learning: Perceptron learning and Non Separable sets, α-Least Mean
Square Learning, MSE Error surface, Steepest Descent Search, µ-LMS approximate
to gradient descent, Application of LMS to Noise Cancelling, Multi-layered Network
Architecture, Backpropagation Learning Algorithm, Practical consideration of BP
algorithm. L1, L2, L3
Module-3
Support Vector Machines and Radial Basis Function: Learning from Examples,
Statistical Learning Theory, Support Vector Machines, SVM application to Image
Classification, Radial Basis Function Regularization theory, Generalized RBF
Networks, Learning in RBFNs, RBF application to face recognition. L1, L2, L3
Module-4
Support Vector Machines and Radial Basis Function: Learning from Examples,
Statistical Learning Theory, Support Vector Machines, SVM application to Image
Classification, Radial Basis Function Regularization theory, Generalized RBF
Networks, Learning in RBFNs, RBF application to face recognition. L1, L2, L3
Module-5
Self-organization Feature Map: Maximal Eigenvector Filtering, Extracting Principal
Components, Generalized Learning Laws, Vector Quantization, Self-organization
Feature Maps, Application of SOM, Growing Neural Gas. L1, L2, L3
Course outcomes: At the end of the course, students should be able to:
 Understand the role of neural networks in engineering, artificial intelligence, and

cognitive modelling.
 Understand the concepts and techniques of neural networks through the study of
the most important neural network models.
 Evaluate whether neural networks are appropriate to a particular application.
 Apply neural networks to particular applications, and to know what steps to take
to improve performance.
Text Book:
1. Neural Networks A Classroom Approach– Satish Kumar, McGraw Hill

Education (India) Pvt. Ltd, Second Edition.
Reference Books:
1. Introduction to Artificial Neural Systems-J.M. Zurada, Jaico Publications

1994.
2. Artificial Neural Networks-B. Yegnanarayana, PHI, New Delhi 1998.
DIGITAL SYSTEM DESIGN USING VERILOG
B.E., VI Semester EC
Course Code: 18EC643 CIE Marks: 40
Number of Lecture Hours/Week: 03 SEE Marks: 60
Total Number of Lecture Hours: 40 (08 Hrs per module) Exam Hours: 03
CREDITS – 03
Course Objectives: This course will enable students to
 Understand the concepts of Verilog Language.
 Design the digital systems as an activity in a larger systems design context.
 Study the design and operation of semiconductor memories frequently
used in application specific digital system.
 Inspect how effectively IC’s are embedded in package and assembled in
PCB’s for different application.
 Design and diagnosis of processors and I/O controllers used in embedded systems.
Module -1
Introduction and Methodology:
Digital Systems and Embedded Systems, Real-World Circuits, Models, Design
Methodology (1.1, 1.3 to 1.5 of Text).
Combinational Basics: Combinational Components and Circuits, Verification of
Combinational Circuits.(2.3 and 2.4 of Text)
Sequential Basics: Sequential Datapaths and Control Clocked Synchronous Timing
Methodology (4.3 up to 4.3.1,4.4 up to 4.4.1 of Text). L1, L2, L3
Module -2
Memories: Concepts, Memory Types, Error Detection and Correction (Chap 5 of Text).
L1, L2, L3
Module -3
Implementation Fabrics: Integrated Circuits, Programmable Logic Devices, Packaging
and Circuit boards, Interconnection and Signal integrity (Chap 6 of Text). L1, L2, L3
Module -4
I/O interfacing: I/O devices, I/O controllers, Parallel Buses, Serial Transmission, I/O
software (Chap 8 of Text). L1, L2, L3
Module -5
Design Methodology: Design flow, Design optimization, Design for test, Nontechnical
Issues (Chap 10 of Text). L1, L2, L3, L4
 Construct the combinational circuits, using discrete gates and programmable logic
devices.
 Describe Verilog model for sequential circuits and test pattern generation.
 Design a semiconductor memory for specific chip design.
 Design embedded systems using small microcontrollers, larger CPUs/DSPs, or
hard or soft processor cores.
 Synthesize different types of processor and I/O controllers that are used in
embedded system.
Text Book:
Peter J. Ashenden, “Digital Design: An Embedded Systems Approach Using VERILOG”,
Elesvier, 2010.
NANOELECTRONICS

Hours/Week
Lecture Hours
CREDITS – 03
 Enhance basic engineering science and technical knowledge of
nanoelectronics.
 Explain basics of top-down and bottom-up fabrication process, devices and
systems.
 Describe technologies involved in modern day electronic devices.
 Know various nanostructures of carbon and the nature of the carbon bond itself.
 Learn the photo physical properties of sensor used in generating a signal.
Module-1
Introduction: Overview of nanoscience and engineering. Development milestones in
microfabrication and electronic industry. Moore’s law and continued miniaturization,
Classification of Nanostructures, Electronic properties of atoms and solids: Isolated
atom, Bonding between atoms, Giant molecular solids, Free electron models and
energy bands, crystalline solids, Periodicity of crystal lattices, Electronic conduction,
effects of nanometerlength scale, Fabrication methods: Top down processes, Bottom
up processes methods for templating the growth of nanomaterials, ordering of
nanosystems (Text 1). L1, L2
Module-2
Characterization: Classification, Microscopic techniques, Field ion microscopy,
scanning probe techniques, diffraction techniques: bulk and surface diffraction
techniques (Text 1).
Inorganic semiconductor nanostructures: overview of semiconductor physics.
Quantum confinement in semiconductor nanostructures: quantum wells, quantum
wires, quantum dots, super-lattices, band offsets, electronic density of states (Text 1).
L1, L2
Module-3
Fabrication techniques: requirements of ideal semiconductor, epitaxial growth of
quantum wells, lithography and etching, cleaved-edge over growth, growth of vicinal
substrates, strain induced dots and wires, electrostatically induced dots and wires,
Quantum well width fluctuations, thermally annealed quantum wells, semiconductor
nanocrystals, collidal quantum dots, self-assembly techniques.(Text 1).
Physical processes: modulation doping, quantum hall effect, resonant tunneling,
charging effects, ballistic carrier transport, Inter band absorption, intraband
absorption, Light emission processes, phonon bottleneck, quantum confined stark
effect, nonlinear effects, coherence and dephasing, characterization of semiconductor
nanostructures: optical electrical and structural (Text 1). L1, L2
Module-4
Carbon Nanostructures: Carbon molecules, Carbon Clusters, Carbon Nanotubes,
application of Carbon Nanotubes. (Text 2) L1, L2
Module-5
Nanosensors: Introduction, What is Sensor and Nanosensors?, What makes them
Possible?, Order From Chaos, Characterization, Perception, Nanosensors Based On
Quantum Size Effects, Electrochemical Sensors, Sensors Based On Physical
Properties, Nanobiosensors, Smart dust Sensor for the future. (Text 3)
Applications: Injection lasers, quantum cascade lasers, single-photon sources,
biological tagging, optical memories, coulomb blockade devices, photonic structures,
QWIP’s, NEMS, MEMS (Text 1). L1, L2
 Know the principles behind Nanoscience engineering and Nanoelectronics.
 Know the effect of particles size on mechanical, thermal, optical and electrical
properties of nanomaterials.
 Know the properties of carbon and carbon nanotubes and its applications.
 Know the properties used for sensing and the use of smart dust sensors.
 Apply the knowledge to prepare and characterize nanomaterials.
 Analyse the process flow required to fabricate state-of-the-art transistor
technology.
Text Books:
1. Ed Robert Kelsall, Ian Hamley, Mark Geoghegan, “Nanoscale Science and
Technology”, John Wiley, 2007.
2. Charles P Poole, Jr, Frank J Owens, “Introduction to Nanotechnology”,
John Wiley, Copyright 2006, Reprint 2011.
3. T Pradeep, “Nano: The essentials-Understanding Nanoscience and
Nanotechnology”, TMH.
Reference Book:
Ed William A Goddard III, Donald W Brenner, Sergey E. Lyshevski, Gerald J
Iafrate, “Hand Book of Nanoscience Engineering and Technology”, CRC press,
2003.
EMBEDDED SYSTEMS LAB

Number of Lecture 01Hr Tutorial (Instructions) SEE Marks 60
CREDITS – 02
 Understand the instruction set of ARM Cortex M3, a 32 bit microcontroller and the
software tool required for programming in Assembly and C language.
 Program ARM Cortex M3 using the various instructions in assembly level language
for different applications.
 Interface external devices and I/O with ARM Cortex M3.
 Develop C language programs and library functions for embedded system
applications.
PART-A: Conduct the following Study experiments to learn ALP using ARM
Cortex M3 Registers using an Evaluation board and the required software tool.
1. ALP to multiply two 16 bit binary numbers.

2. ALP to find the sum of first 10 integer numbers.
PART-B: Conduct the following experiments on an ARM CORTEX M3

evaluation board using evaluation version of Embedded 'C' & Keil uVision-4
tool/compiler.
1. Display “Hello World” message using Internal UART.

2. Interface and Control a DC Motor.
3. Interface a Stepper motor and rotate it in clockwise and anti-clockwise
direction.
4. Interface a DAC and generate Triangular and Square waveforms.
5. Interface a 4x4 keyboard and display the key code on an LCD.
6. Using the Internal PWM module of ARM controller generate PWM and vary its
duty cycle.
7. Demonstrate the use of an external interrupt to toggle an LED On/Off.
8. Display the Hex digits 0 to F on a 7-segment LED interface, with an
appropriate delay in between.
9. Interface a simple Switch and display its status through Relay, Buzzer and
LED.
10. Measure Ambient temperature using a sensor and SPI ADC IC.
 Understand the instruction set of 32 bit microcontroller ARM Cortex M3, and the
software tool required for programming in Assembly and C language.
 Develop assembly language programs using ARM Cortex M3 for different
applications.
 Interface external devices and I/O with ARM Cortex M3.
 Develop C language programs and library functions for embedded system
applications.
Conduction of Practical Examination:
1. PART-B experiments using Embedded-C are only to be considered for the practical
examination. PART-A ALP programs are for study purpose and can be considered
for Internal Marks evaluation.
2. Strictly follow the instructions as printed on the cover page of answer script for
breakup of marks.
3. Change of experiment is allowed only once and Marks allotted to the procedure
COMPUTER NETWORKS LAB

CREDITS – 02
 Choose suitable tools to model a network and understand the protocols at various
OSI reference levels.
 Design a suitable network and simulate using a Network simulator tool.
 Simulate the networking concepts and protocols using C/C++ programming.
 Model the networks for different configurations and analyze the results.
PART-A: Simulation experiments using NS2/ NS3/ OPNET/ NCTUNS/ NetSim/
QualNet or any other equivalent tool
1. Implement a point to point network with four nodes and duplex links between them.
Analyze the network performance by setting the queue size and varying the
bandwidth.
2. Implement a four node point to point network with links n0-n2, n1-n2 and n2-n3.
Apply TCP agent between n0-n3 and UDP between n1-n3. Apply relevant
applications over TCP and UDP agents changing the parameter and determine the
number of packets sent by TCP/UDP.
3. Implement Ethernet LAN using n (6-10) nodes. Compare the throughput by
changing the error rate and data rate.
4. Implement Ethernet LAN using n nodes and assign multiple traffic to the nodes and
obtain congestion window for different sources/ destinations.
5. Implement ESS with transmission nodes in Wireless LAN and obtain the
performance parameters.
6. Implementation of Link state routing algorithm.
PART-B: Implement the following in C/C++

1. Write a program for a HLDC frame to perform the following.
i) Bit stuffing
ii) Character stuffing.
2. Write a program for distance vector algorithm to find suitable path for transmission.
3. Implement Dijkstra’s algorithm to compute the shortest routing path.

4. For the given data, use CRC-CCITT polynomial to obtain CRC code. Verify the
program for the cases
a. Without error
b. With error
5. Implementation of Stop and Wait Protocol and Sliding Window Protocol
6. Write a program for congestion control using leaky bucket algorithm.
able to:
 Use the network simulator for learning and practice of networking algorithms.
 Illustrate the operations of network protocols and algorithms using C
programming.
 Simulate the network with different configurations to measure the performance
parameters.
 Implement the data link and routing protocols using C programming.

 For examination one question from software and one question from hardware or
only one hardware experiments based on the complexity to be set.
breakup of marks.
OPEN ELETIVES-A OFFERED BY EC/TC BOARD
AUTOMOTIVE ELECTRONICS
B.E V Semester Open Elective-A
[As per Choice Based Credit System (CBCS) Scheme
Course Code 18XXEC65XX CIE Marks 40
Number of
Lecture 03 SEE Marks 60
Hours/Week
Total Number of 40 (08 Hrs per
Exam Hours 03
CREDITS – 03
 Understand the basics of automobile dynamics and design electronics to complement
those features.
 Design and implement the electronics that attribute the reliability, safety, and
smartness to the automobiles, providing add-on comforts.
Module-1
Automotive Fundamentals Overview – Evolution of Automotive Electronics, Automobile

Physical Configuration, Survey of Major Automotive Systems, The Engine – Engine Block,
Cylinder Head, Four Stroke Cycle, Engine Control, Ignition System - Spark plug, High
voltage circuit and distribution, Spark pulse generation, Ignition Timing, Diesel Engine,
Drive Train - Transmission, Drive Shaft, Differential, Suspension, Brakes, Steering System
(Text 1: Chapter1), Starter Battery –Operating principle: (Text 2: Pg. 407-410)
(4 hours)
The Basics of Electronic Engine Control – Motivation for Electronic Engine Control –
Exhaust Emissions, Fuel Economy, Concept of an Electronic Engine control system,
Definition of General terms, Definition of Engine performance terms, Engine mapping,
Effect of Air/Fuel ratio, spark timing and EGR on performance, Control Strategy, Electronic
Fuel control system, Analysis of intake manifold pressure, Electronic Ignition. (Text 1:
Chapter 5) (4 hours) L1, L2
Module-2
Automotive Control System applications of Sensors and Actuators – Typical Electronic
Engine Control System, Variables to be measured (Text 1: Chapter 6)
(1 hour)
Automotive Sensors – Airflow rate sensor, Strain Gauge MAP sensor, Engine Crankshaft
Angular Position Sensor, Magnetic Reluctance Position Sensor, Hall effect Position
Sensor, Shielded Field Sensor, Optical Crankshaft Position Sensor, Throttle Angle Sensor
(TAS), Engine Coolant Temperature (ECT) Sensor, Exhaust Gas Oxygen (O2/EGO)
Lambda Sensors, Piezoelectric Knock Sensor. (Text 1: Chapter 6) (5 hours)
Automotive Actuators – Solenoid, Fuel Injector, EGR Actuator, Ignition System (Text 1:
Chapter 6) (2 hours) L1, L2
Module-3
Digital Engine Control Systems – Digital Engine control features, Control modes for fuel
Control (Seven Modes), EGR Control, Electronic Ignition Control - Closed loop Ignition
timing, Spark Advance Correction Scheme, Integrated Engine Control System - Secondary
Air Management, Evaporative Emissions Canister Purge, Automatic System Adjustment,
System Diagnostics. (Text 1: Chapter 7) (6 hours)
Control Units – Operating conditions, Design, Data processing, Programming, Digital

modules in the Control unit, Control unit software. (Text 2: Pg. 196-207) (2 hours)
L1, L2
Module-4
Automotive Networking –Bus Systems – Classification, Applications in the vehicle,
Coupling of networks, Examples of networked vehicles (Text 2: Pg. 85-91), Buses - CAN
Bus, LIN Bus, MOST Bus, Bluetooth, Flex Ray, Diagnostic Interfaces. (Text 2: Pg. 92-151)
(6 hours)
Vehicle Motion Control – Typical Cruise Control System, Digital Cruise Control System,
Digital Speed Sensor, Throttle Actuator, Digital Cruise Control configuration, Cruise
Control Electronics (Digital only), Antilock Brake System (ABS) (Text 1: Chapter 8) (2
hours) L1, L2
Module-5
Automotive Diagnostics–Timing Light, Engine Analyzer, On-board diagnostics, Off-board
diagnostics, Expert Systems, Occupant Protection Systems – Accelerometer based Air Bag
systems. (Text 1: Chapter 10) (2 hours)
Future Automotive Electronic Systems – Alternative Fuel Engines, Electric and Hybrid
vehicles, Fuel cell powered cars, Collision Avoidance Radar warning Systems, Low tire
pressure warning system, Heads Up display, Speech Synthesis, Navigation – Navigation
Sensors - Radio Navigation, Signpost navigation, dead reckoning navigation, Voice
Recognition Cell Phone dialing, Advanced Cruise Control, Stability Augmentation,
Automatic driving Control (Text 1: Chapter 11) (6 hours) L1, L2, L3
 Acquire an overview of automotive components, subsystems, and basics of
Electronic Engine Control in today’s automotive industry.
 Use available automotive sensors and actuators while interfacing with
microcontrollers / microprocessors during automotive system design.
 Understand the networking of various modules in automotive systems,
communication protocols and diagnostics of the sub systems.
 Design and implement the electronics that attribute the reliability, safety, and
smartness to the automobiles, providing add-on comforts and get fair idea on future
Automotive Electronic Systems.
Text Books:
1. William B. Ribbens, “Understanding Automotive Electronics”, 6th Edition, Elsevier
Publishing.
2. Robert Bosch Gmbh (Ed.) Bosch Automotive Electrics and Automotive Electronics
Systems and Components, Networking and Hybrid Drive, 5th edition, John Wiley&
Sons Inc., 2007.
Sensors and Signal Conditioning
VI SEMESTER Open Elective-A
Subject Code 18xxEC65xx CIE Marks 40
Number of 03 SEE 60
Lecture marks
Hours/Week
Total Number of 40 (08 Hrs/module) Exam 03
Lecture Hours Hours
CREDITS – 03
 Understand various technologies associated in manufacturing of
sensors
 Know about types of sensors used in modern digital systems
 Become aware of material properties required to make sensors
Modules RBT
Level
Module 1
Introduction to sensor bases measurement systems: L1, L2
General concepts and terminology, sensor classification, primary
sensors, material for sensors, microsensor technology,
magnetoresistors, light dependent resistors, resistive
hygrometers,resistive gas sensors, liquid conductivity sensors
(Selected topics from ch.1 & 2)
Module 2
Reactance Variation and Electromagnetic Sensors: -Capacitive L1, L2
Sensors, Inductive Sensors, Electromagnetic Sensors.
Signal Conditioning for Reactance Variation Sensors-Problems
and Alternatives, ac Bridges Carrier Amplifiers, Coherent
Detection, Specific Signal Conditioners for Capacitive Sensors,
Resolver-to-Digital and Digital-to-Resolver Converters.
Module 3
Self-generating sensors-Thermoelectric sensors, piezoelectric L2,L3
sensors, pyroelectric sensors, photovoltaic sensors,
electrochemical sensors.
Module 4
Digital and intelligent sensors-position encoders, resonant L2,L3
sensors, sensors based on quartz resonators, SAW sensors,
Vibrating wire strain gages, vibrating cylinder sensors, Digital flow
meters
Module 5
Sensors based on semiconductor junctions - Thermometers L2,L3
based on semiconductor junctions, magneto diodes and magneto
transistors, photodiodes and phototransistors, sensors based on
MOSFET transistors, charge- coupled sensors – types of CCD
imaging sensors, ultrasonic-based sensors.
1. Appreciate various types of sensors and their construction
2. Use sensors specific to the end use application
3. Design systems integrated with sensors
 The question paper will have 10 full questions carrying equal marks.
 Each full question consists of 16 marks with a maximum of four sub

questions.
 There will be 2 full questions from each module covering all the topics
of the module
 The students will have to answer 5 full questions, selecting one full
question from each module.
Text Book:
“Sensors and Signal Conditioning”, Ramon Pallás Areny, John G. Webster,
2nd edition, John Wiley and Sons, 2000
BE Seventh Semester Syllabus
MICROWAVES AND ANTENNAS

SEMESTER – VII EC
Hours/Week
Total Number of 40 (08 hours per Exam Hours 03
Lecture Hours module)
CREDITS – 03
 Describe the microwave properties and its transmission media
 Describe microwave devices for several applications
 Understand the basics of antenna theory
 Select antennas for specific applications
Modules Teaching
Hours
Module 1
Microwave Tubes: Introduction, Reflex Klystron Oscillator, Mechanism of
Oscillations, Modes of Oscillations, Mode Curve (Qualitative Analysis only). 08 hours
(Text 1: 9.1, 9.2.1)
Microwave Transmission Lines: Microwave Frequencies, Microwave
devices, Microwave Systems, Transmission Line equations and solutions,
Reflection Coefficient and Transmission Coefficient, Standing Wave and
Standing Wave Ratio, Smith Chart, Single Stub matching.
(Text 2: 0.1, 0.2, 0.3, 3.1, 3.2, 3.3, 3.5, 3.6 Except Double stub matching)
Module 2
Microwave Network theory: Introduction, Symmetrical Z and Y-
Parameters for reciprocal Networks, S matrix representation of Multi-Port
Networks. (Text1: 6.1, 6.2, 6.3) 08 hours
Microwave Passive Devices: Coaxial Connectors and Adapters,

Attenuators, Phase Shifters, Waveguide Tees, Magic tees. (Text 1: 6.4.2,
6.4.14, 6.4.15, 6.4.16)
Module 3
Strip Lines: Introduction, Micro Strip lines, Parallel Strip lines, Coplanar
Strip lines, Shielded Strip Lines. (Text 2: 11.1, 11.2, 11.3, 11.4)
Antenna Basics: Introduction, Basic Antenna Parameters, Patterns, Beam 08 hours

Area, Radiation Intensity, Beam Efficiency, Directivity and Gain, Antenna
Apertures, Effective Height, Radio Communication Link, Antenna Field
Zones. (Text 3: 2.1 - 2.7, 2.9 – 2.11, 2.13)
Module 4
Point Sources and Arrays: Introduction, Point Sources, Power Patterns,

Power Theorem, Radiation Intensity, Arrays of two isotropic point sources,
Pattern Multiplication, Linear Arrays of n Isotropic Point Sources of equal
Amplitude and Spacing.(Text 3: 5.1 – 5.6, 5.9, 5.10, 5.13)
08 Hours
Electric Dipoles: Introduction, Short Electric Dipole, Fields of a Short
Dipole, Radiation Resistance of a Short Electric Dipole, Thin Linear
Antenna (Field Analyses) (Text 3: 6.1 - 6.5)
Module 5
Loop and Horn Antenna: Introduction, Small loop, The Loop Antenna
General Case, The Loop Antenna as a special case, Radiation resistance of
loops, Directivity of Circular Loop Antennas with uniform current, Horn
antennas Rectangular Horn Antennas.(Text 3: 7.1, 7.2, 7.4, 7.6, 7.7, 7.8,
7.19, 7.20) 08 Hours
Antenna Types: The Helix geometry, Helix modes, Practical Design
considerations for the mono-filar axial mode Helical Antenna, Yagi-Uda
array, Parabolic reflector (Text 3: 8.3, 8.4, 8.5, 8.8, 9.5)
Course outcomes:
At the end of the course students will be able to:
 Describe the use and advantages of microwave transmission
 Analyze various parameters related to microwave transmission lines and
waveguides
 Identify microwave devices for several applications
 Analyze various antenna parameters necessary for building a RF system
 Recommend various antenna configurations according to the applications.
 The question paper will have ten questions
 Each full question consists of 16marks.
 There will be 2 full questions (with a maximum of four sub questions) from each
module.
 Each full question will have sub questions covering all the topics under a module
 The students will have to answer 5 full questions, selecting one full question from
each module
Text Books:
1. Microwave Engineering – Annapurna Das, Sisir K Das, TMH, Publication, 2nd,

2010.
2. Microwave Devices and circuits- Samuel Y Liao, Pearson Education
3. Antennas and Wave Propagation- John D. Krauss, Ronald J Marhefka, Ahmad S
Khan, 4th Edition, McGraw Hill Education, 2013
Reference Books:
1. Microwave Engineering - David M Pozar, John Wiley India Pvt. Ltd., 3rd Edn,
2008.
2. Microwave Engineering – Sushrut Das, Oxford Higher Education, 2ndEdn, 2015
3. Antennas and Wave Propagation – Harish and Sachidananda: Oxford University
Press, 2007
VLSI DESIGN
SEMESTER – VII (EC)

Hours/Week
Lecture Hours
CREDITS – 04
Course Objectives: The objectives of the course is to enable students to:
 Impart knowledge of MOS transistor theory and CMOS technologies
 Impart knowledge on architectural choices and performance tradeoffs
involved in designing and realizing the circuits in CMOS technology
 Cultivate the concepts of subsystem design processes
 Demonstrate the concepts of CMOS testing
Module-1
Introduction: A Brief History, MOS Transistors, MOS Transistor Theory, Ideal I-V
Characteristics, Non-ideal I-V Effects, DC Transfer Characteristics
(1.1, 1.3, 2.1, 2.2, 2.4, 2.5.1 – 2.5.3 of TEXT2).
Fabrication: nMOS Fabrication, CMOS Fabrication [P-well process, N-well process,
Twin tub process], BiCMOS Technology (1.7, 1.8, 1.10 of TEXT1). L1, L2
Module-2
MOS and BiCMOS Circuit Design Processes: MOS Layers, Stick Diagrams, Design
Rules and Layout.
Basic Circuit Concepts: Sheet Resistance, Area Capacitances of Layers, Standard
Unit of Capacitance, Some Area Capacitance Calculations, Delay Unit, Inverter Delays
(3.1 to 3.3, 4.1, 4.3 to 4.7 of TEXT1).
L1, L2, L3
Module-3
Scaling of MOS Circuits: Scaling Models & Scaling Factors for Device Parameters
Subsystem Design Processes: Some General considerations, An illustration of
Design Processes, Illustration of the Design Processes- Regularity, Design of an
ALU Subsystem (5.1, 5.2, 7.1, 7.2, 8.2, 8.3 of TEXT1). L1, L2, L3
Module-4
Subsystem Design: Some Architectural Issues, Switch Logic, Gate(restoring) Logic,
Parity Generators, Multiplexers.
(6.1to 6.3, 6.4.1, 6.4.3 of TEXT1).
FPGA Based Systems: Introduction, Basic concepts, Digital design and FPGA’s,
FPGA based System design, FPGA architecture (1.1 to 1.4, 3.2, 4.8 of TEXT3). L1,
L2, L3
Module-5
Memory, Registers and Aspects of system Timing- System Timing Considerations,
Some commonly used Storage/Memory elements (9.1, 9.2 of TEXT1).
Testing and Verification: Introduction, Logic Verification, Logic Verification
Principles, Manufacturing Test Principles, Design for testability (12.1, 12.1.1, 12.3,
12.5, 12.6.3 of TEXT 2). L1, L2, L3
Course outcomes: At the end of the course, the students will be able to:
 Demonstrate understanding of MOS transistor theory, CMOS fabrication flow
and technology scaling.
 Draw the basic gates using the stick and layout diagrams with the knowledge of
physical design aspects.
 Interpret Memory elements along with timing considerations
 Demonstrate knowledge of FPGA based system design
 Interpret testing and testability issues in VLSI Design
 Analyze CMOS subsystems and architectural issues with the design
constraints.
Text Books:
1. “Basic VLSI Design”- Douglas A. Pucknell& Kamran Eshraghian, PHI 3rd
Edition (original Edition – 1994).
2. “CMOS VLSI Design- A Circuits and Systems Perspective”- Neil H.E. Weste,
David Harris, Ayan Banerjee, 3rd Edition, Pearson Education.
3. “FPGA Based System Design”- Wayne Wolf, Pearson Education, 2004,
Technology and Engineering.
REAL TIME SYSTEMS
SEMESTER – VII (EC/TC)

Lecture
Hours/Week
Lecture Hours
Credits – 03
Course Objectives: This Course will enable students to:
 Discuss the historical background of Real-time systems and its

classifications.
 Describe the concepts of computer control and hardware components
for Real-Time Application.
 Discuss the languages to develop software for Real-Time Applications.
 Explain the concepts of operating system and RTS development
methodologies.
Module-1
Introduction to Real-Time Systems: Historical background, Elements of a

Computer Control System, RTS- Definition, Classification of Real-time
Systems, Time Constraints, Classification of Programs.
Concepts of Computer Control: Introduction, Sequence Control, Loop
Control, Supervisory Control, Centralized Computer Control, Hierarchical
Systems. (Text Book: 1.1 to 1.6 and 2.1 to 2.6) L1, L2
Module-2
Computer Hardware Requirements for Real-Time Applications:

Introduction, General Purpose Computer, Single Chip Microcomputers and
Microcontrollers, Specialized Processors, Process-Related Interfaces, Data
Transfer Techniques, Communications, Standard Interface.(Text Book: 3.1 to
3.8) L1, L2
Module-3
Languages for Real-Time Applications: Introduction, Syntax Layout and

Readability, Declaration and Initialization of Variables and Constants,
Modularity and Variables, Compilation of Modular Programs, Data types,
Control Structures, Exception Handling, Low-level facilities, Co-routines,
Interrupts and Device Handling, Concurrency, Real-Time Support, Overview
of Real-Time Languages. (Text Book: 5.1 to 5.14) L1, L2, L3
Module-4
Operating Systems: Introduction, Real-Time Multi-Tasking OS, Scheduling

Strategies, Priority Structures, Task Management, Scheduler and Real-Time
Clock Interrupt Handler, Memory Management, Code Sharing, Resource
Control, Task Co-Operation and Communication, Mutual Exclusion.(Text
Book: 6.1 to 6.11) L1, L2
Module-5
Design of RTS – General Introduction: Introduction, Specification

Document, Preliminary Design, Single-Program Approach,
Foreground/Background System.
RTS Development Methodologies: Introduction, Yourdon Methodology,
Ward and Mellor Method, Hately and Pirbhai Method. (Text Book: 7.1 to 7.5
and 8.1, 8.2, 8.4,8.5)
L1, L2, L3
Course Outcomes: At the end of the course, students should be able to:
 Understand the fundamentals of Real time systems and its

classifications.
 Understand the concepts of computer control, operating system and
the suitable computer hardware requirements for real-time
applications.
 Develop the software languages to meet Real time applications.
 Apply suitable methodologies to design and develop Real-Time
Systems.
Text Book:
Real-Time Computer Control, by Stuart Bennet, 2nd Edn. Pearson
Education. 2008.
Reference Books:
1. C.M. Krishna, Kang G. Shin, “Real –Time Systems”, McGraw –Hill
International Editions, 1997.
2. Real-Time Systems Design and Analysis, Phillip. A. Laplante, second
edition, PHI, 2005.
3. Embedded Systems, Raj Kamal, Tata McGraw Hill, India, third edition,
2005.
OBJECT ORIENTED PROGRAMMING USING C++

Hours/Week
Total Number of 40 (08 Hrs/ Module Exam Hours 03
Lecture Hours
CREDITS – 03
 Define Encapsulation, Inheritance and Polymorphism.
 Solve the problem with object oriented approach.
 Analyze the problem statement and build object oriented system model.
 Describe the characters and behavior of the objects that comprise a system.
 Explain function overloading, operator overloading and virtual functions.
 Discuss the advantages of object oriented programming over procedure oriented
programming.
Module -1
Beginning with C++ and its features:

What is C++?, Applications and structure of C++ program, Different Data types,
Variables, Different Operators, expressions, operator overloading and control
structures in C++ (Topics from Ch -2,3 of Text). L1, L2
Module -2
Functions, classes and Objects:
Functions, Inline function, function overloading, friend and virtual functions,
Specifying a class, C++ program with a class, arrays within a class, memory
allocation to objects, array of objects, members, pointers to members and member
functions (Selected Topics from Chap-4,5 of Text). L1, L2, L3
Module -3
Constructors, Destructors and Operator overloading: Constructors, Multiple
constructors in a class, Copy constructor, Dynamic constructor, Destructors,
Defining operator overloading, Overloading Unary and binary operators,
Manipulation of strings using operators (Selected topics from Chap-6, 7 of Text).
L1, L2, L3
Module -4
Inheritance, Pointers, Virtual Functions, Polymorphism:
Derived Classes, Single, multilevel, multiple inheritance, Pointers to objects and
derived classes, this pointer, Virtual and pure virtual functions (Selected topics
from Chap-8,9 of Text). L1, L2, L3
Module -5
Streams and Working with files: C++ streams and stream classes, formatted and
unformatted I/O operations, Output with manipulators, Classes for file stream
operations, opening and closing a file, EOF (Selected topics from Chap-10, 11 of
Text). L1, L2, L3
 Explain the basics of Object Oriented Programming concepts.
 Apply the object initialization and destroy concept using constructors and
destructors.
 Apply the concept of polymorphism to implement compile time polymorphism
in programs by using overloading methods and operators.
 Use the concept of inheritance to reduce the length of code and evaluate the
usefulness.
 Apply the concept of run time polymorphism by using virtual functions,
overriding functions and abstract class in programs.
 Use I/O operations and file streams in programs.
Text Book:
Object Oriented Programming with C++, E.Balaguruswamy, TMH, 6th Edition,
2013.
Reference Book:
Object Oriented Programming using C++, Robert Lafore, Galgotia publication
2010.
DIGITAL IMAGE PROCESSING
SEMESTER – VII (EC/TC)

Lecture
Hours/Week
Lecture Hours
CREDITS – 03
Course Objectives: The objectives of this course is to Understand:
· The fundamentals of digital image processing.
· Image transforms used in digital image processing.
· Image enhancement techniques used in digital image processing.
· Image restoration techniques and methods used in digital image processing.
 Morphological Operations used in digital image processing.
Modules RBT Level

Module -1
Digital Image Fundamentals: What is Digital Image Processing?, Origins of
Digital Image Processing, Examples of fields that use DIP, Fundamental
L1,L2
Steps in Digital Image Processing, Components of an Image Processing
System, Elements of Visual Perception, Image Sensing and Acquisition
(Text: Chapter 1 and Chapter 2: Sections 2.1 to 2.2, 2.6.2)
Module -2
Image Enhancement in the Spatial Domain: Image Sampling and
Quantization, Some Basic Relationships Between Pixels, Linear and
L1,L2
Nonlinear Operations. Some Basic Intensity Transformation Functions,
Histogram Processing, Fundamentals of Spatial Filtering, Smoothing
Spatial Filters, Sharpening Spatial Filters (Text: Chapter 2: Sections 2.3 to
2.62 , Chapter 3: Sections 3.2 to 3.6)
Module -3
Frequency Domain: Preliminary Concepts, The Discrete Fourier
Transform (DFT) of Two Variables, Properties of the 2-D DFT, Filtering in the
Frequency Domain, Image Smoothing and Image Sharpening Using
Frequency Domain Filters, Selective Filtering. L1,L2
Wavelets: Background, Multiresolution Expansions. (Text: Chapter 4:
Sections 4.2, 4.5 to 4.10 and Chapter 7: Sections 7.1 and 7.2)
Module -4
Restoration: Noise models, Restoration in the Presence of Noise Only using
Spatial Filtering and Frequency Domain Filtering, Linear, Position- Invariant
degradations, Estimating the Degradation Function, Inverse Filtering, L1,L2
Minimum Mean Square Error (Wiener) Filtering, Constrained Least Squares
Filtering. (Text: Chapter 5: Sections 5.2, to 5.9)
Module -5
Morphological Image Processing: Preliminaries, Erosion and Dilation,
Opening and Closing L1,L2
Color Image Processing: Color Fundamentals, Color Models, Pseudocolor

Image Processing. (Text:, Chapter 6: Sections 6.1 to 6.3 Chapter 9:
Sections 9.1 to 9.3)
Course Outcomes: At the end of the course, students should be able to:
 Understand image formation and the role human visual system plays in perception of
gray and color image data.
 Apply image processing techniques in both the spatial and frequency (Fourier) domains.
 Design and evaluate image analysis techniques
 Conduct independent study and analysis of Image Enhancement and restoration
techniques.

module.
Text Book:
1. Digital Image Processing- Rafel C Gonzalez and Richard E. Woods, PHI 3rd
Edition 2010.
Reference Books:
1. Digital Image Processing- S.Jayaraman, S.Esakkirajan, T.Veerakumar, Tata McGraw
Hill 2014.
2. Fundamentals of Digital Image Processing-A. K. Jain, Pearson 2004.
LOW POWER MICROCNTROLLER

Hours/Week
Lecture Hours
CREDITS – 03
 Understand the architectural features and instruction set of 16 bit microcontroller
MSP430.
 Program MSP430 using the various instructions for different applications.
 Understand the functions of the various peripherals which are interfaced with
MSP430.
 Describe the power saving modes in MSP430.
 Explain the low power applications using MSP430.
Module-1
MSP430 Architecture: Introduction –Where does the MSP430 fit, The outside view, The
inside view-Functional block diagram, Memory, Central Processing Unit, Memory
Mapped Input and Output, Clock Generator, Exceptions: Interrupts and Resets,
MSP430 family.
(Text: Ch1- 1.3 to 1.7, Ch2- 2.1 to 2.7, Ch5- 5.1, 5.7 up to 5.7.1) L1, L2
Module-2
Addressing Modes & Instruction Set-Addressing Modes, Instruction set, Constant
Generator and Emulated Instructions, Program Examples.
(Text: Ch5- 5.2 to 5.5) L1, L2, L3
Module-3
Clock System, Interrupts and Operating Modes-Clock System, Interrupts, What
happens when an interrupted is requested, Interrupt Service Routines, Low Power
Modes of Operation, Watchdog Timer, Basic Timer1, Real Time Clock, Timer-A: Timer
Block, Capture/Compare Channels, Interrupts from Timer-A.
(Text: Ch5 - 5.8 upto 5.8.4, Ch 6-6.6 to 6.8, 6.10, Ch8 -8.1, 8.2, 8.3) L1, L2
Module-4
Analog Input-Output and PWM - Comparator-A, ADC10, ADC12, Sigma-Delta ADC,
Internal Operational Amplifiers, DAC, Edge Aligned PWM, Simple PWM, Design of PWM.
LCD interfacing.
(Text: Ch9 – 9.1 up to 9.1.2, 9.4, 9.5 up to 9.5.1, 9.7, 9.8 up to 9.8.1, 9.11.5, 9.12
(without 9.12.1), 8.6.2 to 8.6.4) L1, L2
Module-5
Digital Input-Output and Serial Communication:
Parallel Ports, Lighting LEDs, Flashing LEDs, Read Input from a Switch, Toggle the LED
state by pressing the push button, LCD interfacing.
Asynchronous Serial Communication, Asynchronous Communication with USCI_A,
Communications, Peripherals in MSP430, Serial Peripheral Interface.
(Text: Selected topics from Ch4 & Ch7 and Ch7- 7.1, Ch10 – 10.1, 10.2, and 10.12)
L1, L2, L3
 Understand the architectural features and instruction set of 16 bit microcontroller

MSP430.
 Develop programs using the various instructions of MSP430 for different
applications.
 Understand the functions of the various peripherals which are interfaced with
MSP430 microcontroller.
 Describe the power saving modes in MSP430.
 Explain the low power applications using MSP430 microcontroller.
Evaluation of CIE Marks:

It is suggested that at least a few simple programs to be executed by students using
any evaluation board of MSP430 for better understanding of the course. This activity
can be considered for the evaluation of 10 marks out of 40 CIE (Continuous Internal
Evaluation) marks, reserved for the other activities.
 The question paper will have ten questions
 Each full question consists of 16 marks.
 There will be 2 full questions (with a maximum of three sub questions) from each
module.
 Each full question will have sub questions covering all the topics under a module
 The students will have to answer 5 full questions, selecting one full question from
each module
Text Book:
John H Davies, MSP430 Microcontroller Basics, Newnes Publications, Elsevier,
2008.
References:
1. Chris Nagy, Embedded Systems Design using TI MSP430 Series, Newnes
Publications, Elsevier, 2003.
2. User Guide from Texas Instruments.
IoT & WIRELESS SENSOR NETWORKS
SEMESTER VII (EC/TC)

Hours/Week
Total Number of Lecture 40 (8 Hours / Exam Hours 03
Hours Module)
CREDITS – 03
 Understand various sources of IoT & M2M communication protocols.
 Describe Cloud computing and design principles of IoT.
 Become aware of MQTT clients, MQTT server and its programming.
 Understand the architecture and design principles of WSNs.
 Enrich the knowledge about MAC and routing protocols in WSNs.
Module-1
Overview of Internet of Things: IoT Conceptual Framework, IoT Architectural View,
Technology Behind IoT, Sources of IoT,M2M communication, Examples of IoT. Modified
OSI Model for the IoT/M2M Systems, data enrichment, data consolidation and device
management at IoT/M2M Gateway, web communication protocols used by connected
IoT/M2M devices, Message communication protocols (CoAP-SMS, CoAP-MQ,
MQTT,XMPP) for IoT/M2M devices. L1, L2
Module-2
Architecture and Design Principles for IoT: Internet connectivity, Internet-based
communication,IPv4, IPv6,6LoWPAN protocol, IP Addressing in the IoT, Application layer
protocols: HTTP, HTTPS,FTP,TELNET and ports.
Data Collection, Storage and Computing using a Cloud Platform: Introduction,

Cloud computing paradigm for data collection, storage and computing, Cloud service
models, IoT Cloud- based data collection, storage and computing services using Nimbits.
L1, L2
Module-3
Prototyping and Designing Software for IoT Applications: Introduction, Prototyping
Embedded device software, Programming Embedded Device Arduino Platform using IDE,
Reading data from sensors and devices, Devices, Gateways, Internet and Web/Cloud
services software development.
Programming MQTT clients and MQTT server. Introduction to IoT privacy and security.
Vulnerabilities, security requirements and threat analysis, IoT Security Tomography and
layered attacker model. L1, L2, L3
Module-4
Overview of Wireless Sensor Networks:
Challenges for Wireless Sensor Networks, Enabling Technologies for Wireless Sensor
Networks.
Architectures: Single-Node Architecture - Hardware Components, Energy Consumption

of Sensor Nodes, Operating Systems and Execution Environments, Network
Architecture-Sensor Network Scenarios, Optimization Goals and Figures of Merit, Design
principles for WSNs, Service interfaces of WSNs Gateway Concepts.
L1, L2, L3
Module-5
Communication Protocols:
Physical Layer and Transceiver Design Considerations, MAC Protocols for Wireless
Sensor Networks, Low Duty Cycle Protocols And Wakeup Concepts - S-MAC , The
Mediation Device Protocol, Wakeup Radio Concepts, Contention based
protocols(CSMA,PAMAS), Schedule based protocols (LEACH, SMACS, TRAMA) Address
and Name Management in WSNs, Assignment of MAC Addresses, Routing Protocols-
Energy-Efficient Routing, Geographic Routing, Hierarchical networks by clustering.
L1, L2, L3
 Describe the OSI Model for the IoT/M2M Systems.

 Understand the architecture and design principles for IoT.
 Learn the programming for IoT Applications.
 Identify the communication protocols which best suits the WSNs.
Text Books:
1. Raj Kamal,”Internet of Things-Architecture and design principles”, McGraw Hill

Education.
2. Holger Karl & Andreas Willig, "Protocols And Architectures for Wireless Sensor
Networks”, John Wiley, 2005.
3. Feng Zhao & Leonidas J. Guibas, “Wireless Sensor Networks- An Information
Processing Approach", Elsevier, 2007.
Reference Books:
1. Kazem Sohraby, Daniel Minoli, & Taieb Znati, “Wireless Sensor Networks-
Technology, Protocols, And Applications”, John Wiley, 2007.
2. Anna Hac, “Wireless Sensor Network Designs”, John Wiley, 2003.
SATELLITE COMMUNICATION
SEMESTER VII (EC/TC)

Number of Lecture 03 SIE Marks 60
Hours/Week
CREDITS – 03
Course Objectives: This course will enable students to
 Understand the basic principle of satellite orbits and trajectories.

 Study of electronic systems associated with a satellite and the earth station.
 Understand the various technologies associated with the satellite communication.
 Focus on a communication satellite and the national satellite system.
 Study of satellite applications focusing various domains services such as remote
sensing, weather forecasting and navigation.
Module-1 RBT Level
Module-1 L1, L2
Introduction: Evolution of Satellite: Launch of Early Artificial Satellites,

Satellites for Communications, Meteorology and Scientific, Non-
geosynchronous Communication Satellites, Emergence of Geosynchronous
Communication Satellites, Evolution of Launch Vehicles (Chap. 1)
Satellite Orbits and Trajectories: Definition, Basic Principles, Orbital

parameters, Injection velocity and satellite trajectory, Types of Satellite orbits,
Satellite Launch Sequence: Types of Launch Sequence, Launch Vehicles,
Orbital perturbations, Satellite stabilization (Chap. 2, Chap. 3)
Module-2
Orbital effects on satellite’s performance, Eclipses, Look angles, Earth L1, L2,
Coverage and Ground tracks (Chap. 3) L3
Satellite Link Design Fundamentals: Transmission Equation, Satellite Link

Parameters, Propagation considerations, Noise considerations, Interference
Related problems, Antenna Gain-To-noise temperature ratio, Link design.
(Chap. 7)
Module-3
Satellite subsystem: Power supply subsystem, Attitude and Orbit control, L1, L2,
Tracking, Telemetry and command subsystem, Payload.(Chap. 4) L3
Earth Station: Types of earth station, Architecture, Design considerations,

Earth Station testing, Earth station Hardware, Satellite tracking. (Chap. 8)
Module-4
Multiple Access Techniques: Introduction, FDMA , SCPC Systems, MCPC L1, L2
Systems, TDMA,TDMA frame structure, Burst structure, Frame Acquisition
and Synchronization, FDMA vs. TDMA, CDMA, SDMA.(Chap.6)
Communication Satellites: Introduction, Related Applications, Frequency

Bands, Payloads, Satellite Vs. Terrestrial Networks, Satellite Telephony,
Satellite Television, Satellite radio, Satellite data communication services
(Chap.9)
Module-5
Important Missions: International, Regional and National Satellite systems L1, L2
(Chap.9)
Remote Sensing Satellites: Classification of remote sensing systems, orbits,

Payloads, Types of images, Applications. Weather Forecasting Satellites:
Fundamentals, Images, Orbits, Payloads, Applications. Navigation
Satellites: Development of Satellite Navigation Systems, GPS system,
Applications. (Chap.10)
 Understand the satellite orbits and its trajectories with the definitions of parameters
associated with it.
 Understand the different multiple access techniques used in satellite communication
 Describe the electronic hardware systems associated with the satellite subsystem
and earth station.
 Describe the various applications of satellite with the focus on national satellite
system.
 Compute the satellite link parameters under various propagation conditions
Question Paper pattern:
module.
module.
Text Book:
Anil K. Maini, Varsha Agrawal, Satellite Communications, Wiley India Pvt. Ltd.,
2015, ISBN: 978-81-265-2071-8.
Reference Books :
1. Dennis Roddy, Satellite Communications, 4th Edition, McGraw- Hill International
edition, 2006
2. Timothy Pratt, Charles Bostian, Jeremy Allnutt, Satellite Communications, 2nd
Edition, Wiley India Pvt. Ltd , 2017, ISBN: 978-81-265-0833-4.
MULTIMEDIA COMMUNICATION
VII Semester EC/TC

Number of 03 Exam Marks 60
Lecture
Hours/Week
Lecture Hours
CREDITS – 03
Course Objectives: The objectives of this course is to Understand:
 The importance of multimedia in today’s online and offline information sources and
repositories.
 How Text, Audio, Image and Video information can be represented digitally in a
computer so that it can be processed, transmitted and stored efficiently.
· Multimedia Transport in Wireless Networks
· Real-time multimedia network applications.
· Different network layer based application.
Revised
Bloom’s
Modules Taxonomy
(RBT) Level
Module -1
Multimedia Communications: Introduction, Multimedia information
representation, multimedia networks, multimedia applications, Application
L1,L2
and networking terminology. (Chap 1 of Text 1)
Module -2
Information Representation: Introduction, Digitization principles, Text, L1,L2
Images, Audio and Video. (Chap 2 of Text 1)
Module -3
Text and Image Compression: Introduction, Compression principles, text
compression, image Compression. (Chap 3 of Text 1)
Distributed Multimedia Systems: Introduction, main Features of a DMS,

L1,L2
Resource management of DMS, Networking, Multimedia operating systems.
(Chap. 4 - Sections 4.1 to 4.5 of Text 2)
Module -4
Audio and video compression: Introduction, Audio compression, video
compression, video compression principles, video compression.(Chap. 4 of L1,L2
Text 1)
Module -5
Multimedia Information Networks: Introduction, LANs, Ethernet, Token
ring, Bridges, FDDI High-speed LANs, LAN protocol (Chap. 8 of Text 1). L1,L2
The Internet: Introduction, IP Datagrams, Fragmentation, IP Address, ARP

and RARP, QoS Support, IPv8. (Chap. 9 of Text 1)
 Understand basics of different multimedia networks and applications.
 Understand different compression techniques to compress audio and video.
 Describe multimedia Communication across Networks.
 Analyse different media types to represent them in digital form.
 Compress different types of text and images using different compression techniques.

module.
Text Book:
1. Multimedia Communications- Fred Halsall, Pearson Education, 2001, ISBN -
9788131709948.
2. Multimedia Communication Systems- K. R. Rao, Zoran S. Bojkovic, Dragorad A.
Milovanovic, Pearson Education, 2004. ISBN -9788120321458
Reference Books:
Multimedia: Computing, Communications and Applications- Raifsteinmetz, Klara
Nahrstedt, Pearson Education, 2002. ISBN -978817758
NETWORK SECURITY
VII Semester EC/TC

Number of 03 Exam Marks 60
Lecture
Hours/Week
Lecture Hours
CREDITS – 03
Revised
Bloom’s
Modules
Taxonomy
(RBT) Level
Module -1
Module -1: Attacks on Computers and Computer Security: Need for
Security, Security Approaches, Principles of Security Types of Attacks. L1,L2
(Chapter 1 Text 2)
Module -2
Module 2 : Transport Level Security: Web Security Considerations, L1,L2
Secure Sockets Layer, Transport Layer Security, HTTPS, Secure Shell
(SSH) (Text 1: Chapter 15)
Module -3
Module 3: IP Security: Overview of IP Security (IPSec), IP Security
Architecture, Modes of Operation, Security Associations (SA), Authentication
Header (AH), Encapsulating Security Payload (ESP), Internet Key Exchange.
(Chapter 19 Text 1) L1,L2
Module -4
Module 4: Intruders, Intrusion Detection. (Chapter 20 Text 1)
L1,L2
MALICIOUS SOFTWARE: Viruses and Related Threats, Virus
Countermeasures, (Chapter 21 Text 1)
Module -5
Module 5: Firewalls: The Need for firewalls, Firewall Characteristics, Types of
Firewalls, Firewall Biasing, Firewall location and configuration (Chapter 22 L1,L2
Text 1)
module.
TEXT BOOK:
1. Cryptography and Network Security Principles and Practice‖, Pearson Education Inc.,
William Stallings, 5th Edition, 2014, ISBN: 978-81-317- 6166-3.
2. Cryptography and Network Security, Atul Kahate, TMH, 2003.
REFERENCE BOOKS
1. Cryptography and Network Security, Behrouz A. Forouzan, TMH, 2007.
ADVANCED COMMUNICATION LAB
B.E., VII Semester, Electronics & Communication Engineering

CREDITS – 02
 Design and demonstrate the digital modulation techniques
 Demonstrate and measure the wave propagation in microstrip antennas
 Characteristics of microstrip devices and measurement of its parameters.
 Model an optical communication system and study its characteristics.
 Simulate the digital communication concepts and compute and display various
parameters along with plots/figures.
PART-A: Following Experiments No. 1 to 4 has to be performed using discrete
components.
1. Time Division Multiplexing and Demultiplexing of two bandlimited signals.

2. ASK generation and detection
3. FSK generation and detection
4. PSK generation and detection
5. Measurement of frequency, guide wavelength, power, VSWR and attenuation in
microwave test bench.
6. Measurement of directivity and gain of microstrip dipole and Yagi antennas.
7. Determination of
a. Coupling and isolation characteristics of microstrip directional coupler.
b. Resonance characteristics of microstrip ring resonator and computation of
dielectric constant of the substrate.
c. Power division and isolation of microstrip power divider.
8. Measurement of propagation loss, bending loss and numerical aperture of an
optical fiber.
PART-B: Simulation Experiments using SCILAB/MATLAB/Simulink or LabView
1. Simulate NRZ, RZ, half-sinusoid and raised cosine pulses and generate eye
diagram for binary polar signaling.
2. Simulate the Pulse code modulation and demodulation system and display the
waveforms.
3. Simulate the QPSK transmitter and receiver. Plot the signals and its constellation
diagram.
4. Test the performance of a binary differential phase shift keying system by
simulating the non-coherent detection of binary DPSK.
5. DTMF encoder and decoder.
able to:
 Determine the characteristics and response of microwave devices and optical
waveguide.
 Determine the characteristics of microstrip antennas and devices and compute the
parameters associated with it.
 Simulate the digital modulation schemes with the display of waveforms and
computation of performance parameters.
 Design and test the digital modulation circuits/systems and display the waveforms.
 All laboratory experiments are to be considered for practical examination.
 For examination one question from PART-A and one question from PART-B or only
one question from PART-B experiments based on the complexity, to be set.
breakup of marks.
 Change of experiment is allowed only once and Marks allotted to the procedure part to
be made zero.
VLSI LAB
B.E., VII Semester, Electronics & Communication Engineering
Lecture + 02 Hours Laboratory = 03
Hours/Week
RBT Levels L1, L2, L3 Exam 03
Hours
CREDITS – 02
 Explore the CAD tool and understand the flow of the Full Custom IC
design cycle.
 Learn DRC, LVS and Parasitic Extraction of the various designs.
 Design and simulate the various basic CMOS analog circuits and use
them in higher circuits like data converters using design abstraction
concepts.
 Design and simulate the various basic CMOS digital circuits and use
them in higher circuits like adders and shift registers using design
abstraction concepts.
Experiments can be conducted using any of the following or equivalent
design tools: Cadence/Synopsis/Mentor Graphics/Microwind
PART – A
ASIC-DIGITAL DESIGN
1. Write Verilog Code for the following circuits and their Test Bench for
verification, observe the waveform and synthesize the code with
technological library with given constraints*. Do the initial timing
verification with gate level simulation.
i. An inverter
ii. A Buffer
iii. Transmission Gate
iv. Basic/universal gates
v. Flip flop -RS, D, JK, MS, T
vi. Serial & Parallel adder
vii. 4-bit counter [Synchronous and Asynchronous counter]
viii. Successive approximation register [SAR]
PART - B
ANALOG DESIGN
1. Design an Inverter with given specifications**, completing the design

flow mentioned below:
a. Draw the schematic and verify the following
i) DC Analysis
ii) Transient Analysis
b. Draw the Layout and verify the DRC, ERC
c. Check for LVS
d. Extract RC and back annotate the same and verify the Design
e. Verify & Optimize for Time, Power and Area to the given constraint*
2. Design the (i) Common source and Common Drain amplifier and (ii) A
Single Stage differential amplifier, with given specifications**,
completing the design flow mentioned below:
i) DC Analysis
ii) AC Analysis
iii) Transient Analysis
c. Check for LVS
d. Extract RC and back annotate the same and verify the Design.
3. Design an op-amp with given specification** using given differential
amplifier Common source and Common Drain amplifier in library***
and completing the design flow mentioned below:
i) DC Analysis
ii). AC Analysis
c. Check for LVS
d. Extract RC and back annotate the same and verify the Design.
4. Design a 4 bit R-2R based DAC for the given specification and
completing the design flow mentioned using given op-amp in the
library***.
i) DC Analysis
ii) AC Analysis
5. For the SAR based ADC mentioned in the figure below draw the
mixed signal schematic and verify the functionality by completing
ASIC Design FLOW.
[Specifications to GDS-II]
* An appropriate constraint should be given.

** Appropriate specification should be given.
*** Applicable Library should be added & information should be given to the
Designer.
Course outcomes: On the completion of this laboratory course, the students
will be able to:
 Write test bench to simulate various digital circuits.
 Interpret concepts of DC Analysis, AC Analysis and Transient Analysis in
analog circuits.
 Design and simulate basic CMOS circuits like inverter, common source
amplifier and differential amplifiers.
 Use basic amplifiers and further design higher level circuits like
operational amplifier and analog/digital converters to meet desired
parameters.
 Use transistors to design gates and further using gates realize shift
Conductregisters and adders
of Practical to meet desired parameters.
Examination:
 For examination, one question from PART-A and one question from
PART-B to be set.
 Change of experiment is allowed only once and Marks allotted to the
procedure part to be made zero.
OPEN ELECTIVE-B OFFERED BY EC/TC BOARD
MICRO ELECTRO MECHANICAL SYSTEMS
B.E., VII Semester Open Elective-B
Course Code 18xxEC75x CIE Marks 40

Hours/Week
Lecture Hours
CREDITS – 03
 Understand overview of microsystems, their fabrication and
application areas.
 Working principles of several MEMS devices.
 Develop mathematical and analytical models of MEMS devices.
 Know methods to fabricate MEMS devices.
 Various application areas where MEMS devices can be used.
Module 1
Overview of MEMS and Microsystems: MEMS and Microsystem, Typical
MEMS and Microsystems Products, Evolution of Microfabrication,
Microsystems and Microelectronics, Multidisciplinary Nature of
Microsystems, Miniaturization. Applications and Markets. L1, L2
Module 2
Working Principles of Microsystems: Introduction, Microsensors,
Microactuation, MEMS with Microactuators, Microaccelerometers,
Microfluidics.
Engineering Science for Microsystems Design and Fabrication:

Introduction, Molecular Theory of Matter and Inter-molecular Forces,
Plasma Physics, Electrochemistry. L1, L2
Module 3
Engineering Mechanics for Microsystems Design: Introduction, Static
Bending of Thin Plates, Mechanical Vibration, Thermomechanics, Fracture
Mechanics, Thin Film Mechanics, Overview on Finite Element Stress
Analysis. L1, L2, L3
Module 4
Scaling Laws in Miniaturization: Introduction, Scaling in Geometry,
Scaling in Rigid-Body Dynamics, Scaling in Electrostatic Forces, Scaling in
Fluid Mechanics, Scaling in Heat Transfer. L1, L2, L3
Module 5
Overview of Micromanufacturing: Introduction, Bulk
Micromanufacturing, Surface Micromachining, The LIGA Process,
Summary on Micromanufacturing. L1, L2
 Appreciate the technologies related to Micro Electro Mechanical
Systems.
 Understand design and fabrication processes involved with MEMS
devices.
 Analyse the MEMS devices and develop suitable mathematical models
 Know various application areas for MEMS device
Text Book:
Tai-Ran Hsu, MEMS and Micro systems: Design, Manufacture and
Nanoscale Engineering, 2nd Ed, Wiley.
Reference Books:
1. Hans H. Gatzen, Volker Saile, JurgLeuthold, Micro and Nano
Fabrication: Tools and Processes, Springer, 2015.
2. Dilip Kumar Bhattacharya, Brajesh Kumar Kaushik,
Microelectromechanical Systems (MEMS), Cenage Learning.
B.E EIGHT SEMESTER SYLLABUS
Wireless Communications
SEMESTER – VIII (EC)
Course Code: 18EC81 CIE Marks: 40

No. of Hrs/Week: 03 SEE Marks: 60
Credits: 03 SEE Duration: 03 Hours
Course Learning Objectives:
Understand the concepts of propagation mechanisms in wireless channels
1
from a physics standpoint
Analyse propagation model for simple channels involving two paths only
2
using concepts studied from physics.
Develop a statistical model for practical channels involving multiplicity of
3
propagation paths and its application in a cellular scenario.
Application of Communication theory both Physical and networking to
4
understand GSM and CDMA systems that handle mobile telephony.
Module-1
Mobile Radio Propagation – Large Scale Path Loss 8

Hrs
Introduction, Free Space Propagation Model, Relating Power to Electric
Field, Three Basic Propagation Mechanisms – Reflection (Ground
Reflection), Diffraction, Scattering, Practical Link Budget, Outdoor
Propagation Models(Okumura – Hata Model only).
(Chapter 4.1 – 4.10, Text 1)
Module-2
Mobile Radio Propagation – Small Scale Fading and Multipath 8
Small Scale Multipath Propagation, Impulse Response of Multipath Hrs
Channel, Small Scale Multipath Measurements, Parameters of Mobile
Multipath Channels, Types of Small scale Fading, Rayleigh and Rician
Distributions, Statistical Models for Multipath Fading Channels.
(Chapter 5.1 – 5.7, Text 1)
The Cellular Concept – System Design Fundamentals
Frequency Reuse, Channel Assignment Strategies, Handoff Strategies,
Interference and System Capacity. Trunking and Grade of Service.
(Chapter 3.2 – 3.6, Text 1)
Module-3
Multiple Access Techniques for Wireless Communications 8

Introduction to Multi Access, Frequency Division Multi Access, Time Hrs
Division Multi Access, Spread Spectrum Multi Access, Space Division
Multi Access, Packet Radio, Capacity of Cellular systems.
(Chapter 9.1 – 9.7 , Text 1)
Improving Coverage and Capacity in Cellular Systems (3.7, Text 1)
Module-4
GSM – Global System for Mobile Communications: Historical Overview; 8

System Overview – (Base Station Subsystem, Network and Switching Hrs
Subsystem, Operating Support System), The Air Interface, Logical and
Physical Channels – (Logical Channels, Mapping Between Logical and
Physical Channels); Synchronization – (Frequency Synchronization, Time
Synchronization, Timing Advance, Summary of Burst Structures); Coding
– (Voice Encoding, Channel Encoding, Cryptography, Frequency
Hopping); Equalizer, Circuit-Switched Data Transmission – (Establishing
a Connection and Handover, Identity Numbers, Identification of a Mobile
Subscriber, Examples for Establishment of a Connection, Examples of
Different Kinds of Handovers); Services and Billing – (Available Services,
Billing). General Packet Radio Service. (Chapter 24, Text 2)
Module-5
IS-95 and CDMA 2000 : System Overview, Air Interface – (Frequency 8

Bands and Duplexing, Spreading and Modulation, Power Control, Pilot Hrs
Signal), Coding – (Speech Coders, Error Correction Coding), Spreading
and Modulation –( Long and Short Spreading Codes and Walsh Codes,
Spreading and Modulation in the Uplink, Databurst Randomization and
Gating for the Uplink, Spreading and Modulation in the Downlink),
Logical and Physical Channels – (Traffic Channels, Access Channel, Pilot
Channels, Synchronization Channel, Paging Channel, Power Control
Subchannel, Mapping Logical Channels to Physical Channels), Handover.
CDMA 2000 –History, 1x Mode, 3x Mode, 1xEV-DO (Chapter 25, Text 2)
Course Outcomes: After completing the course, the students will be able to
1 Explain concepts of propagation mechanisms like Reflection, Diffraction,
Scattering in wireless channels.
2 Analyse signal received levels for simple channels involving two paths only
and multipath propagation channels in a specific cellular scenario.
3 Develop a scheme for idle mode, call set up, call progress handling and call
tear down in a GSM cellular network.
Develop a scheme for idle mode, call set up, call progress handling and call
tear down in a CDMA cellular network.
Text Book
1. “Wireless Communications: Principles and Practice” Theodore
Rappaport, 2nd Edition, Prentice Hall Communications Engineering and
Emerging Technologies Series, 2002, ISBN 0-13-042232-0.
2. “Wireless Communications”, Andreas F Molisch, 2nd Edition, John Wiley
and Sons, 2011, ISBN: ISBN: 9780470741870 (H/B), ISBN:
9780470741863 (P/B)
CRYPTOGRAPHY
SEMESTER – VIII (EC/TC)

Subject Code 18EC821
) Scheme CII Marks 40
Lecture
Hours/Week
Total Number of 40 (8 Hours per Module) Exam 03
Lecture Hours Hours
CREDITS – 03
Course Objectives:
1. To enable students to understand the basics of symmetric key and public
key cryptography.
2. To equip students with some basic mathematical concepts and
pseudorandom number generators required for cryptography.
3. To enable students to authenticate and protect the encrypted data
4. To enrich knowledge about TLS and Web security
Modules
Module 1
Classical Encryption Techniques: Symmetric cipher model, Substitution
techniques, Transposition techniques (Text 1: Chapter 1)
Basic Concepts of Number Theory and Finite Fields: Euclidean algorithm,
Modular arithmetic (Text 1: Chapter 3)
Module 2
SYMMETRIC CIPHERS: Traditional Block Cipher structure, Data encryption
standard (DES), The AES Cipher. (Text 1: Chapter 2: Section1, 2, Chapter 4:
Section 2, 3, 4)
Module 3
Basic Concepts of Number Theory and Finite Fields: Groups, Rings and
Fields, Finite fields of the form GF(p), Prime Numbers, Fermat’s and Euler’s
theorem, discrete logarithm. (Text 1: Chapter 3 and Chapter 7: Section 1, 2, 5)
Module 4
ASYMMETRIC CIPHERS: Principles of Public-Key Cryptosystems, The RSA
algorithm, Diffie - Hellman Key Exchange, Elliptic Curve Arithmetic, Elliptic
Curve Cryptography (Text 1: Chapter 8, Chapter 9: Section 1, 3, 4)
Module 5
Pseudo-Random-Sequence Generators and Stream Ciphers:
Linear Congruential Generators, Linear Feedback Shift Registers, Design and
analysis of stream ciphers, Stream ciphers using LFSRs, A5, Hughes
XPD/KPD, Nanoteq, Rambutan, Additive generators, Gifford, Algorithm M,
PKZIP (Text 2: Chapter 16)
1. Use basic cryptographic algorithms to encrypt the data.
2. Generate some pseudorandom numbers required for cryptographic
applications.
3. Provide authentication and protection for encrypted data.

The question paper will have 10 full questions carrying equal marks.
Each full question consists of 16 marks with a maximum of four sub
questions.
There will be 2 full questions from each module covering all the topics
of the module
The students will have to answer 5 full questions, selecting one full
question from each module.
Text Books:
1. William Stallings , “Cryptography and Network Security Principles and
Practice”, Pearson Education Inc., 6th Edition, 2014, ISBN: 978-93-325-
1877-3
2. Bruce Schneier, “Applied Cryptography Protocols, Algorithms, and
Source code in C”, Wiley Publications, 2nd Edition, ISBN: 9971-51-348-X
Reference Books:
1. Cryptography and Network Security, Behrouz A. Forouzan, TMH, 2007.
2. Cryptography and Network Security, Atul Kahate, TMH, 2003.
OPTICAL COMMUNICATION NETWORKS

Number of Lecture
3 SEE Marks 60
Hours/Week
Total Number of 40 (8 Hours /
Exam Hours 03
CREDITS – 03
 Learn the basic principle of optical fiber communication with different
modes of light propagation.
 Understand the transmission characteristics and losses in optical fiber.
 Study of optical components and its applications in optical communication
networks.
 Learn the network standards in optical fiber and understand the network
architectures along with its functionalities.
Module -1 RBT Level

Optical fiber Communications: Historical development, The L1, L2
general system, Advantages of optical fiber communication,
Optical fiber waveguides: Ray theory transmission, Modes in
planar guide, Phase and group velocity, Cylindrical fiber: Modes,
Step index fibers, Graded index fibers, Single mode fibers,
Cutoff wavelength, Mode field diameter, effective refractive
index. Fiber Materials, Photonic crystal fibers. (Text 2)
Module -2
Transmission characteristics of optical fiber: Attenuation, L1, L2
Material absorption losses, Linear scattering losses, Nonlinear
scattering losses, Fiber bend loss, Dispersion, Chromatic
dispersion, Intermodal dispersion: Multimode step index fiber.
Optical Fiber Connectors: Fiber alignment and joint loss, Fiber

splices: Fusion Splices, Mechanical splices, Fiber connectors:
Cylindrical ferrule connectors, Duplex and Multiple fiber
connectors, Fiber couplers: three and four port couplers, star
couplers, Optical Isolators and Circulators.(Text 2)
Module -3
Optical sources: Light Emitting diodes: LED Structures, Light L1, L2
Source Materials, Quantum Efficiency and LED Power,
Modulation. Laser Diodes: Modes and Threshold conditions,
Rate equation, External Quantum Efficiency, Resonant
frequencies.
Photodetectors: Physical principles of Photodiodes,
Photodetector noise, Detector response time.
Optical Receiver: Optical Receiver Operation: Error sources,
Front End Amplifiers, Receiver sensitivity, Quantum Limit. (Text
1)
Module -4
WDM Concepts and Components: Overview of WDM: L1, L2
Operational Principles of WDM, WDM standards, Mach-Zehnder
Interferometer Multiplexers, Isolators and Circulators, Fiber
grating filters, Dielectric Thin-Film Filters, Diffraction Gratings.
Optical amplifiers: Basic application and Types, Semiconductor
optical amplifiers, Erbium Doped Fiber Amplifiers, Raman
Amplifiers, Wideband Optical Amplifiers. (Text 1)
Module -5
Optical Networks: Optical network evolution and concepts: L1, L2
Optical networking terminology, Optical network node and
switching elements, Wavelength division multiplexed networks,
Public telecommunication network overview. Optical network
transmission modes, layers and protocols: Synchronous
networks, Asynchronous transfer mode, OSI reference model,
Optical transport network, Internet protocol, Wavelength routing
networks: Routing and wavelength assignment, Optical
switching networks: Optical circuit switched networks, packet
switched networks, Multiprotocol Label Switching, Optical burst
switching networks.(Text 2)
1. Classification and working of optical fiber with different modes of signal
propagation.
2. Describe the transmission characteristics and losses in optical fiber
communication.
3. Describe the construction and working principle of optical connectors,
multiplexers and amplifiers.
4. Describe the constructional features and the characteristics of optical
sources and detectors.
5. Illustrate the networking aspects of optical fiber and describe various
standards associated with it.

 Examination will be conducted for 100 marks with question paper
containing 10 full questions, each of 20 marks.
 There will be 2 full questions from each module covering all the topics of
the module.
 Students will have to answer 5 full questions, selecting one full question
from each module.
 The total marks will be proportionally reduced to 60 marks as SEE
marks is 60.
Text Books:
1. Gerd Keiser , Optical Fiber Communication, 5th Edition, McGraw Hill
Education(India) Private Limited, 2015. ISBN:1-25-900687-5.
2. John M Senior, Optical Fiber Communications, Principles and Practice, 3rd
Edition, Pearson Education, 2010, ISBN:978-81-317-3266-3
Reference Book:
Joseph C Palais, Fiber Optic Communication, Pearson Education, 2005,
ISBN:0130085103.
ADVANCED CELLULAR COMMUNICATION

Lecture
Hours/Week
Total Number of 40Lecture
(08 Hours
Hours
/ Module) Exam Hours 03
CREDITS – 03
 Understand the basics of LTE standardization phases and

specifications.
 Explain the system architecture of LTE and E-UTRAN, the layer of LTE,
based on the use of OFDMA and SC-FDMA principles.
 Analyze the role of LTE radio interface protocols to set up, reconfigure
and release the Radio Bearer, for transferring the EPS bearer.
 Analyze the main factors affecting LTE performance including mobile
speed and transmission bandwidth.
Module – 1
Key Enablers for LTE features: OFDM, Single carrier FDMA, Single
carrier FDE, Channel Dependent Multiuser Resource Scheduling, Multi
antenna Techniques, IP based Flat network Architecture, LTE Network
Architecture. (Sec 1.4- 1.5 of Text).
Wireless Fundamentals: Cellular concept, Broadband wireless channel

(BWC), Fading in BWC, Modeling BWC – Empirical and Statistical models,
Mitigation of Narrow band and Broadband Fading (Sec 2.2 – 2.7of Text).
L1, L2
Module – 2
Multicarrier Modulation: OFDM basics, OFDM in LTE, Timing and
Frequency Synchronization, PAR, SC-FDE (Sec 3.2 – 3.6 of Text).
OFDMA and SC-FDMA:OFDM with FDMA,TDMA,CDMA, OFDMA, SC-

FDMA, OFDMA and SC-FDMA in LTE (Sec 4.1 – 4.3, 4.5 of Text).
Multiple Antenna Transmission and Reception: Spatial Diversity

overview, Receive Diversity, Transmit Diversity, Interference cancellation
and signal enhancement, Spatial Multiplexing, Choice between Diversity,
Interference suppression and Spatial Multiplexing (Sec 5.1 – 5.6 of Text).
L1, L2
Module – 3
Overview and Channel Structure of LTE: Introduction to LTE, Channel
Structure of LTE, Downlink OFDMA Radio Resource, Uplink SC-FDMA
Radio Resource(Sec 6.1 – 6.4 of Text).
Downlink Transport Channel Processing: Overview, Downlink shared

channels, Downlink Control Channels, Broadcast channels, Multicast
channels, Downlink physical channels, H-ARQ on Downlink(Sec 7.1 – 7.7
of Text). L1, L2
Module – 4
Uplink Channel Transport Processing: Overview, Uplink shared
channels, Uplink Control Information, Uplink Reference signals, Random
Access Channels, H-ARQ on uplink (Sec 8.1 – 8.6 of Text).
Physical Layer Procedures: Hybrid – ARQ procedures, Channel Quality

Indicator CQI feedback, Precoder for closed loop MIMO Operations, Uplink
channel sounding, Buffer status Reporting in uplink, Scheduling and
Resource Allocation, Cell Search, Random Access Procedures, Power
Control in uplink(Sec 9.1- 9.6, 9.8, 9.9, 9.10 Text). L1, L2
Module – 5
Radio Resource Management and Mobility Management:
PDCP overview, MAC/RLC overview, RRC overview, Mobility Management

(Sec 10.1 – 10.4 of Text). L1, L2
 Understand the system architecture and the functional standard

specified in LTE 4G.
 Analyze the role of LTE radio interface protocols and EPS Data
convergence protocols to set up, reconfigure and release data and voice
from users.
 Demonstrate the UTRAN and EPS handling processes from set up to
release including mobility management for a variety of data call
scenarios.
 Test and Evaluate the Performance of resource management and packet
data processing and transport algorithms.
Text Book:
Arunabha Ghosh, Jan Zhang, Jefferey Andrews, Riaz Mohammed,
‘Fundamentals of LTE’, Prentice Hall, Communications Engg. and Emerging
Technologies.
Reference Books:
1. LTE for UMTS Evolution to LTE-Advanced’ Harri Holma and Antti
Toskala, Second Edition - 2011, John Wiley & Sons, Ltd. Print
ISBN: 9780470660003.
2. ‘EVOLVED PACKET SYSTEM (EPS) ; THE LTE AND SAE
EVOLUTION OF 3G UMTS’ by Pierre Lescuyer and Thierry
Lucidarme, 2008, John Wiley & Sons, Ltd. Print ISBN:978-0-470-
05976-0.
3. ‘LTE – The UMTS Long Term Evolution ; From Theory to Practice’ by
Stefania Sesia, Issam Toufik, and Matthew Baker, 2009 John Wiley &
Sons Ltd, ISBN 978-0-470-69716-0.

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1

VISVESVARAYA TECHNOLOGICAL UNIVERSITY

3rd to 8th Semester BE- Electronics & Communication Scheme of

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

Note: PCC: Professional Core, HSMC: Humanity and Social Science.

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

Note: PCC: Professional Core, PEC: Professional Elective.

B.E., III Semester, Electronics & Communication Engineering /

SEMESTER – III (EC/TC)

[As per Choice Based Credit System (CBCS) Scheme]

Number of Lecture 3 + 2 (Tutorial) SEE Marks 60

Course Objectives: This course will enable students to:

1. Understand the basics of semiconductor physics and electronic devices.

Semiconductor and p-n Junctions L1,L2

Bonding forces in solids, Energy bands, Metals, Semiconductors and

Bipolar Junction Transistor L1,L2

Fundamentals of BJT operation, Amplification with BJTS, BJT Fabrication,

Field Effect Transistors L1,L2

Basic pn JFET Operation, MESFET operation, MOSFET, Two terminal

Optoelectronic Devices L1,L2

Photodiodes: Current and Voltage in an Illuminated Junction, Solar Cells,

High Power devices: The P-N-P-N Diode, Insulated Gate Bipolar

Nanoelectronic Devices: Zero Dimensional Quantum Dots, One

Fabrication of p-n junctions-Thermal Oxidation, Diffusion, Rapid L1,L2

Integrated Circuits: Background, Evolution of ICs: CMOS Process

SEMESTER – III (EC/TC)

[As per Choice Based Credit System (CBCS) Scheme]

1. Illustrate simplification of Algebraic equations using Karnaugh Maps and

Principles of combination logic: Definition of combinational logic, L1,L2,L3

Analysis and design of combinational logic: Decoders, Encoders, Digital L1,L2,L3

Sequential Circuit Design: Design of a synchronous counter, Design of a L1,L2,L3

Question paper pattern:

SEMESTER – III (EC/TC)

[As per Choice Based Credit System (CBCS) Scheme]

Course Objectives: This course will enable students to:

1. Describe basic network concepts emphasizing source transformation,

Module-1 RBT Level

Basic Concepts: Practical sources, Source transformations, Network L1,L2,L3

Network Theorems: Superposition, Reciprocity, Thevinin‘s and L1,L2,L3

Transient behaviour and initial conditions: Behaviour of circuit L1,L2,L3

Resonant Circuits: Series and parallel resonance, frequency- L1,L2,L3

Two port network parameters: Definition of Z, Y, h and L1,L2,L3

Question paper pattern:

SEMESTER – III (EC/TC)

[As per Choice Based Credit System (CBCS) Scheme]

Number of Lecture 03 SEE Marks Marks 60

Total Number of 40 (8 Hours/Module) Exam Hours 03

Course Objectives: This course will enable students to:

1. Understand the meaning of Single and Multiple Random Variables, and

Module-1 RBT Level

Single Random Variables: Definition of random variables, L1,L2,L3

Random Processes: Ensemble, PDF, Independence, Expectations, L1,L2,L3

Determinants: Properties of Determinants, Permutations and Co- L1,L2,L3

Eigenvalues and Eigen vectors: Review of Eigenvalues and

Course outcomes: After studying this course, students will be able

SEMESTER – III (EC/TC)