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xrSimpodinxrSimpodin
committed
Merge remote-tracking branch 'upstream/v2.1' into v2.1
2 parents 3209fd6 + 43d0a19 commit 60d81a5

19 files changed

+229
-83
lines changed

‎src/jit/dis_arm64.lua

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -985,8 +985,7 @@ local function disass_ins(ctx)
985985
x = x.."]"
986986
end
987987
elseif p == "P" then
988-
local opcv, sh = rshift(op, 26), 2
989-
if opcv >= 0x2a then sh = 4 elseif opcv >= 0x1b then sh = 3 end
988+
local sh = 2 + rshift(op, 31 - band(rshift(op, 26), 1))
990989
local imm7 = lshift(arshift(lshift(op, 10), 25), sh)
991990
local rn = map_regs.x[band(rshift(op, 5), 31)]
992991
local ind = band(rshift(op, 23), 3)

‎src/lj_asm_arm.h

Lines changed: 18 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -969,24 +969,32 @@ static void asm_hrefk(ASMState *as, IRIns *ir)
969969
static void asm_uref(ASMState *as, IRIns *ir)
970970
{
971971
Reg dest = ra_dest(as, ir, RSET_GPR);
972-
if (irref_isk(ir->op1)) {
972+
int guarded = (irt_t(ir->t) & (IRT_GUARD|IRT_TYPE)) == (IRT_GUARD|IRT_PGC);
973+
if (irref_isk(ir->op1) && !guarded) {
973974
GCfunc *fn = ir_kfunc(IR(ir->op1));
974975
MRef *v = &gcref(fn->l.uvptr[(ir->op2 >> 8)])->uv.v;
975976
emit_lsptr(as, ARMI_LDR, dest, v);
976977
} else {
977-
Reg uv = ra_scratch(as, RSET_GPR);
978-
Reg func = ra_alloc1(as, ir->op1, RSET_GPR);
979-
if (ir->o == IR_UREFC) {
980-
asm_guardcc(as, CC_NE);
978+
if (guarded) {
979+
asm_guardcc(as, ir->o == IR_UREFC ? CC_NE : CC_EQ);
981980
emit_n(as, ARMI_CMP|ARMI_K12|1, RID_TMP);
982-
emit_opk(as, ARMI_ADD, dest, uv,
981+
}
982+
if (ir->o == IR_UREFC)
983+
emit_opk(as, ARMI_ADD, dest, dest,
983984
(int32_t)offsetof(GCupval, tv), RSET_GPR);
984-
emit_lso(as, ARMI_LDRB, RID_TMP, uv, (int32_t)offsetof(GCupval, closed));
985+
else
986+
emit_lso(as, ARMI_LDR, dest, dest, (int32_t)offsetof(GCupval, v));
987+
if (guarded)
988+
emit_lso(as, ARMI_LDRB, RID_TMP, dest,
989+
(int32_t)offsetof(GCupval, closed));
990+
if (irref_isk(ir->op1)) {
991+
GCfunc *fn = ir_kfunc(IR(ir->op1));
992+
int32_t k = (int32_t)gcrefu(fn->l.uvptr[(ir->op2 >> 8)]);
993+
emit_loadi(as, dest, k);
985994
} else {
986-
emit_lso(as, ARMI_LDR, dest, uv, (int32_t)offsetof(GCupval, v));
995+
emit_lso(as, ARMI_LDR, dest, ra_alloc1(as, ir->op1, RSET_GPR),
996+
(int32_t)offsetof(GCfuncL, uvptr) + 4*(int32_t)(ir->op2 >> 8));
987997
}
988-
emit_lso(as, ARMI_LDR, uv, func,
989-
(int32_t)offsetof(GCfuncL, uvptr) + 4*(int32_t)(ir->op2 >> 8));
990998
}
991999
}
9921000

‎src/lj_asm_arm64.h

Lines changed: 14 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -931,22 +931,30 @@ static void asm_hrefk(ASMState *as, IRIns *ir)
931931
static void asm_uref(ASMState *as, IRIns *ir)
932932
{
933933
Reg dest = ra_dest(as, ir, RSET_GPR);
934-
if (irref_isk(ir->op1)) {
934+
int guarded = (irt_t(ir->t) & (IRT_GUARD|IRT_TYPE)) == (IRT_GUARD|IRT_PGC);
935+
if (irref_isk(ir->op1) && !guarded) {
935936
GCfunc *fn = ir_kfunc(IR(ir->op1));
936937
MRef *v = &gcref(fn->l.uvptr[(ir->op2 >> 8)])->uv.v;
937938
emit_lsptr(as, A64I_LDRx, dest, v);
938939
} else {
939-
if (ir->o == IR_UREFC) {
940-
asm_guardcnb(as, A64I_CBZ, RID_TMP);
940+
if (guarded)
941+
asm_guardcnb(as, ir->o == IR_UREFC ? A64I_CBZ : A64I_CBNZ, RID_TMP);
942+
if (ir->o == IR_UREFC)
941943
emit_opk(as, A64I_ADDx, dest, dest,
942944
(int32_t)offsetof(GCupval, tv), RSET_GPR);
945+
else
946+
emit_lso(as, A64I_LDRx, dest, dest, (int32_t)offsetof(GCupval, v));
947+
if (guarded)
943948
emit_lso(as, A64I_LDRB, RID_TMP, dest,
944949
(int32_t)offsetof(GCupval, closed));
950+
if (irref_isk(ir->op1)) {
951+
GCfunc *fn = ir_kfunc(IR(ir->op1));
952+
uint64_t k = gcrefu(fn->l.uvptr[(ir->op2 >> 8)]);
953+
emit_loadu64(as, dest, k);
945954
} else {
946-
emit_lso(as, A64I_LDRx, dest, dest, (int32_t)offsetof(GCupval, v));
955+
emit_lso(as, A64I_LDRx, dest, ra_alloc1(as, ir->op1, RSET_GPR),
956+
(int32_t)offsetof(GCfuncL, uvptr) + 8*(int32_t)(ir->op2 >> 8));
947957
}
948-
emit_lso(as, A64I_LDRx, dest, ra_alloc1(as, ir->op1, RSET_GPR),
949-
(int32_t)offsetof(GCfuncL, uvptr) + 8*(int32_t)(ir->op2 >> 8));
950958
}
951959
}
952960

‎src/lj_asm_mips.h

Lines changed: 17 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1207,22 +1207,29 @@ static void asm_hrefk(ASMState *as, IRIns *ir)
12071207
static void asm_uref(ASMState *as, IRIns *ir)
12081208
{
12091209
Reg dest = ra_dest(as, ir, RSET_GPR);
1210-
if (irref_isk(ir->op1)) {
1210+
int guarded = (irt_t(ir->t) & (IRT_GUARD|IRT_TYPE)) == (IRT_GUARD|IRT_PGC);
1211+
if (irref_isk(ir->op1) && !guarded) {
12111212
GCfunc *fn = ir_kfunc(IR(ir->op1));
12121213
MRef *v = &gcref(fn->l.uvptr[(ir->op2 >> 8)])->uv.v;
12131214
emit_lsptr(as, MIPSI_AL, dest, v, RSET_GPR);
12141215
} else {
1215-
Reg uv = ra_scratch(as, RSET_GPR);
1216-
Reg func = ra_alloc1(as, ir->op1, RSET_GPR);
1217-
if (ir->o == IR_UREFC) {
1218-
asm_guard(as, MIPSI_BEQ, RID_TMP, RID_ZERO);
1219-
emit_tsi(as, MIPSI_AADDIU, dest, uv, (int32_t)offsetof(GCupval, tv));
1220-
emit_tsi(as, MIPSI_LBU, RID_TMP, uv, (int32_t)offsetof(GCupval, closed));
1216+
if (guarded)
1217+
asm_guard(as, ir->o == IR_UREFC ? MIPSI_BEQ : MIPSI_BNE, RID_TMP, RID_ZERO);
1218+
if (ir->o == IR_UREFC)
1219+
emit_tsi(as, MIPSI_AADDIU, dest, dest, (int32_t)offsetof(GCupval, tv));
1220+
else
1221+
emit_tsi(as, MIPSI_AL, dest, dest, (int32_t)offsetof(GCupval, v));
1222+
if (guarded)
1223+
emit_tsi(as, MIPSI_LBU, RID_TMP, dest, (int32_t)offsetof(GCupval, closed));
1224+
if (irref_isk(ir->op1)) {
1225+
GCfunc *fn = ir_kfunc(IR(ir->op1));
1226+
GCobj *o = gcref(fn->l.uvptr[(ir->op2 >> 8)]);
1227+
emit_loada(as, dest, o);
12211228
} else {
1222-
emit_tsi(as, MIPSI_AL, dest, uv, (int32_t)offsetof(GCupval, v));
1229+
emit_tsi(as, MIPSI_AL, dest, ra_alloc1(as, ir->op1, RSET_GPR),
1230+
(int32_t)offsetof(GCfuncL, uvptr) +
1231+
(int32_t)sizeof(MRef) * (int32_t)(ir->op2 >> 8));
12231232
}
1224-
emit_tsi(as, MIPSI_AL, uv, func, (int32_t)offsetof(GCfuncL, uvptr) +
1225-
(int32_t)sizeof(MRef) * (int32_t)(ir->op2 >> 8));
12261233
}
12271234
}
12281235

‎src/lj_asm_ppc.h

Lines changed: 17 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -840,23 +840,30 @@ static void asm_hrefk(ASMState *as, IRIns *ir)
840840
static void asm_uref(ASMState *as, IRIns *ir)
841841
{
842842
Reg dest = ra_dest(as, ir, RSET_GPR);
843-
if (irref_isk(ir->op1)) {
843+
int guarded = (irt_t(ir->t) & (IRT_GUARD|IRT_TYPE)) == (IRT_GUARD|IRT_PGC);
844+
if (irref_isk(ir->op1) && !guarded) {
844845
GCfunc *fn = ir_kfunc(IR(ir->op1));
845846
MRef *v = &gcref(fn->l.uvptr[(ir->op2 >> 8)])->uv.v;
846847
emit_lsptr(as, PPCI_LWZ, dest, v, RSET_GPR);
847848
} else {
848-
Reg uv = ra_scratch(as, RSET_GPR);
849-
Reg func = ra_alloc1(as, ir->op1, RSET_GPR);
850-
if (ir->o == IR_UREFC) {
851-
asm_guardcc(as, CC_NE);
849+
if (guarded) {
850+
asm_guardcc(as, ir->o == IR_UREFC ? CC_NE : CC_EQ);
852851
emit_ai(as, PPCI_CMPWI, RID_TMP, 1);
853-
emit_tai(as, PPCI_ADDI, dest, uv, (int32_t)offsetof(GCupval, tv));
854-
emit_tai(as, PPCI_LBZ, RID_TMP, uv, (int32_t)offsetof(GCupval, closed));
852+
}
853+
if (ir->o == IR_UREFC)
854+
emit_tai(as, PPCI_ADDI, dest, dest, (int32_t)offsetof(GCupval, tv));
855+
else
856+
emit_tai(as, PPCI_LWZ, dest, dest, (int32_t)offsetof(GCupval, v));
857+
if (guarded)
858+
emit_tai(as, PPCI_LBZ, RID_TMP, dest, (int32_t)offsetof(GCupval, closed));
859+
if (irref_isk(ir->op1)) {
860+
GCfunc *fn = ir_kfunc(IR(ir->op1));
861+
int32_t k = (int32_t)gcrefu(fn->l.uvptr[(ir->op2 >> 8)]);
862+
emit_loadi(as, dest, k);
855863
} else {
856-
emit_tai(as, PPCI_LWZ, dest, uv, (int32_t)offsetof(GCupval, v));
864+
emit_tai(as, PPCI_LWZ, dest, ra_alloc1(as, ir->op1, RSET_GPR),
865+
(int32_t)offsetof(GCfuncL, uvptr) + 4*(int32_t)(ir->op2 >> 8));
857866
}
858-
emit_tai(as, PPCI_LWZ, uv, func,
859-
(int32_t)offsetof(GCfuncL, uvptr) + 4*(int32_t)(ir->op2 >> 8));
860867
}
861868
}
862869

‎src/lj_asm_x86.h

Lines changed: 31 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -109,7 +109,7 @@ static int asm_isk32(ASMState *as, IRRef ref, int32_t *k)
109109
/* Check if there's no conflicting instruction between curins and ref.
110110
** Also avoid fusing loads if there are multiple references.
111111
*/
112-
static int noconflict(ASMState *as, IRRef ref, IROp conflict, int noload)
112+
static int noconflict(ASMState *as, IRRef ref, IROp conflict, int check)
113113
{
114114
IRIns *ir = as->ir;
115115
IRRef i = as->curins;
@@ -118,7 +118,9 @@ static int noconflict(ASMState *as, IRRef ref, IROp conflict, int noload)
118118
while (--i > ref) {
119119
if (ir[i].o == conflict)
120120
return 0; /* Conflict found. */
121-
else if (!noload && (ir[i].op1 == ref || ir[i].op2 == ref))
121+
else if ((check & 1) && (ir[i].o == IR_NEWREF || ir[i].o == IR_CALLS))
122+
return 0;
123+
else if ((check & 2) && (ir[i].op1 == ref || ir[i].op2 == ref))
122124
return 0;
123125
}
124126
return 1; /* Ok, no conflict. */
@@ -134,7 +136,7 @@ static IRRef asm_fuseabase(ASMState *as, IRRef ref)
134136
lj_assertA(irb->op2 == IRFL_TAB_ARRAY, "expected FLOAD TAB_ARRAY");
135137
/* We can avoid the FLOAD of t->array for colocated arrays. */
136138
if (ira->o == IR_TNEW && ira->op1 <= LJ_MAX_COLOSIZE &&
137-
!neverfuse(as) && noconflict(as, irb->op1, IR_NEWREF, 1)) {
139+
!neverfuse(as) && noconflict(as, irb->op1, IR_NEWREF, 0)) {
138140
as->mrm.ofs = (int32_t)sizeof(GCtab); /* Ofs to colocated array. */
139141
return irb->op1; /* Table obj. */
140142
}
@@ -456,7 +458,7 @@ static Reg asm_fuseload(ASMState *as, IRRef ref, RegSet allow)
456458
RegSet xallow = (allow & RSET_GPR) ? allow : RSET_GPR;
457459
if (ir->o == IR_SLOAD) {
458460
if (!(ir->op2 & (IRSLOAD_PARENT|IRSLOAD_CONVERT)) &&
459-
noconflict(as, ref, IR_RETF, 0) &&
461+
noconflict(as, ref, IR_RETF, 2) &&
460462
!(LJ_GC64 && irt_isaddr(ir->t))) {
461463
as->mrm.base = (uint8_t)ra_alloc1(as, REF_BASE, xallow);
462464
as->mrm.ofs = 8*((int32_t)ir->op1-1-LJ_FR2) +
@@ -467,12 +469,12 @@ static Reg asm_fuseload(ASMState *as, IRRef ref, RegSet allow)
467469
} else if (ir->o == IR_FLOAD) {
468470
/* Generic fusion is only ok for 32 bit operand (but see asm_comp). */
469471
if ((irt_isint(ir->t) || irt_isu32(ir->t) || irt_isaddr(ir->t)) &&
470-
noconflict(as, ref, IR_FSTORE, 0)) {
472+
noconflict(as, ref, IR_FSTORE, 2)) {
471473
asm_fusefref(as, ir, xallow);
472474
return RID_MRM;
473475
}
474476
} else if (ir->o == IR_ALOAD || ir->o == IR_HLOAD || ir->o == IR_ULOAD) {
475-
if (noconflict(as, ref, ir->o + IRDELTA_L2S, 0) &&
477+
if (noconflict(as, ref, ir->o + IRDELTA_L2S, 2+(ir->o != IR_ULOAD)) &&
476478
!(LJ_GC64 && irt_isaddr(ir->t))) {
477479
asm_fuseahuref(as, ir->op1, xallow);
478480
return RID_MRM;
@@ -482,7 +484,7 @@ static Reg asm_fuseload(ASMState *as, IRRef ref, RegSet allow)
482484
** Fusing unaligned memory operands is ok on x86 (except for SIMD types).
483485
*/
484486
if ((!irt_typerange(ir->t, IRT_I8, IRT_U16)) &&
485-
noconflict(as, ref, IR_XSTORE, 0)) {
487+
noconflict(as, ref, IR_XSTORE, 2)) {
486488
asm_fusexref(as, ir->op1, xallow);
487489
return RID_MRM;
488490
}
@@ -815,6 +817,7 @@ static void asm_tointg(ASMState *as, IRIns *ir, Reg left)
815817
emit_rr(as, XO_UCOMISD, left, tmp);
816818
emit_rr(as, XO_CVTSI2SD, tmp, dest);
817819
emit_rr(as, XO_XORPS, tmp, tmp); /* Avoid partial register stall. */
820+
checkmclim(as);
818821
emit_rr(as, XO_CVTTSD2SI, dest, left);
819822
/* Can't fuse since left is needed twice. */
820823
}
@@ -857,6 +860,7 @@ static void asm_conv(ASMState *as, IRIns *ir)
857860
emit_rr(as, XO_SUBSD, dest, bias); /* Subtract 2^52+2^51 bias. */
858861
emit_rr(as, XO_XORPS, dest, bias); /* Merge bias and integer. */
859862
emit_rma(as, XO_MOVSD, bias, k);
863+
checkmclim(as);
860864
emit_mrm(as, XO_MOVD, dest, asm_fuseload(as, lref, RSET_GPR));
861865
return;
862866
} else { /* Integer to FP conversion. */
@@ -1173,6 +1177,7 @@ static void asm_href(ASMState *as, IRIns *ir, IROp merge)
11731177
asm_guardcc(as, CC_E);
11741178
else
11751179
emit_sjcc(as, CC_E, l_end);
1180+
checkmclim(as);
11761181
if (irt_isnum(kt)) {
11771182
if (isk) {
11781183
/* Assumes -0.0 is already canonicalized to +0.0. */
@@ -1232,7 +1237,6 @@ static void asm_href(ASMState *as, IRIns *ir, IROp merge)
12321237
#endif
12331238
}
12341239
emit_sfixup(as, l_loop);
1235-
checkmclim(as);
12361240
#if LJ_GC64
12371241
if (!isk && irt_isaddr(kt)) {
12381242
emit_rr(as, XO_OR, tmp|REX_64, key);
@@ -1259,6 +1263,7 @@ static void asm_href(ASMState *as, IRIns *ir, IROp merge)
12591263
emit_rr(as, XO_ARITH(XOg_SUB), dest, tmp);
12601264
emit_shifti(as, XOg_ROL, tmp, HASH_ROT3);
12611265
emit_rr(as, XO_ARITH(XOg_XOR), dest, tmp);
1266+
checkmclim(as);
12621267
emit_shifti(as, XOg_ROL, dest, HASH_ROT2);
12631268
emit_rr(as, XO_ARITH(XOg_SUB), tmp, dest);
12641269
emit_shifti(as, XOg_ROL, dest, HASH_ROT1);
@@ -1276,7 +1281,6 @@ static void asm_href(ASMState *as, IRIns *ir, IROp merge)
12761281
} else {
12771282
emit_rr(as, XO_MOV, tmp, key);
12781283
#if LJ_GC64
1279-
checkmclim(as);
12801284
emit_gri(as, XG_ARITHi(XOg_XOR), dest, irt_toitype(kt) << 15);
12811285
if ((as->flags & JIT_F_BMI2)) {
12821286
emit_i8(as, 32);
@@ -1373,24 +1377,31 @@ static void asm_hrefk(ASMState *as, IRIns *ir)
13731377
static void asm_uref(ASMState *as, IRIns *ir)
13741378
{
13751379
Reg dest = ra_dest(as, ir, RSET_GPR);
1376-
if (irref_isk(ir->op1)) {
1380+
int guarded = (irt_t(ir->t) & (IRT_GUARD|IRT_TYPE)) == (IRT_GUARD|IRT_PGC);
1381+
if (irref_isk(ir->op1) && !guarded) {
13771382
GCfunc *fn = ir_kfunc(IR(ir->op1));
13781383
MRef *v = &gcref(fn->l.uvptr[(ir->op2 >> 8)])->uv.v;
13791384
emit_rma(as, XO_MOV, dest|REX_GC64, v);
13801385
} else {
13811386
Reg uv = ra_scratch(as, RSET_GPR);
1382-
Reg func = ra_alloc1(as, ir->op1, RSET_GPR);
1383-
if (ir->o == IR_UREFC) {
1387+
if (ir->o == IR_UREFC)
13841388
emit_rmro(as, XO_LEA, dest|REX_GC64, uv, offsetof(GCupval, tv));
1385-
asm_guardcc(as, CC_NE);
1386-
emit_i8(as, 1);
1389+
else
1390+
emit_rmro(as, XO_MOV, dest|REX_GC64, uv, offsetof(GCupval, v));
1391+
if (guarded) {
1392+
asm_guardcc(as, ir->o == IR_UREFC ? CC_E : CC_NE);
1393+
emit_i8(as, 0);
13871394
emit_rmro(as, XO_ARITHib, XOg_CMP, uv, offsetof(GCupval, closed));
1395+
}
1396+
if (irref_isk(ir->op1)) {
1397+
GCfunc *fn = ir_kfunc(IR(ir->op1));
1398+
GCobj *o = gcref(fn->l.uvptr[(ir->op2 >> 8)]);
1399+
emit_loada(as, uv, o);
13881400
} else {
1389-
emit_rmro(as, XO_MOV, dest|REX_GC64, uv, offsetof(GCupval, v));
1401+
emit_rmro(as, XO_MOV, uv|REX_GC64, ra_alloc1(as, ir->op1, RSET_GPR),
1402+
(int32_t)offsetof(GCfuncL, uvptr) +
1403+
(int32_t)sizeof(MRef) * (int32_t)(ir->op2 >> 8));
13901404
}
1391-
emit_rmro(as, XO_MOV, uv|REX_GC64, func,
1392-
(int32_t)offsetof(GCfuncL, uvptr) +
1393-
(int32_t)sizeof(MRef) * (int32_t)(ir->op2 >> 8));
13941405
}
13951406
}
13961407

@@ -1547,6 +1558,7 @@ static void asm_ahuvload(ASMState *as, IRIns *ir)
15471558
if (irt_islightud(ir->t)) {
15481559
Reg dest = asm_load_lightud64(as, ir, 1);
15491560
if (ra_hasreg(dest)) {
1561+
checkmclim(as);
15501562
asm_fuseahuref(as, ir->op1, RSET_GPR);
15511563
if (ir->o == IR_VLOAD) as->mrm.ofs += 8 * ir->op2;
15521564
emit_mrm(as, XO_MOV, dest|REX_64, RID_MRM);
@@ -1594,6 +1606,7 @@ static void asm_ahuvload(ASMState *as, IRIns *ir)
15941606
if (LJ_64 && irt_type(ir->t) >= IRT_NUM) {
15951607
lj_assertA(irt_isinteger(ir->t) || irt_isnum(ir->t),
15961608
"bad load type %d", irt_type(ir->t));
1609+
checkmclim(as);
15971610
#if LJ_GC64
15981611
emit_u32(as, LJ_TISNUM << 15);
15991612
#else

‎src/lj_cparse.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1766,9 +1766,11 @@ static void cp_pragma(CPState *cp, BCLine pragmaline)
17661766
cp_check(cp, '(');
17671767
if (cp->tok == CTOK_IDENT) {
17681768
if (cp_str_is(cp->str, "push")) {
1769-
if (cp->curpack < CPARSE_MAX_PACKSTACK) {
1769+
if (cp->curpack < CPARSE_MAX_PACKSTACK-1) {
17701770
cp->packstack[cp->curpack+1] = cp->packstack[cp->curpack];
17711771
cp->curpack++;
1772+
} else {
1773+
cp_errmsg(cp, cp->tok, LJ_ERR_XLEVELS);
17721774
}
17731775
} else if (cp_str_is(cp->str, "pop")) {
17741776
if (cp->curpack > 0) cp->curpack--;

‎src/lj_def.h

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -259,12 +259,8 @@ static LJ_AINLINE uint32_t lj_fls(uint32_t x)
259259
#else
260260
unsigned char _BitScanForward(unsigned long *, unsigned long);
261261
unsigned char _BitScanReverse(unsigned long *, unsigned long);
262-
unsigned char _BitScanForward64(unsigned long *, uint64_t);
263-
unsigned char _BitScanReverse64(unsigned long *, uint64_t);
264262
#pragma intrinsic(_BitScanForward)
265263
#pragma intrinsic(_BitScanReverse)
266-
#pragma intrinsic(_BitScanForward64)
267-
#pragma intrinsic(_BitScanReverse64)
268264

269265
static LJ_AINLINE uint32_t lj_ffs(uint32_t x)
270266
{
@@ -276,6 +272,12 @@ static LJ_AINLINE uint32_t lj_fls(uint32_t x)
276272
unsigned long r; _BitScanReverse(&r, x); return (uint32_t)r;
277273
}
278274

275+
#if defined(_M_X64) || defined(_M_ARM64)
276+
unsigned char _BitScanForward64(unsigned long *, uint64_t);
277+
unsigned char _BitScanReverse64(unsigned long *, uint64_t);
278+
#pragma intrinsic(_BitScanForward64)
279+
#pragma intrinsic(_BitScanReverse64)
280+
279281
static LJ_AINLINE uint32_t lj_ffs64(uint64_t x)
280282
{
281283
unsigned long r; _BitScanForward64(&r, x); return (uint32_t)r;
@@ -286,6 +288,7 @@ static LJ_AINLINE uint32_t lj_fls64(uint64_t x)
286288
unsigned long r; _BitScanReverse64(&r, x); return (uint32_t)r;
287289
}
288290
#endif
291+
#endif
289292

290293
unsigned long _byteswap_ulong(unsigned long);
291294
uint64_t _byteswap_uint64(uint64_t);

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