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<< /S /GoTo /D (section.1) >>
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(1 Introduction)
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<< /S /GoTo /D (section.2) >>
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(2 The IMS M212)
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<< /S /GoTo /D (subsection.2.1) >>
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(2.1 Memory interface)
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<< /S /GoTo /D (subsection.2.2) >>
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(2.2 Links)
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<< /S /GoTo /D (subsection.2.3) >>
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(2.3 Disk interface)
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<< /S /GoTo /D (section.3) >>
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(3 Specification of the IMS B005)
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<< /S /GoTo /D (section.4) >>
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(4 Design)
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<< /S /GoTo /D (subsection.4.1) >>
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(4.1 Memory)
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<< /S /GoTo /D (subsection.4.2) >>
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(4.2 Disk interface)
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<< /S /GoTo /D (subsection.4.3) >>
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(4.3 Phase locked loop filters)
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<< /S /GoTo /D (subsection.4.4) >>
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(4.4 System Control)
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<< /S /GoTo /D (subsection.4.5) >>
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(4.5 Switches, links and clocks)
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<< /S /GoTo /D (section.5) >>
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(5 Implementation)
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<< /S /GoTo /D (section.6) >>
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(6 Design summary)
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<< /S /GoTo /D (subsection.6.1) >>
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(6.1 Using the board)
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<< /S /GoTo /D (subsection.6.2) >>
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(6.2 Software)
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<< /S /GoTo /D (appendix.A) >>
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(A IMS B005 component list and PCB layout)
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<< /S /GoTo /D (section*.2) >>
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(References)
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