LLVM Weekly - #317, Jan 27th 2020
Welcome to the three hundred and seventeenth issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by Alex Bradbury. Subscribe to future issues at https://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback to [email protected], or @llvmweekly or @asbradbury on Twitter.
News and articles from around the web
John Regehr wrote up some opportunities for improving precision of LLVM's demanded bits analysis.
Minutes from recent LLVM Foundation board meetings have now been published.
Ying Yi wrote up an article on the SN Systems blog about initial results from the Program Repository research project.
On the mailing lists
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Johannes Doerfert gave an update on work to revisit llvm.assume, highlighting patches that are up for review.
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Arnaud Allard de Grandmaison responded to the RFC on creating on LLVM security group on behalf of the LLVM Foundation Board.
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Lang Hames shares the second installment of ORC JIT Weekly, highlighting work to remove blockers for people transitioning from ORCv1 to ORCv2.
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Florian Hahn started a discussion about adding an in-tree helper script to create/apply patches without arc.
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Prashanth N R reports the open-source of the FC MLIR+LLVM based Fortran frontend has started.
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Brian Gesiak highlights outstanding LazyCallGraph patch reviews that are pre-requisites for his C++20 coroutines work using the new pass manager.
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Leonard Chan enquires about contributions to libcxxabi for different ABIs. In particular, the PC-relative vtable ABI implemented in Fuchsia.
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Nick Meyer is keen to start a discussion on implementing the Reflect TS in Clang.
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Reid Kleckner shares a proposal to replace the inalloca attribute with new intrinsics and a new
preallocated
attribute.
LLVM commits
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An
llvm.vscale
intrinsic was added. 67d4c99. -
Initial placeholder/infrastructure code for llvm-ml (a MASM assembler) was committed. 5f6dfa8.
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A scheduler description was added for the Rocket RISC-V core. 838a28e.
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The Hexagon backend gained support for the Linux/Musl ABI and the Hexagon/HVX v67 ISA. 7fee4fe, c12a591.
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Support was added for the Hexagon v67t microarchitecture ("tiny core"). 305bf5b.
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The AMDGPU backend has new documentation for RegisterBankInfo, documenting high level strategies that could be used for register bank selection. f6418d7.
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The VE backend development continues with support for new argument types, return values, and consts, and setcc isel patterns, and much more in further patches. 3a906a9, dc69265.
-
CreateAlignedLoad
was deprecated. This is part of work to introduce anAlignment
type. 279fa8e. -
The PowerPC backend gained support for prefixed instructions, to be utilised on a future CPU. 5cee340.
-
FileCheck now supports matching formats, which is part of a patch series adding support for FileCheck numeric expressions. 8e96697.
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The SILoadStoreOptimizer now does a better job at merging out of order offsets. 86c944d.
Clang commits
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Support for placeholder constraints and abbreviated templates was added as part of the ongoing C++ concepts implementation work. 98ea4b3.
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The Arm MVE intrinsics were updated to work in C++. 98ea4b3.
-
-fconcepts-ts
should no longer be used to enable Concepts. Instead, support is enabled through-std=c++2a
. 67c608a. -
clang-tidy headers are now included in the Clang distribution. 301a437.
Other project commits
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Benchmarking infrastructure was added for llvm-libc memory functions. aba80d0.
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The new lldb-repro utility can be used to transparently capture and replay debugger sessions through the command line driver, and is used to test reproducers. Documentation on the reproducer test strategy was also added. 67420f1, 48490e3.
-
The libcxx test suite was updated to be compatible with Python 3.8.x. 7b8dc8c.
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An initial doxygen config was added to the mlir subdirectory. e298e21.
-
MLIR gained an
llvm.cmpxchg
operation as part of its LLVM dialect. fffea28.