LLVM Weekly - #232, June 11th 2018
Welcome to the two hundred and thirty-second issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by Alex Bradbury. Subscribe to future issues at https://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback to [email protected], or @llvmweekly or @asbradbury on Twitter.
News and articles from around the web
The ISO C++ Committee meeting recently took place in Rapperswil, Switzerland. Several committee members have shared a detailed write-up on Reddit.
The next LLVM Social in Shanghai has been announced for July 1st.
Zig is an interesting LLVM-based language which has been mentioned in LLVM Weekly previously, and aims to be a better C. The author is moving to working full-time on Zig and is seeking donations.
On the mailing lists
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Johannes Doerfert proposes abstract parallel IR optimisations in a new RFC.
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Hans Wennborg has proposed the schedule for the 7.0.0 release. This would see the branch taking place on 1st August with RC1 soon after, RC2 coming on the 22nd August, and the final tag on 5th September.
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Graham Hunter has shared an updated RFC on supporting SIMD instruction sets with variable vector lengths (e.g. SVE). There is also a sub-thread discussing support for the RISC-V vector extension.
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Tanya Lattner is looking for booth volunteers for the Grace Hopper Conference in Houston in September.
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Brian Gesiak queries the current state of LLD support for Mach-O. The thread received a number of responses from active LLD developers.
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Robin Eklind has created a BNF grammar for LLVM IR assembly.
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Chijun Sima has shared an RFC on a new dominator tree updater API.
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Fedor Sergeev has authored an RFC on a new pass execution instrumentation interface. This aims to allow the easy implementation of facilities such as
-print-after,-opt-bisect-limit, etc. Importantly, it aims to be compatible with the new pass manager. -
Masaki Arai is looking for feedback on an RFC to port MachinePipeliner to AArch64+SVE.
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Nicolai Hähnle is drawing attention to recent work which generalizes the "searchable tables" backend of TableGen.
LLVM commits
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An initial set of optimisation remarks has been added to the shrink-wrapping pass. r333972.
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The SETCCE SelectionDAG node has been removed in favour of SETCCCARRY. r333939.
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The semantics of NAME in TableGen have been streamlined. r333900.
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Documentation was added for masked vector expanding load and compressing store intrinsics. r334075.
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The 'li' pseudo instruction is now supported by the RISC-V MC assembly parser. r334203.
Clang commits
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Implementation of clang-doc continues with the introduction of the 'reducer' portion of the frontend framework. r333932.
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Bittest intrinsics have been implemented generically for non-x86 platforms. r334059.