This cpu is 6-stage in-order dual issue superscalar processor with floating point unit.
- RV32-IMFDCB
- Fast multiplication unit
- Slow division unit
- FPU with single and double precision
- Fast and slow option for FDIV and FSQRT instruction
- Branch target cache with bimodal branch predictor
- Harvard bus architecture
- Instruction and Data Tightly Integrated Memory
- UART
- Baudrate 115200
- Start Bit
- Stop Bit
- 8 Data Bits
- No Parity Bit
The installation scripts of necessary tools are located in directory tools. These scripts need root permission in order to install packages and tools for simulation and testcase generation.
- Clone the repository:
git clone --recurse-submodules https://github.com/taneroksuz/cpu-medium.git
- Install necessary tools for compilation and simulation:
make tool
- Compile some benchmarks:
make compile
- Compiled executable files are located in riscv and dumped files are located in dump. Select an executable and run simulation:
make xsim PROGRAM=coremark
- Run simulation with debug feature:
make xsim DUMP=1
- Run simulation with short period of time (e.g 1us, default 10ms):
make xsim MAXTIME=1000
- The simulation results together with debug informations are located in sim/xsim/output.
Cycles | Iteration/s/MHz | Iteration |
---|---|---|
192443 | 5.20 | 10 |