firtool-1.90.1
seldridge
released this
29 Oct 00:35
·
211 commits
to main
since this release
What's Changed
- [Verif] Add LowerFormalToHW pass by @leonardt in #7707
- [CombFolds] Preserve two-state attribute in
narrowOperationWidth
by @fzi-hielscher in #7712 - Bump LLVM to 92663defb1c27d809f644752d65d8ccff93a7054. by @mikeurbach in #7714
- [ESI] Promote and generalize 'channel assignments' by @teqdruid in #7715
- [docs] Fix broken image links in docs by @Ivecia in #7710
- [FIRRTL] Convert CheckLayers to use InstanceInfo by @seldridge in #7635
- [OM] Rework ClassOp to use fields terminator by @leonardt in #7537
- [HW][Seq] Allow typed attr to be an element of aggregate_constant and make seq.const_clock typed attr by @uenoku in #7718
- Advanced LayerSink by @rwy7 in #7548
- [FIRRTL] Use InstanceInfo in CreateSiFiveMetadata by @seldridge in #7720
- [FIRRTL][LayerSink] Fix: initialize an unitialized bool member by @rwy7 in #7724
- [HWToSMT] Proper error message for 0-bit constants by @maerhart in #7727
- [circt-bmc] Add simple initial value support to ExternalizeRegisters by @TaoBi22 in #7728
- Reject '<=' and 'is invalid' if FIRRTL version >=3 by @seldridge in #7733
- [FIRRTL] clean up interfaces for supporting properties by @youngar in #7734
- Use properties for attributes for many dialects by @youngar in #7736
- [AIG][circt-synth] Add a boilarplate for the dialect and tool by @uenoku in #7737
- [AIG] Add AndInverterOp by @uenoku in #7738
- [AIG] Add LowerVariadic and LowerWordToBits passes by @uenoku in #7739
- [CombToAIG] Add CombToAIG conversion pass by @uenoku in #7740
- [circt-synth] Populate pipelines until AIG lowering by @uenoku in #7741
- [AIG] Add CutOp by @uenoku in #7743
- [circt-lec] Register Verif dialect by @uenoku in #7744
- [circt-bmc] Add initial_values attribute to BMC op by @TaoBi22 in #7729
- [Verif] Add contract examples to dialect doc by @fabianschuiki in #7723
- [OM] Add ClassOp region verifier by @seldridge in #7746
New Contributors
Full Changelog: firtool-1.89.0...firtool-1.90.1