Struct pic8259::ChainedPics [−][src]
pub struct ChainedPics { /* fields omitted */ }
Expand description
A pair of chained PIC controllers. This is the standard setup on x86.
Implementations
impl ChainedPics
[src]
impl ChainedPics
[src]pub const unsafe fn new(offset1: u8, offset2: u8) -> ChainedPics
[src]
pub const unsafe fn new(offset1: u8, offset2: u8) -> ChainedPics
[src]Create a new interface for the standard PIC1 and PIC2 controllers, specifying the desired interrupt offsets.
pub unsafe fn initialize(&mut self)
[src]
pub unsafe fn initialize(&mut self)
[src]Initialize both our PICs. We initialize them together, at the same time, because it’s traditional to do so, and because I/O operations might not be instantaneous on older processors.
pub unsafe fn read_masks(&mut self) -> [u8; 2]
[src]
pub unsafe fn read_masks(&mut self) -> [u8; 2]
[src]Reads the interrupt masks of both PICs.
pub unsafe fn write_masks(&mut self, mask1: u8, mask2: u8)
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pub unsafe fn write_masks(&mut self, mask1: u8, mask2: u8)
[src]Writes the interrupt masks of both PICs.
pub fn handles_interrupt(&self, interrupt_id: u8) -> bool
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pub fn handles_interrupt(&self, interrupt_id: u8) -> bool
[src]Do we handle this interrupt?
pub unsafe fn notify_end_of_interrupt(&mut self, interrupt_id: u8)
[src]
pub unsafe fn notify_end_of_interrupt(&mut self, interrupt_id: u8)
[src]Figure out which (if any) PICs in our chain need to know about this
interrupt. This is tricky, because all interrupts from pics[1]
get chained through pics[0]
.