[B! FPGA] koemuã®ãƒ–ãƒƒã‚¯ãƒžãƒ¼ã‚¯

koemu id:koemu

FPGAã«é–¢ã™ã‚‹koemuã®ãƒ–ãƒƒã‚¯ãƒžãƒ¼ã‚¯ (4)

${{author_name}}$

{{{comment_expanded}}}

{{label}}

{{#is_bookmark}}ãƒªã‚¹ãƒˆ{{/is_bookmark}}{{^is_bookmark}}ãƒªãƒ³ã‚¯{{/is_bookmark}}

${{author_name}}$
{{author_name}}{{created}}
{{ #comment }}{{ comment }}{{ /comment }}
- {{ label }}

${{author_name}}$

{{{comment_expanded}}}

{{label}}

{{#is_bookmark}}ãƒªã‚¹ãƒˆ{{/is_bookmark}}{{^is_bookmark}}ãƒªãƒ³ã‚¯{{/is_bookmark}}

ã‚½ãƒ•ãƒˆã‚¦ã‚§ã‚¢æŠ€è¡“è€…ã‹ã‚‰è¦‹ãŸFPGAã®é…åŠ›ã¨å¯èƒ½æ€§
3. ã¯ã˜ã‚ã«ï¼šISPã®ç´¹ä»‹ â– æ‰€å±žï¼šï¼ˆæ ªï¼‰ã‚·ã‚¹ãƒ†ãƒ è¨ˆç”»ç ”ç©¶æ‰€ï¼ISP â– 1977å¹´å‰µæ¥ã®ç‹¬ç«‹ç³»ç ”ç©¶é–‹ç™ºåž‹ã®ã‚½ãƒ•ãƒˆã‚¦ã‚§ã‚¢é–‹ç™ºä¼šç¤¾ã§ã™ã€‚ â– ISPã®äº‹æ¥åˆ†é‡Ž â– åŒ»ç™‚æƒ…å ±ãƒ»Webã‚¢ãƒ—ãƒªã‚±ãƒ¼ã‚·ãƒ§ãƒ³ã‚·ã‚¹ãƒ†ãƒ äº‹æ¥ â– é€šä¿¡ãƒ»ãƒãƒƒãƒˆãƒ¯ãƒ¼ã‚¯ãƒ»åˆ¶å¾¡ãƒ»å®‡å®™ã‚·ã‚¹ãƒ†ãƒ äº‹æ¥ â– AIã‚·ã‚¹ãƒ†ãƒ äº‹æ¥ â– ç”»åƒå‡¦ç†ã‚·ã‚¹ãƒ†ãƒ äº‹æ¥ â– ç‹¬è‡ªã®ç”»åƒå‡¦ç†ã‚¢ãƒ«ã‚´ãƒªã‚ºãƒ é–‹ç™ºï¼šROBUSKEYç‰ï¼ˆGPU/CUDAï¼‰ 4. ã¯ã˜ã‚ã«ï¼šISPã®ç´¹ä»‹ â– æ‰€å±žï¼šï¼ˆæ ªï¼‰ã‚·ã‚¹ãƒ†ãƒ è¨ˆç”»ç ”ç©¶æ‰€ï¼ISP â– 1977å¹´å‰µæ¥ã®ç‹¬ç«‹ç³»ç ”ç©¶é–‹ç™ºåž‹ã®ã‚½ãƒ•ãƒˆã‚¦ã‚§ã‚¢é–‹ç™ºä¼šç¤¾ã§ã™ã€‚ â– ISPã®äº‹æ¥åˆ†é‡Ž â– åŒ»ç™‚æƒ…å ±ãƒ»Webã‚¢ãƒ—ãƒªã‚±ãƒ¼ã‚·ãƒ§ãƒ³ã‚·ã‚¹ãƒ†ãƒ äº‹æ¥ â– é€šä¿¡ãƒ»ãƒãƒƒãƒˆãƒ¯ãƒ¼ã‚¯ãƒ»åˆ¶å¾¡ãƒ»å®‡å®™ã‚·ã‚¹ãƒ†ãƒ äº‹æ¥ â– AIã‚·ã‚¹ãƒ†ãƒ äº‹æ¥ â– ç”»åƒå‡¦ç†ã‚·ã‚¹ãƒ†ãƒ äº‹æ¥ â– ç‹¬è‡ªã®ç”»åƒå‡¦ç†ã‚¢ãƒ«ã‚´ãƒªã‚ºãƒ é–‹ç™ºï¼šROBUSKEYç‰ â– ã‚¢ãƒˆãƒ©ã‚¯ã‚·ãƒ§ãƒ³ã‚·ã‚¹ãƒ†ãƒ é–‹ç™ºï¼šèµ¤å¤–ç·šé€šä¿¡ãƒœãƒ¼ãƒ‰ã®è£½
koemu 2018/03/31
FPGA
ãƒªãƒ³ã‚¯
ãã‚ãã‚ãƒ—ãƒã‚°ãƒ©ãƒžãƒ¼ã‚‚FPGAã‚’è§¦ã£ã¦ã¿ã‚ˆã†ï¼ - Qiita
##ãã‚ãã‚ãƒ—ãƒã‚°ãƒ©ãƒžãƒ¼ã‚‚FPGAã‚’è§¦ã£ã¦ã¿ã‚ˆã†ï¼ ã“ã‚Œã¯builderscon tokyo 2016ã®ç™ºè¡¨ã‚¹ãƒ©ã‚¤ãƒ‰ã§ã™ã€‚ ##è‡ªå·±ç´¹ä»‹ @kazunori_279 ã‚¯ãƒ©ã‚¦ãƒ‰ã®ãƒ‡ãƒ™ãƒãƒƒãƒ‘ãƒ¼ãƒ»ã‚¢ãƒ‰ãƒœã‚±ã‚¤ãƒˆ ã‚¨ãƒãƒ³ã‚¸ã‚§ãƒªã‚¹ãƒˆã¿ãŸã„ãªãŠä»•äº‹ ã‚³ãƒŸãƒ¥ãƒ‹ãƒ†ã‚£æ”¯æ´ï¼šGCPUGã€bq_sushiã€TensorFlow User Group etc è¶£å‘³ã®FPGA 2013å¹´ãã‚‰ã„ã‹ã‚‰ã„ã˜ã‚Šå§‹ã‚ FPGAã‚¨ã‚¯ã‚¹ãƒˆãƒªãƒ¼ãƒ ãƒ»ã‚³ãƒ³ãƒ”ãƒ¥ãƒ¼ãƒ†ã‚£ãƒ³ã‚°ä¸»å®°ï¼šåˆè¨ˆ8å›ž ##ã“ã‚Œã¾ã§ã«æ›¸ã„ãŸFPGAè¨˜äº‹ ã¯ã¦ãªãƒ–ãƒƒã‚¯ãƒžãƒ¼ã‚¯ã§ãƒã‚ºã£ãŸè¨˜äº‹ãŸã¡ ãƒžã‚¤ã‚¯ãƒã‚½ãƒ•ãƒˆã¯ã©ã†ã‚„ã£ã¦Bingã‚’FPGAã§å®Ÿè£…ã—ãŸã‹: 952 users ãƒãƒ¼ãƒ‰ç´ äººãŒ32bit CPUã‚’FPGAã§è‡ªä½œã—ã¦å‹•ã‹ã™ã¾ã§èªã‚“ã æœ¬ã®ã¾ã¨ã‚: 576 users æ–‡å—é€šã‚Šã€Œãƒãƒƒãƒˆãƒ¯ãƒ¼ã‚¯ãŒã‚³ãƒ³ãƒ”ãƒ¥ãƒ¼ã‚¿ãƒ¼ã€ãªé‡‘èžHFTã§ã®FPGAã®ä½¿ã‚ã‚Œæ–¹: 517 users JP M
koemu 2016/12/03
FPGA

ã¾ã¨ã‚
ãƒªãƒ³ã‚¯
Intelã«ã‚ˆã‚‹è²·åŽå¾Œã€FPGAã¯ã‚¯ãƒ©ã‚¦ãƒ‰ã‚µãƒ¼ãƒ“ã‚¹åŒ–ã™ã‚‹
ç±³Intelç¤¾ãŒè²·åŽã‚’è¡¨æ˜Žã—ãŸã“ã¨ã§ä¸€æ°—ã«æ³¨ç›®ãŒé›†ã¾ã£ãŸFPGAãƒ™ãƒ³ãƒ€ãƒ¼ã®ç±³Alteraç¤¾ã€‚è²·åŽãŒç™ºè¡¨ã•ã‚Œã‚‹ç›´å‰ã®ã‚¿ã‚¤ãƒŸãƒ³ã‚°ã§å…ˆæ—¥ã€Alteraç¤¾å¹¹éƒ¨ã«ã‚¤ãƒ³ã‚¿ãƒ“ãƒ¥ãƒ¼ã•ã›ã¦ã„ãŸã ãæ©Ÿä¼šãŒã‚ã£ãŸã®ã§ã™ãŒã€ãã®éš›ã€ä¸€ç•ªé©šã‹ã•ã‚ŒãŸã®ãŒã€ã€Œã‚µãƒ¼ãƒãƒ¼ä¸Šã®FPGAã‚’ãƒžãƒ«ãƒãƒ†ãƒŠãƒ³ãƒˆåŒ–ã—ã€ã‚¯ãƒ©ã‚¦ãƒ‰ã‚µãƒ¼ãƒ“ã‚¹ã¨ã—ã¦è²¸ã—å‡ºã™åˆ©ç”¨å½¢æ…‹ã‚’æƒ³å®šã—ã¦ã„ã‚‹ã€ã¨ã®ã‚³ãƒ¡ãƒ³ãƒˆã§ã—ãŸã€‚ ç±³Microsoftç¤¾ã®FPGAã‚¯ãƒ©ã‚¹ã‚¿ãƒ¼ã€ŒCatapultã€ï¼ˆé–¢é€£è¨˜äº‹ï¼‰ã‚„ãƒ‰ãƒ¯ãƒ³ã‚´ï¼ˆé–¢é€£è¨˜äº‹ï¼‰ã®å–ã‚Šçµ„ã¿ã«ä»£è¡¨ã•ã‚Œã‚‹ã‚ˆã†ã«ç¾åœ¨ã€ã‚µãƒ¼ãƒãƒ¼ã«FPGAã‚’å°Žå…¥ã—ã‚ˆã†ã¨ã„ã†æ©Ÿé‹ãŒé«˜ã¾ã£ã¦ã„ã¾ã™ã€‚ ãŸã ã€ãã®å¤šãã¯ã‚ãã¾ã§è‡ªç¤¾ã‚µãƒ¼ãƒ“ã‚¹ã®ãŸã‚ã«FPGAã‚’æ´»ç”¨ã™ã‚‹ã¨ã„ã†ã‚¹ã‚¿ãƒ³ã‚¹ã€‚ã‚µãƒ¼ãƒãƒ¼ã«ã‚ã‚‹FPGAãƒªã‚½ãƒ¼ã‚¹ã‚’ã€ä¸€èˆ¬ã®ãƒ¦ãƒ¼ã‚¶ãƒ¼ä¼æ¥ã«å¯¾ã—ã‚¯ãƒ©ã‚¦ãƒ‰ã‚µãƒ¼ãƒ“ã‚¹äº‹æ¥è€…ãŒãƒ¬ãƒ³ã‚¿ãƒ«ã™ã‚‹ã¨ã„ã†å½¢æ…‹ã¯ã€æƒ³åƒã“ãã§ãã‚‹ã‚‚ã®ã®ã€å®Ÿéš›ã«ç™»å ´ã™ã‚‹ã®ã¯ã‹ãªã‚Šå…ˆãªã®ã“ã¨ã ã‚ã†ã¨è€ƒãˆã¦ã„ã¾ã—
koemu 2015/07/22
FPGA as a Serviceã®æ™‚ä»£ãŒæ¥ã‚‹ã‹ã‚‚ã—ã‚Œãªã„ã€‚GPUã¯æ—¢ã«ã‚ã‚‹ã‘ã©ã€ã©ã†ãªã®ã ã‚ã†ã€‚

IaaS

FPGA
ãƒªãƒ³ã‚¯
Moving computation to the data (1)
2. è‡ªå·±ç´¹ä»‹ @kazunori_279 â— ã‚¯ãƒ©ã‚¦ãƒ‰ã‚„ãƒ“ãƒƒã‚°ãƒ‡ãƒ¼ã‚¿é–¢é€£ã®ä»•äº‹ â—‹ appengine ja nightç®¡ç†äºº â— HDLæ´ã¯æ•°ã‹æœˆ â—‹ DE0ã§å‹‰å¼·ä¸ã€‚ã‚„ã£ã¨4bit CPUãŒå‹•ã„ãŸ â—‹ FPGAã‚¨ã‚¯ã‚¹ãƒˆãƒªãƒ¼ãƒ ã‚³ãƒ³ãƒ”ãƒ¥ãƒ¼ãƒ†ã‚£ãƒ³ã‚°ï¼ˆå‹‰å¼·ä¼šï¼‰å§‹ã‚ã¾ ã—ãŸ
koemu 2013/11/15
é«˜é€Ÿå–å¼•ã€memcachedã‚’çµ„ã¿åˆã‚ã›ãŸã‚¢ãƒ—ãƒ©ã‚¤ã‚¢ãƒ³ã‚¹ç‰ã€…ã€ä½Žé…å»¶å‡¦ç†ã®å–ã‚Šçµ„ã¿ã€‚

CPU

FPGA

memcached

ç¾çŠ¶
ãƒªãƒ³ã‚¯
1