[MIPS] Emulate microMIPS instructions

SUMMARY: This patch includes: 1. Emulation of prologue/epilogue and branch instructions for microMIPS. 2. Setting up alternate disassembler (to be used for microMIPS). So there will be two disassembler instances, one for microMIPS and other for MIPS. Appropriate disassembler will be used based on the address class of instruction address. 3. Some of the branch instructions does not have fixed sized delay slot, that means delay slot instruction can be of 2-byte or 4-byte. For this "m_next_inst_size" has been introduced which stores the size of next instruction (i.e size of delay slot instruction in case of branch). This can be used wherever the size of next instruction is required. 4. A minor change to use mips32 register names instead of mips64 names. Reviewers: clayborg, tberghammer Subscribers: mohit.bhakkad, sagar, jaydeep, nitesh.jain, lldb-commits Differential Revision: http://reviews.llvm.org/D13282 llvm-svn: 249381
llvm · Oct 6, 2015 · f55a0a4 · f55a0a4
1 parent 15f2bd9
commit f55a0a4
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diff --git a/lldb/source/Plugins/ABI/SysV-mips/ABISysV_mips.h b/lldb/source/Plugins/ABI/SysV-mips/ABISysV_mips.h
@@ -74,13 +74,11 @@ class ABISysV_mips :
     }
 
     virtual bool
-    CodeAddressIsValid (lldb::addr_t pc)//must- check
+    CodeAddressIsValid (lldb::addr_t pc)
     {
-       if (pc & (4ull - 1ull))
-           return false;   // Not 4 byte aligned
-
-        // Anything else if fair game..
-        return true;
+        // Just make sure the address is a valid 32 bit address. Bit zero
+        // might be set due to MicroMIPS function calls, so don't enforce alignment.
+        return (pc <= UINT32_MAX);
     }
 
     virtual const lldb_private::RegisterInfo *