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This pass attempts to fold the source operands of mov and copy instructions into their uses. llvm-svn: 222581
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,202 @@ | ||
| //===-- SIFoldOperands.cpp - Fold operands --- ----------------------------===// | ||
| // | ||
| // The LLVM Compiler Infrastructure | ||
| // | ||
| // This file is distributed under the University of Illinois Open Source | ||
| // License. See LICENSE.TXT for details. | ||
| // | ||
| /// \file | ||
| //===----------------------------------------------------------------------===// | ||
| // | ||
|
|
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| #include "AMDGPU.h" | ||
| #include "AMDGPUSubtarget.h" | ||
| #include "SIInstrInfo.h" | ||
| #include "llvm/CodeGen/LiveIntervalAnalysis.h" | ||
| #include "llvm/CodeGen/MachineDominators.h" | ||
| #include "llvm/CodeGen/MachineFunctionPass.h" | ||
| #include "llvm/CodeGen/MachineInstrBuilder.h" | ||
| #include "llvm/CodeGen/MachineRegisterInfo.h" | ||
| #include "llvm/IR/LLVMContext.h" | ||
| #include "llvm/IR/Function.h" | ||
| #include "llvm/Support/Debug.h" | ||
| #include "llvm/Target/TargetMachine.h" | ||
|
|
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| #define DEBUG_TYPE "si-fold-operands" | ||
| using namespace llvm; | ||
|
|
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| namespace { | ||
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| class SIFoldOperands : public MachineFunctionPass { | ||
| public: | ||
| static char ID; | ||
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| public: | ||
| SIFoldOperands() : MachineFunctionPass(ID) { | ||
| initializeSIFoldOperandsPass(*PassRegistry::getPassRegistry()); | ||
| } | ||
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| bool runOnMachineFunction(MachineFunction &MF) override; | ||
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| const char *getPassName() const override { | ||
| return "SI Fold Operands"; | ||
| } | ||
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| void getAnalysisUsage(AnalysisUsage &AU) const override { | ||
| AU.addRequired<MachineDominatorTree>(); | ||
| AU.setPreservesCFG(); | ||
| MachineFunctionPass::getAnalysisUsage(AU); | ||
| } | ||
| }; | ||
|
|
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| } // End anonymous namespace. | ||
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| INITIALIZE_PASS_BEGIN(SIFoldOperands, DEBUG_TYPE, | ||
| "SI Fold Operands", false, false) | ||
| INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree) | ||
| INITIALIZE_PASS_END(SIFoldOperands, DEBUG_TYPE, | ||
| "SI Fold Operands", false, false) | ||
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| char SIFoldOperands::ID = 0; | ||
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| char &llvm::SIFoldOperandsID = SIFoldOperands::ID; | ||
|
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| FunctionPass *llvm::createSIFoldOperandsPass() { | ||
| return new SIFoldOperands(); | ||
| } | ||
|
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| static bool isSafeToFold(unsigned Opcode) { | ||
| switch(Opcode) { | ||
| case AMDGPU::V_MOV_B32_e32: | ||
| case AMDGPU::V_MOV_B32_e64: | ||
| case AMDGPU::S_MOV_B32: | ||
| case AMDGPU::S_MOV_B64: | ||
| case AMDGPU::COPY: | ||
| return true; | ||
| default: | ||
| return false; | ||
| } | ||
| } | ||
|
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| static bool updateOperand(MachineInstr *MI, unsigned OpNo, | ||
| const MachineOperand &New, | ||
| const TargetRegisterInfo &TRI) { | ||
| MachineOperand &Old = MI->getOperand(OpNo); | ||
| assert(Old.isReg()); | ||
|
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| if (New.isImm()) { | ||
| Old.ChangeToImmediate(New.getImm()); | ||
| return true; | ||
| } | ||
|
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| if (New.isFPImm()) { | ||
| Old.ChangeToFPImmediate(New.getFPImm()); | ||
| return true; | ||
| } | ||
|
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| if (New.isReg()) { | ||
| if (TargetRegisterInfo::isVirtualRegister(Old.getReg()) && | ||
| TargetRegisterInfo::isVirtualRegister(New.getReg())) { | ||
| Old.substVirtReg(New.getReg(), New.getSubReg(), TRI); | ||
| return true; | ||
| } | ||
| } | ||
|
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| // FIXME: Handle physical registers. | ||
|
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| return false; | ||
| } | ||
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| bool SIFoldOperands::runOnMachineFunction(MachineFunction &MF) { | ||
| MachineRegisterInfo &MRI = MF.getRegInfo(); | ||
| const SIInstrInfo *TII = | ||
| static_cast<const SIInstrInfo *>(MF.getSubtarget().getInstrInfo()); | ||
| const SIRegisterInfo &TRI = TII->getRegisterInfo(); | ||
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| for (MachineFunction::iterator BI = MF.begin(), BE = MF.end(); | ||
| BI != BE; ++BI) { | ||
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| MachineBasicBlock &MBB = *BI; | ||
| MachineBasicBlock::iterator I, Next; | ||
| for (I = MBB.begin(); I != MBB.end(); I = Next) { | ||
| Next = std::next(I); | ||
| MachineInstr &MI = *I; | ||
|
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| if (!isSafeToFold(MI.getOpcode())) | ||
| continue; | ||
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| MachineOperand &OpToFold = MI.getOperand(1); | ||
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| // FIXME: Fold operands with subregs. | ||
| if (OpToFold.isReg() && | ||
| (!TargetRegisterInfo::isVirtualRegister(OpToFold.getReg()) || | ||
| OpToFold.getSubReg())) | ||
| continue; | ||
|
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| std::vector<std::pair<MachineInstr *, unsigned>> FoldList; | ||
| for (MachineRegisterInfo::use_iterator | ||
| Use = MRI.use_begin(MI.getOperand(0).getReg()), E = MRI.use_end(); | ||
| Use != E; ++Use) { | ||
|
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| MachineInstr *UseMI = Use->getParent(); | ||
| const MachineOperand &UseOp = UseMI->getOperand(Use.getOperandNo()); | ||
|
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| // FIXME: Fold operands with subregs. | ||
| if (UseOp.isReg() && UseOp.getSubReg()) { | ||
| continue; | ||
| } | ||
|
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| // In order to fold immediates into copies, we need to change the | ||
| // copy to a MOV. | ||
| if ((OpToFold.isImm() || OpToFold.isFPImm()) && | ||
| UseMI->getOpcode() == AMDGPU::COPY) { | ||
| const TargetRegisterClass *TRC = | ||
| MRI.getRegClass(UseMI->getOperand(0).getReg()); | ||
|
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| if (TRC->getSize() == 4) { | ||
| if (TRI.isSGPRClass(TRC)) | ||
| UseMI->setDesc(TII->get(AMDGPU::S_MOV_B32)); | ||
| else | ||
| UseMI->setDesc(TII->get(AMDGPU::V_MOV_B32_e32)); | ||
| } else if (TRC->getSize() == 8 && TRI.isSGPRClass(TRC)) { | ||
| UseMI->setDesc(TII->get(AMDGPU::S_MOV_B64)); | ||
| } else { | ||
| continue; | ||
| } | ||
| } | ||
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| const MCInstrDesc &UseDesc = UseMI->getDesc(); | ||
|
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| // Don't fold into target independent nodes. Target independent opcodes | ||
| // don't have defined register classes. | ||
| if (UseDesc.isVariadic() || | ||
| UseDesc.OpInfo[Use.getOperandNo()].RegClass == -1) | ||
| continue; | ||
|
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| // Normal substitution | ||
| if (TII->isOperandLegal(UseMI, Use.getOperandNo(), &OpToFold)) { | ||
| FoldList.push_back(std::make_pair(UseMI, Use.getOperandNo())); | ||
| continue; | ||
| } | ||
|
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| // FIXME: We could commute the instruction to create more opportunites | ||
| // for folding. This will only be useful if we have 32-bit instructions. | ||
|
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| // FIXME: We could try to change the instruction from 64-bit to 32-bit | ||
| // to enable more folding opportunites. The shrink operands pass | ||
| // already does this. | ||
| } | ||
|
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| for (std::pair<MachineInstr *, unsigned> Fold : FoldList) { | ||
| if (updateOperand(Fold.first, Fold.second, OpToFold, TRI)) { | ||
| // Clear kill flags. | ||
| if (OpToFold.isReg()) | ||
| OpToFold.setIsKill(false); | ||
| DEBUG(dbgs() << "Folded source from " << MI << " into OpNo " << | ||
| Fold.second << " of " << *Fold.first << '\n'); | ||
| } | ||
| } | ||
| } | ||
| } | ||
| return false; | ||
| } |
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