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[Generic][AIE2] Combiner for shufflevectors that use build vector #129

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Transforms a shufflevector that uses a build vector or undefined into just a build vector. This can be done is because a shuffle vector lowering is an unmerge and then merge. Since build is a merge, the merge and unmerge cancel each other out and we can just merge the vector directly.

Example:

    %1:_(s32) = COPY $r0
    %3:_(<8 x s32>) = G_IMPLICIT_DEF
    %5:_(s32) = G_IMPLICIT_DEF
    %2:_(<8 x s32>) = G_BUILD_VECTOR %1(s32), %5(s32), %5(s32), %5(s32), %5(s32), %5(s32), %5(s32), %5(s32)
    %0:_(<8 x s32>) = G_SHUFFLE_VECTOR %2(<8 x s32>), %3, shufflemask(0, 0, 0, 0, 0, 0, 0, 0)
    ===>
    %2:_(<8 x s32>) = G_BUILD_VECTOR %1(s32), %1(s32), %1(s32), %1(s32), %1(s32), %1(s32), %1(s32), %1(s32)

@ValentijnvdBeek ValentijnvdBeek added llvm:globalisel Code that modifies the Global Intruction Selection backend:aie Code that modifies AIE code vectorization Support for vector instructions llvm:instcombine Code that modifies the combiner llvm:core Modifies non-AIE specific code backend:aie2 labels Jul 19, 2024
@ValentijnvdBeek ValentijnvdBeek self-assigned this Jul 19, 2024
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@konstantinschwarz konstantinschwarz left a comment

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Mostly nits, combiner looks good to me

return true;
default:
return false;
}
}
};

/// Represents a G_SHUFFLE_VECTOR
class GShuffleVector : public GMergeLikeInstr {
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G_SHUFFLE_VECTOR takes the shufflemask as the last operand, which shouldn't be part of the getNumSources I think?
To me that's what makes G_SHUFFLE_VECTOR different compared to the other "merge like" instructions.
I'd rather not make it part of that group, as this can have surprising effects to other existing combines

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I can see that argument. I was looking at it from the perspective of what the result of the function would be. I'll separate them, thanks.

// Our inputs need to be either be build vectors or undefined, register inputs
// break this optimization. You could maybe do something clever were you
// concatenate vectors to save half a build vector.
if ((SrcInstr1 == 0 && IsUndef1 == 0) || (SrcInstr2 == 0 && IsUndef2 == 0))
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These are pointers, just use (!SrcInstr1 && !IsUndef1) || ...)

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Sure, will do. I personally prefer explicit NULL pointer checking for clarity (which, to be fair, this isn't yet), but doing it like that is fine with me.

; CHECK: [[DEF:%[0-9]+]]:_(<16 x s32>) = G_IMPLICIT_DEF
; CHECK-NEXT: $x0 = COPY [[DEF]](<16 x s32>)
; CHECK-NEXT: PseudoRET implicit $lr, implicit $x0
%0:_(s32) = G_CONSTANT i32 28
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Nit: unused G_CONSTANTs here and in the tests below

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Fair, thanks Konstantin.

%5:_(s32) = G_IMPLICIT_DEF
%2:_(<8 x s32>) = G_BUILD_VECTOR %1(s32), %5(s32), %5(s32), %5(s32), %5(s32), %5(s32), %5(s32), %5(s32)
%0:_(<8 x s32>) = G_SHUFFLE_VECTOR %2(<8 x s32>), %3, shufflemask(0, 0, 0, 0, 0, 0, 0, 0)
PseudoRET implicit $lr, implicit %0
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Looks like this is missing the closing ... at the end, and then I think this would fail, because this is further combined into G_AIE_BROADCAST?

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The shufflevector branch has become really divergent in the past month or so, so that hasn't landed yet. Let's try to get all of that merged as quickly as we can, I'll manually merge them to make sure that spectests are updated before enter the main branch.

Missing the closing ... is deliberate, trailing ellipses have caused errors with the unit tests scripts for me before.

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Ran into it again just now. If you have a trailing ellipsis, you need a trailing newline, or otherwise the update mir script will error out. If you skip it, then it doesn't matter whether you have a newline or not. That is why I tend to commit mine without the trailing ellipsis.

@ValentijnvdBeek ValentijnvdBeek force-pushed the vvandebe.sv.bv.combiner branch from e0a5aae to cc0f633 Compare July 29, 2024 12:54
@ValentijnvdBeek ValentijnvdBeek force-pushed the vvandebe.vshuffle.impl branch from 5654047 to 84f3995 Compare August 2, 2024 11:22
Transforms a shufflevector that uses a build vector or undefined
into just a build vector. This can be done is because a shuffle
vector lowering is an unmerge and then merge. Since build is a
merge, the merge and unmerge cancel each other out and we can just
merge the vector directly.

Example:
```
    %1:_(s32) = COPY $r0
    %3:_(<8 x s32>) = G_IMPLICIT_DEF
    %5:_(s32) = G_IMPLICIT_DEF
    %2:_(<8 x s32>) = G_BUILD_VECTOR %1(s32), %5(s32), %5(s32), %5(s32), %5(s32), %5(s32), %5(s32), %5(s32)
    %0:_(<8 x s32>) = G_SHUFFLE_VECTOR %2(<8 x s32>), %3, shufflemask(0, 0, 0, 0, 0, 0, 0, 0)
    ===>
    %2:_(<8 x s32>) = G_BUILD_VECTOR %1(s32), %1(s32), %1(s32), %1(s32), %1(s32), %1(s32), %1(s32), %1(s32)
```
@ValentijnvdBeek ValentijnvdBeek force-pushed the vvandebe.sv.bv.combiner branch from cc0f633 to fee2d99 Compare August 5, 2024 13:36
Comment on lines 297 to 299
select_to_minmax, or_to_bsp, combine_concat_vector,
commute_constant_to_rhs]> {
commute_constant_to_rhs, shufflevector_merge]> {
}
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This is needed since some ARM64 tests relies on the legalizer changing the inputs of the shufflevector and if you don't run them afterwards you get worse code.

@ValentijnvdBeek ValentijnvdBeek force-pushed the vvandebe.vshuffle.impl branch from 84f3995 to 5c3b1a6 Compare August 7, 2024 18:35
; CHECK-NEXT: mov.h v0[1], v1[0]
; CHECK-NEXT: mov w8, #0 ; =0x0
; CHECK-NEXT: fmov s0, w8
; CHECK-NEXT: mov.16b v1, v0
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Add copyright header!

@ValentijnvdBeek ValentijnvdBeek force-pushed the vvandebe.vshuffle.impl branch 3 times, most recently from aec1600 to d1d0a3a Compare August 15, 2024 13:35
def shufflevector_merge_matchinfo : GIDefMatchData<"SmallVector<Register, 8>">;
def shufflevector_merge : GICombineRule<
(defs root:$d, shufflevector_merge_matchinfo:$info),
(match (wip_match_opcode G_SHUFFLE_VECTOR): $d,
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A recent move in LLVM is that you shouldn't use wip_match_opcode anymore since it slows down compilation.

https://llvm.org/docs/GlobalISel/MIRPatterns.html#gallery

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backend:aie Code that modifies AIE code backend:aie2 llvm:core Modifies non-AIE specific code llvm:globalisel Code that modifies the Global Intruction Selection llvm:instcombine Code that modifies the combiner vectorization Support for vector instructions
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