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1. SPI-NTI-GP SPI-NTI-GP Public

   A Verilog RTL implementation of a Master/Slave Serial Peripheral Interface Block

   Verilog 6 1

2. VeriRisc_CPU VeriRisc_CPU Public

   very-reduced-instruction-set processor coded in the Verilog HDL

   Verilog 2

3. LCD-FPGA-Spartan3E LCD-FPGA-Spartan3E Public

   A simple VHDL implementation of the LCD controller for the Spartan3E FPGA.

   VHDL

4. Floating_point_ALU Floating_point_ALU Public

   Forked from petergad14/Floating_point_ALU

   VHDL

5. cvw cvw Public

   Forked from openhwgroup/cvw

   CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional cache…

   Assembly