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Richard Zhuhtejun
Richard Zhu
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htejun
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ARM: imx6q: update the sata bits definitions of gpr13
Replace the SATA_PHY_# by the more readable definitons. tj: Being routed through libata branch to enable implementation of ahci_imx. Signed-off-by: Richard Zhu <[email protected]> Acked-by: Shawn Guo <[email protected]> Signed-off-by: Tejun Heo <[email protected]>
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‎include/linux/mfd/syscon/imx6q-iomuxc-gpr.h‎

Lines changed: 84 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -279,41 +279,88 @@
279279
#define IMX6Q_GPR13_CAN2_STOP_REQ BIT(29)
280280
#define IMX6Q_GPR13_CAN1_STOP_REQ BIT(28)
281281
#define IMX6Q_GPR13_ENET_STOP_REQ BIT(27)
282-
#define IMX6Q_GPR13_SATA_PHY_8_MASK (0x7 << 24)
283-
#define IMX6Q_GPR13_SATA_PHY_8_0_5_DB (0x0 << 24)
284-
#define IMX6Q_GPR13_SATA_PHY_8_1_0_DB (0x1 << 24)
285-
#define IMX6Q_GPR13_SATA_PHY_8_1_5_DB (0x2 << 24)
286-
#define IMX6Q_GPR13_SATA_PHY_8_2_0_DB (0x3 << 24)
287-
#define IMX6Q_GPR13_SATA_PHY_8_2_5_DB (0x4 << 24)
288-
#define IMX6Q_GPR13_SATA_PHY_8_3_0_DB (0x5 << 24)
289-
#define IMX6Q_GPR13_SATA_PHY_8_3_5_DB (0x6 << 24)
290-
#define IMX6Q_GPR13_SATA_PHY_8_4_0_DB (0x7 << 24)
291-
#define IMX6Q_GPR13_SATA_PHY_7_MASK (0x1f << 19)
292-
#define IMX6Q_GPR13_SATA_PHY_7_SATA1I (0x10 << 19)
293-
#define IMX6Q_GPR13_SATA_PHY_7_SATA1M (0x10 << 19)
294-
#define IMX6Q_GPR13_SATA_PHY_7_SATA1X (0x1a << 19)
295-
#define IMX6Q_GPR13_SATA_PHY_7_SATA2I (0x12 << 19)
296-
#define IMX6Q_GPR13_SATA_PHY_7_SATA2M (0x12 << 19)
297-
#define IMX6Q_GPR13_SATA_PHY_7_SATA2X (0x1a << 19)
298-
#define IMX6Q_GPR13_SATA_PHY_6_MASK (0x7 << 16)
299-
#define IMX6Q_GPR13_SATA_SPEED_MASK BIT(15)
300-
#define IMX6Q_GPR13_SATA_SPEED_1P5G 0x0
301-
#define IMX6Q_GPR13_SATA_SPEED_3P0G BIT(15)
302-
#define IMX6Q_GPR13_SATA_PHY_5 BIT(14)
303-
#define IMX6Q_GPR13_SATA_PHY_4_MASK (0x7 << 11)
304-
#define IMX6Q_GPR13_SATA_PHY_4_16_16 (0x0 << 11)
305-
#define IMX6Q_GPR13_SATA_PHY_4_14_16 (0x1 << 11)
306-
#define IMX6Q_GPR13_SATA_PHY_4_12_16 (0x2 << 11)
307-
#define IMX6Q_GPR13_SATA_PHY_4_10_16 (0x3 << 11)
308-
#define IMX6Q_GPR13_SATA_PHY_4_9_16 (0x4 << 11)
309-
#define IMX6Q_GPR13_SATA_PHY_4_8_16 (0x5 << 11)
310-
#define IMX6Q_GPR13_SATA_PHY_3_MASK (0xf << 7)
311-
#define IMX6Q_GPR13_SATA_PHY_3_OFF 0x7
312-
#define IMX6Q_GPR13_SATA_PHY_2_MASK (0x1f << 2)
313-
#define IMX6Q_GPR13_SATA_PHY_2_OFF 0x2
314-
#define IMX6Q_GPR13_SATA_PHY_1_MASK (0x3 << 0)
315-
#define IMX6Q_GPR13_SATA_PHY_1_FAST (0x0 << 0)
316-
#define IMX6Q_GPR13_SATA_PHY_1_MED (0x1 << 0)
317-
#define IMX6Q_GPR13_SATA_PHY_1_SLOW (0x2 << 0)
318-
282+
#define IMX6Q_GPR13_SATA_RX_EQ_VAL_MASK (0x7 << 24)
283+
#define IMX6Q_GPR13_SATA_RX_EQ_VAL_0_5_DB (0x0 << 24)
284+
#define IMX6Q_GPR13_SATA_RX_EQ_VAL_1_0_DB (0x1 << 24)
285+
#define IMX6Q_GPR13_SATA_RX_EQ_VAL_1_5_DB (0x2 << 24)
286+
#define IMX6Q_GPR13_SATA_RX_EQ_VAL_2_0_DB (0x3 << 24)
287+
#define IMX6Q_GPR13_SATA_RX_EQ_VAL_2_5_DB (0x4 << 24)
288+
#define IMX6Q_GPR13_SATA_RX_EQ_VAL_3_0_DB (0x5 << 24)
289+
#define IMX6Q_GPR13_SATA_RX_EQ_VAL_3_5_DB (0x6 << 24)
290+
#define IMX6Q_GPR13_SATA_RX_EQ_VAL_4_0_DB (0x7 << 24)
291+
#define IMX6Q_GPR13_SATA_RX_LOS_LVL_MASK (0x1f << 19)
292+
#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA1I (0x10 << 19)
293+
#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA1M (0x10 << 19)
294+
#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA1X (0x1a << 19)
295+
#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2I (0x12 << 19)
296+
#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2M (0x12 << 19)
297+
#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2X (0x1a << 19)
298+
#define IMX6Q_GPR13_SATA_RX_DPLL_MODE_MASK (0x7 << 16)
299+
#define IMX6Q_GPR13_SATA_RX_DPLL_MODE_1P_1F (0x0 << 16)
300+
#define IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_2F (0x1 << 16)
301+
#define IMX6Q_GPR13_SATA_RX_DPLL_MODE_1P_4F (0x2 << 16)
302+
#define IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F (0x3 << 16)
303+
#define IMX6Q_GPR13_SATA_SPD_MODE_MASK BIT(15)
304+
#define IMX6Q_GPR13_SATA_SPD_MODE_1P5G 0x0
305+
#define IMX6Q_GPR13_SATA_SPD_MODE_3P0G BIT(15)
306+
#define IMX6Q_GPR13_SATA_MPLL_SS_EN BIT(14)
307+
#define IMX6Q_GPR13_SATA_TX_ATTEN_MASK (0x7 << 11)
308+
#define IMX6Q_GPR13_SATA_TX_ATTEN_16_16 (0x0 << 11)
309+
#define IMX6Q_GPR13_SATA_TX_ATTEN_14_16 (0x1 << 11)
310+
#define IMX6Q_GPR13_SATA_TX_ATTEN_12_16 (0x2 << 11)
311+
#define IMX6Q_GPR13_SATA_TX_ATTEN_10_16 (0x3 << 11)
312+
#define IMX6Q_GPR13_SATA_TX_ATTEN_9_16 (0x4 << 11)
313+
#define IMX6Q_GPR13_SATA_TX_ATTEN_8_16 (0x5 << 11)
314+
#define IMX6Q_GPR13_SATA_TX_BOOST_MASK (0xf << 7)
315+
#define IMX6Q_GPR13_SATA_TX_BOOST_0_00_DB (0x0 << 7)
316+
#define IMX6Q_GPR13_SATA_TX_BOOST_0_37_DB (0x1 << 7)
317+
#define IMX6Q_GPR13_SATA_TX_BOOST_0_74_DB (0x2 << 7)
318+
#define IMX6Q_GPR13_SATA_TX_BOOST_1_11_DB (0x3 << 7)
319+
#define IMX6Q_GPR13_SATA_TX_BOOST_1_48_DB (0x4 << 7)
320+
#define IMX6Q_GPR13_SATA_TX_BOOST_1_85_DB (0x5 << 7)
321+
#define IMX6Q_GPR13_SATA_TX_BOOST_2_22_DB (0x6 << 7)
322+
#define IMX6Q_GPR13_SATA_TX_BOOST_2_59_DB (0x7 << 7)
323+
#define IMX6Q_GPR13_SATA_TX_BOOST_2_96_DB (0x8 << 7)
324+
#define IMX6Q_GPR13_SATA_TX_BOOST_3_33_DB (0x9 << 7)
325+
#define IMX6Q_GPR13_SATA_TX_BOOST_3_70_DB (0xa << 7)
326+
#define IMX6Q_GPR13_SATA_TX_BOOST_4_07_DB (0xb << 7)
327+
#define IMX6Q_GPR13_SATA_TX_BOOST_4_44_DB (0xc << 7)
328+
#define IMX6Q_GPR13_SATA_TX_BOOST_4_81_DB (0xd << 7)
329+
#define IMX6Q_GPR13_SATA_TX_BOOST_5_28_DB (0xe << 7)
330+
#define IMX6Q_GPR13_SATA_TX_BOOST_5_75_DB (0xf << 7)
331+
#define IMX6Q_GPR13_SATA_TX_LVL_MASK (0x1f << 2)
332+
#define IMX6Q_GPR13_SATA_TX_LVL_0_937_V (0x00 << 2)
333+
#define IMX6Q_GPR13_SATA_TX_LVL_0_947_V (0x01 << 2)
334+
#define IMX6Q_GPR13_SATA_TX_LVL_0_957_V (0x02 << 2)
335+
#define IMX6Q_GPR13_SATA_TX_LVL_0_966_V (0x03 << 2)
336+
#define IMX6Q_GPR13_SATA_TX_LVL_0_976_V (0x04 << 2)
337+
#define IMX6Q_GPR13_SATA_TX_LVL_0_986_V (0x05 << 2)
338+
#define IMX6Q_GPR13_SATA_TX_LVL_0_996_V (0x06 << 2)
339+
#define IMX6Q_GPR13_SATA_TX_LVL_1_005_V (0x07 << 2)
340+
#define IMX6Q_GPR13_SATA_TX_LVL_1_015_V (0x08 << 2)
341+
#define IMX6Q_GPR13_SATA_TX_LVL_1_025_V (0x09 << 2)
342+
#define IMX6Q_GPR13_SATA_TX_LVL_1_035_V (0x0a << 2)
343+
#define IMX6Q_GPR13_SATA_TX_LVL_1_045_V (0x0b << 2)
344+
#define IMX6Q_GPR13_SATA_TX_LVL_1_054_V (0x0c << 2)
345+
#define IMX6Q_GPR13_SATA_TX_LVL_1_064_V (0x0d << 2)
346+
#define IMX6Q_GPR13_SATA_TX_LVL_1_074_V (0x0e << 2)
347+
#define IMX6Q_GPR13_SATA_TX_LVL_1_084_V (0x0f << 2)
348+
#define IMX6Q_GPR13_SATA_TX_LVL_1_094_V (0x10 << 2)
349+
#define IMX6Q_GPR13_SATA_TX_LVL_1_104_V (0x11 << 2)
350+
#define IMX6Q_GPR13_SATA_TX_LVL_1_113_V (0x12 << 2)
351+
#define IMX6Q_GPR13_SATA_TX_LVL_1_123_V (0x13 << 2)
352+
#define IMX6Q_GPR13_SATA_TX_LVL_1_133_V (0x14 << 2)
353+
#define IMX6Q_GPR13_SATA_TX_LVL_1_143_V (0x15 << 2)
354+
#define IMX6Q_GPR13_SATA_TX_LVL_1_152_V (0x16 << 2)
355+
#define IMX6Q_GPR13_SATA_TX_LVL_1_162_V (0x17 << 2)
356+
#define IMX6Q_GPR13_SATA_TX_LVL_1_172_V (0x18 << 2)
357+
#define IMX6Q_GPR13_SATA_TX_LVL_1_182_V (0x19 << 2)
358+
#define IMX6Q_GPR13_SATA_TX_LVL_1_191_V (0x1a << 2)
359+
#define IMX6Q_GPR13_SATA_TX_LVL_1_201_V (0x1b << 2)
360+
#define IMX6Q_GPR13_SATA_TX_LVL_1_211_V (0x1c << 2)
361+
#define IMX6Q_GPR13_SATA_TX_LVL_1_221_V (0x1d << 2)
362+
#define IMX6Q_GPR13_SATA_TX_LVL_1_230_V (0x1e << 2)
363+
#define IMX6Q_GPR13_SATA_TX_LVL_1_240_V (0x1f << 2)
364+
#define IMX6Q_GPR13_SATA_MPLL_CLK_EN BIT(1)
365+
#define IMX6Q_GPR13_SATA_TX_EDGE_RATE BIT(0)
319366
#endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */

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